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10/04/2005
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10663587
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09/16/2003
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03/17/2005
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05/08/2007
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10663709
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09/17/2003
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03/17/2005
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10/11/2005
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10663959
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09/16/2003
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03/17/2005
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08/30/2005
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10664182
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09/17/2003
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04/01/2004
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02/15/2005
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10664606
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09/16/2003
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07/01/2004
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04/18/2006
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10664738
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03/24/2005
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02/22/2005
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10665327
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09/19/2003
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04/01/2004
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10/16/2007
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10665908
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09/18/2003
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03/24/2005
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04/25/2006
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10666025
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09/17/2003
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04/14/2005
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10/27/2009
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10666077
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09/19/2003
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04/21/2005
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06/13/2006
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10666302
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09/19/2003
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04/07/2005
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SEMICONDUCTOR COMPONENT AND SYSTEM HAVING STIFFENER AND CIRCUIT DECAL
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08/30/2005
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10666393
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09/17/2003
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11/25/2004
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02/13/2007
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10666454
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09/17/2003
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03/17/2005
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05/11/2010
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09/19/2003
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03/24/2005
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03/22/2005
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10666988
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09/18/2003
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03/25/2004
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VARIABLE LEVEL MEMORY
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05/29/2007
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10668009
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09/22/2003
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03/24/2005
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Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
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08/30/2005
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10668755
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09/23/2003
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03/24/2005
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11/23/2004
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10668772
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09/23/2003
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03/25/2004
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03/18/2008
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10668914
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09/23/2003
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03/24/2005
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PROCESS AND INTEGRATION SCHEME FOR FABRICATING CONDUCTIVE COMPONENTS, THROUGH-VIAS AND SEMICONDUCTOR COMPONENTS INCLUDING CONDUCTIVE THROUGH-WAFER VIAS
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10/17/2006
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10668925
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09/23/2003
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03/25/2004
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04/19/2005
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10668944
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09/22/2003
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03/25/2004
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09/22/2009
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10669309
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09/23/2003
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03/24/2005
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04/26/2005
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10669635
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09/24/2003
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09/02/2004
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VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
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04/26/2005
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09/24/2003
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07/22/2004
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04/19/2005
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09/25/2003
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06/17/2004
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VERTICAL FLASH MEMORY CELL WITH BURIED SOURCE RAIL
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08/30/2005
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10671186
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09/24/2003
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03/24/2005
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02/01/2005
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10671228
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09/24/2003
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03/25/2004
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07/08/2008
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10671229
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09/24/2003
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03/24/2005
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12/25/2007
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03/24/2005
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02/13/2007
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09/26/2003
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06/24/2004
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08/09/2005
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09/26/2003
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03/25/2004
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07/13/2010
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09/25/2003
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03/25/2004
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06/27/2006
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09/30/2003
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04/22/2004
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TRANSISTOR GATE STRUCTURE
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04/29/2008
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09/29/2003
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03/31/2005
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09/06/2005
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10673756
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09/29/2003
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04/15/2004
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05/31/2005
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10/01/2003
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04/01/2004
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03/08/2005
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09/29/2003
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02/27/2007
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09/30/2003
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10/21/2004
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10/04/2005
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09/29/2003
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03/31/2005
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09/20/2005
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09/30/2003
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11/11/2004
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05/22/2007
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09/30/2003
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04/01/2004
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08/08/2006
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09/30/2003
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04/01/2004
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12/05/2006
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09/30/2003
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03/31/2005
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10/24/2006
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09/30/2003
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04/01/2004
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04/08/2008
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09/30/2003
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03/31/2005
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11/21/2006
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10/03/2003
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08/12/2004
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VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
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03/21/2006
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08/19/2004
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VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
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05/15/2007
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10/07/2003
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04/07/2005
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04/19/2005
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10/06/2003
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04/08/2004
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08/30/2005
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10/06/2003
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04/08/2004
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06/28/2005
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10/06/2003
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04/29/2004
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09/20/2005
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10/07/2003
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05/12/2005
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04/19/2005
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10/08/2003
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04/15/2004
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09/12/2006
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10/08/2003
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04/14/2005
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12/15/2009
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10/08/2003
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04/14/2005
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10/03/2006
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10/07/2003
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04/15/2004
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SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING INTERPOSERS WITH DAMS PROTRUDING THEREFROM
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12/28/2004
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10680580
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10/07/2003
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04/15/2004
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06/06/2006
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10/09/2003
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04/14/2005
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ULTRASHALLOW PHOTODIODE USING INDIUM
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Issue Dt:
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10/17/2006
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Application #:
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10681161
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Filing Dt:
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10/09/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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AC SENSING FOR A RESISTIVE MEMORY
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06/05/2007
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10681308
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Filing Dt:
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10/09/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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METHOD AND APPARATUS FOR BALANCING COLOR RESPONSE OF IMAGERS
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06/14/2005
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10681408
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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04/08/2004
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Title:
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VERTICAL NROM HAVING A STORAGE DENSITY OF 1 BIT PER IF2
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Patent #:
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Issue Dt:
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08/22/2006
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10681414
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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COMMON WORDLINE FLASH ARRAY ARCHITECTURE
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Patent #:
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Issue Dt:
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01/12/2010
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10681481
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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04/14/2005
| | | | |
Title:
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METHOD OF CLEANING SEMICONDUCTOR SURFACES
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Patent #:
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Issue Dt:
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12/13/2005
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10681482
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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04/14/2005
| | | | |
Title:
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MEMORY BLOCK ERASING IN A FLASH MEMORY DEVICE
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Issue Dt:
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11/07/2006
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10681929
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Filing Dt:
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10/09/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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SENSE AMPLIFIER CIRCUIT
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Patent #:
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09/27/2005
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10682017
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Filing Dt:
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10/09/2003
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Publication #:
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Pub Dt:
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04/14/2005
| | | | |
Title:
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Method and system for monitoring plasma using optical emission spectroscopy
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05/13/2008
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10682276
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Filing Dt:
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10/08/2003
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Publication #:
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Pub Dt:
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04/14/2005
| | | | |
Title:
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MODIFIED ELECTROPLATING SOLUTION COMPONENTS IN A LOW-ACID ELECTROLYTE SOLUTION
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Patent #:
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Issue Dt:
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01/03/2006
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10682585
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Filing Dt:
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10/09/2003
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Publication #:
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Pub Dt:
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04/14/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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10682590
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Filing Dt:
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10/09/2003
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Title:
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FULLY DEPLETED SILICON-ON-INSULATOR CMOS LOGIC
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07/04/2006
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10682674
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10/09/2003
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04/14/2005
| | | | |
Title:
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RANDOM ACCESS INTERFACE IN A SERIAL MEMORY DEVICE
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12/04/2007
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10682700
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10/09/2003
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Pub Dt:
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04/22/2004
| | | | |
Title:
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ELECTRO- AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES
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09/05/2006
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10682703
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Filing Dt:
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10/09/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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METHODS OF PLATING VIA INTERCONNECTS
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Issue Dt:
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07/31/2012
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10683075
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10/10/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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MULTI-PARTITION MEMORY WITH SEPARATED READ AND ALGORITHM DATALINES
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09/01/2009
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10683424
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10/10/2003
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Pub Dt:
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04/28/2005
| | | | |
Title:
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APPARATUS AND METHODS FOR MANUFACTURING MICROFEATURES ON WORKPIECES USING PLASMA VAPOR PROCESSES
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01/29/2008
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10683606
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10/09/2003
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
Title:
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APPARATUS AND METHODS FOR PLASMA VAPOR DEPOSITION PROCESSES
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12/25/2007
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10683806
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10/10/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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LASER ASSISTED MATERIAL DEPOSITION
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03/27/2007
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10684280
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10/10/2003
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Pub Dt:
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05/06/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR CONDITIONING OF A DIGITAL PULSE
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06/27/2006
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10684431
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10/15/2003
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Pub Dt:
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04/29/2004
| | | | |
Title:
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SEMICONDUCTOR DEVICES USING ANTI-REFLECTIVE COATINGS
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04/18/2006
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10684621
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Filing Dt:
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10/14/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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COMPLIANT CONTACT STRUCTURES, CONTACTOR CARDS AND TEST SYSTEM INCLUDING SAME
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Issue Dt:
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05/17/2005
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10684794
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10/14/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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METHODS AND SYSTEMS FOR CONTROLLING RADIATION BEAM CHARACTERISTICS FOR MICROLITHOGRAPHIC PROCESSING
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09/26/2006
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10684967
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Filing Dt:
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10/14/2003
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Pub Dt:
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04/14/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR REDUCING SHORTING IN MEMORY CELLS
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Issue Dt:
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03/01/2005
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10685297
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10/14/2003
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Pub Dt:
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07/08/2004
| | | | |
Title:
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MEMORY REDUNDANCY WITH PROGRAMMABLE NON-VOLATILE CONTROL
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Issue Dt:
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01/18/2005
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10686091
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10/15/2003
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Pub Dt:
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04/29/2004
| | | | |
Title:
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METHOD FOR UNDERFILLING SEMICONDUCTOR COMPONENTS
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05/24/2005
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10686333
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10/14/2003
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Pub Dt:
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05/13/2004
| | | | |
Title:
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PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS
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Issue Dt:
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07/26/2005
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10686552
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10/15/2003
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Pub Dt:
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07/22/2004
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Title:
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STRUCTURE FOR UPDATING A BLOCK OF MEMORY CELLS IN A FLASH MEMORY DEVICE WITH ERASE AND PROGRAM OPERATION REDUCTION
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Issue Dt:
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08/29/2006
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10686731
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10/17/2003
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Pub Dt:
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05/06/2004
| | | | |
Title:
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METAL WIRING PATTERN FOR MEMORY DEVICES
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05/03/2005
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10686864
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10/16/2003
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Pub Dt:
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04/21/2005
| | | | |
Title:
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METHODS AND APPARATUSES FOR TRANSFERRING HEAT FROM MICROELECTRONIC DEVICE MODULES
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08/01/2006
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10687086
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10/16/2003
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Pub Dt:
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04/29/2004
| | | | |
Title:
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BORON INCORPORATED DIFFUSION BARRIER MATERIAL
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01/19/2010
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10687458
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10/15/2003
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Pub Dt:
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04/21/2005
| | | | |
Title:
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SYSTEMS FOR DEPOSITING MATERIAL ONTO WORKPIECES IN REACTION CHAMBERS AND METHODS FOR REMOVING BYPRODUCTS FROM REACTION CHAMBERS
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10/19/2004
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10687463
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10/15/2003
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05/06/2004
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Title:
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STRUCTURE AND METHOD FOR TRANSVERSE FIELD ENHANCEMENT
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08/17/2010
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10688461
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10/17/2003
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04/21/2005
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Title:
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METHOD AND APPARATUS FOR SENDING DATA FROM MULTIPLE SOURCES OVER A COMMUNICATIONS BUS
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01/02/2007
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10688828
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10/17/2003
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04/21/2005
| | | | |
Title:
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DIGITAL DATA APPARATUSES AND DIGITAL DATA OPERATIONAL METHODS
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11/04/2008
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10689256
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10/20/2003
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10/28/2004
| | | | |
Title:
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METHOD FOR FINDING GLOBAL EXTREMA OF A SET OF BYTES DISTRIBUTED ACROSS AN ARRAY OF PARALLEL PROCESSING ELEMENTS
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Issue Dt:
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09/29/2009
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10689257
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10/20/2003
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10/28/2004
| | | | |
Title:
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METHOD OF SHIFTING DATA ALONG DIAGONALS IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA
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03/10/2009
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10689280
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10/20/2003
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10/28/2004
| | | | |
Title:
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METHOD OF OBTAINING INTERLEAVE INTERVAL FOR TWO DATA VALUES
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Issue Dt:
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08/28/2007
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10689300
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10/20/2003
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Pub Dt:
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10/28/2004
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Title:
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METHOD FOR MANIPULATING DATA IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA USING A MEMORY STACK
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Issue Dt:
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05/13/2008
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10689312
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10/20/2003
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Pub Dt:
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10/28/2004
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Title:
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METHOD FOR USING EXTREMA TO LOAD BALANCE A LOOP OF PARALLEL PROCESSING ELEMENTS
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11/18/2008
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10689335
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10/20/2003
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Pub Dt:
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10/28/2004
| | | | |
Title:
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METHOD FOR FINDING LOCAL EXTREMA OF A SET OF VALUES FOR A PARALLEL PROCESSING ELEMENT
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Issue Dt:
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10/14/2008
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Application #:
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10689336
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Filing Dt:
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10/20/2003
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Pub Dt:
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10/28/2004
| | | | |
Title:
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METHOD FOR LOAD BALANCING A LOOP OF PARALLEL PROCESSING ELEMENTS
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Patent #:
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Issue Dt:
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09/30/2008
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Application #:
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10689345
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10/20/2003
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Publication #:
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Pub Dt:
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10/28/2004
| | | | |
Title:
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METHOD FOR LOAD BALANCING A LINE OF PARALLEL PROCESSING ELEMENTS
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