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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10783181
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Filing Dt:
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02/19/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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APPARATUS AND METHOD FOR DETERMINING EFFECT OF ON-CHIP NOISE ON SIGNAL PROPAGATION
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10783419
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Filing Dt:
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02/19/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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10783695
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Filing Dt:
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02/20/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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DRAM CELLS WITH REPRESSED FLOATING GATE MEMORY, LOW TUNNEL BARRIER INTERPOLY INSULATORS
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10783935
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Filing Dt:
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02/20/2004
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Publication #:
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Pub Dt:
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07/14/2005
| | | | |
Title:
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TAMPER MEMORY CELL
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10784074
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Filing Dt:
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02/20/2004
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Publication #:
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Pub Dt:
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08/25/2005
| | | | |
Title:
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METHODS OF FABRICATING INTERCONNECTS FOR SEMICONDUCTOR COMPONENTS INCLUDING PLATING SOLDER-WETTING MATERIAL AND SOLDER FILLING
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10784372
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10784373
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10784442
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10784458
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10784493
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10784495
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10784508
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10784688
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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10784724
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10784785
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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STACKED COLUMNAR 1T-NMTJ MRAM STRUCTURE AND ITS METHOD OF FORMATION AND OPERATION
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10784786
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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STACKED COLUMNAR 1T-NMTJ STRUCTURE AND ITS METHOD OF FORMATION AND OPERATION
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10785122
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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UNDERFILLED, ENCAPSULATED SEMICONDUCTOR DIE ASSEMBLIES AND METHODS OF FABRICATION
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10785310
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/25/2005
| | | | |
Title:
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4F2 EEPROM NROM MEMORY ARRAYS WITH VERTICAL DEVICES
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10785438
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
|
01/06/2005
| | | | |
Title:
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DUAL-DAMASCENE BIT LINE STRUCTURES FOR MICROELECTRONIC DEVICES AND METHODS OF FABRICATING MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10785769
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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LOW REMANENCE FLUX CONCENTRATOR FOR MRAM DEVICES
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10785785
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/25/2005
| | | | |
Title:
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MULTI-STATE MEMORY CELL WITH ASYMMETRIC CHARGE TRAPPING
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10785786
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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CACHING OF DYNAMIC ARRAYS
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10786348
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Filing Dt:
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02/24/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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DOUBLE SIDED CONTAINER PROCESS USED DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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10786716
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Filing Dt:
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02/23/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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APPARATUS FOR MULTIPLEXING SIGNALS THROUGH I/O PINS
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10786726
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Filing Dt:
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02/25/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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STATIC NVRAM WITH ULTRA THIN TUNNEL OXIDES
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10786765
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Filing Dt:
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02/25/2004
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Publication #:
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Pub Dt:
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08/25/2005
| | | | |
Title:
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MULTI-LAYER MEMORY ARRAYS
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10786768
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Filing Dt:
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02/25/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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READ-BIASING AND AMPLIFYING SYSTEM
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Patent #:
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Issue Dt:
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10/11/2005
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Application #:
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10787121
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/23/2004
| | | | |
Title:
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METHODS FOR FORMING CHALCOGENIDE GLASS-BASED MEMORY ELEMENTS
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10787351
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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10/14/2004
| | | | |
Title:
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SEMICONDUCTOR DIE CONFIGURED FOR USE WITH INTERPOSER SUBSTRATES HAVING REINFORCED INTERCONNECT SLOTS
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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10787450
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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09/09/2004
| | | | |
Title:
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METHOD OF FORMING AN INTERFACE FOR A SEMICONDUCTOR DEVICE
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Issue Dt:
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04/17/2007
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10787911
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Filing Dt:
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02/25/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FAST SENSING SCHEME FOR FLOATING-GATE MEMORY CELLS
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10788146
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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DELIVERY OF SOLID CHEMICAL PRECURSORS
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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10788230
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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ONE-DEVICE NON-VOLATILE RANDOM ACCESS MEMORY CELL
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10788525
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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11/25/2004
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Title:
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GATE VOLTAGE REGULATION SYSTEM FOR A NON VOLATILE MEMORY CELLS PROGRAMMING AND/OR SOFT PROGRAMMING PHASE
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Patent #:
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Issue Dt:
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02/06/2007
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10788581
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Filing Dt:
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02/27/2004
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Pub Dt:
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11/11/2004
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Title:
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USER RAM FLASH CLEAR
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10788730
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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AGGLOMERATION CONTROL USING EARLY TRANSITION METAL ALLOYS
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10788810
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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SERVICE PROGRAMMABLE LOGIC ARRAYS WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10788892
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICES AND METHODS FOR DEPOSITING A DIELECTRIC FILM
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Patent #:
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Issue Dt:
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12/23/2008
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10788899
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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METHOD OF FORMING HIGH ASPECT RATIO STRUCTURES
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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10788990
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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TAPE SUBSTRATES WITH MOLD GATE SUPPORT STRUCTURES THAT ARE COPLANAR WITH CONDUCTIVE TRACES THEREOF AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
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06/12/2007
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10788991
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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10/21/2004
| | | | |
Title:
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SURFACE BARRIERS FOR COPPER AND SILVER INTERCONNECTS PRODUCED BY A DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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10789041
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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FERROELECTRIC WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10789044
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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08/26/2004
| | | | |
Title:
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LANTHANIDE DOPED TIOX DIELECTRIC FILMS
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Patent #:
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Issue Dt:
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02/26/2008
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10789190
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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MEMORY DEVICE HAVING CONDITIONING OUTPUT DATA
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Patent #:
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Issue Dt:
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09/19/2006
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10789203
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Filing Dt:
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02/27/2004
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Pub Dt:
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08/26/2004
| | | | |
Title:
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OPERATING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/14/2005
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10789290
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Filing Dt:
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02/27/2004
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Pub Dt:
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08/26/2004
| | | | |
Title:
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MEMORY DEVICE INTERFACE
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Issue Dt:
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11/21/2006
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10789351
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Filing Dt:
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02/26/2004
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Pub Dt:
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11/25/2004
| | | | |
Title:
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VOLTAGE REGULATION SYSTEM FOR A MULTIWORD PROGRAMMING OF A LOW INTEGRATION AREA NON VOLATILE MEMORY
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Issue Dt:
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11/07/2006
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10789381
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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METHOD OF FORMING A MAGNETIC RANDOM ACCESS MEMORY STRUCTURE
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10789449
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Filing Dt:
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02/26/2004
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Publication #:
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Pub Dt:
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12/30/2004
| | | | |
Title:
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FLASH MEMORY COMPRISING AN ERASE VERIFY ALGORITHM INTEGRATED INTO A PROGRAMMING ALGORITHM
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Issue Dt:
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05/22/2007
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10789736
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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TRANSPARENT AMORPHOUS CARBON STRUCTURE IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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10789800
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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SEMICONDUCTOR FABRICATION THAT INCLUDES SURFACE TENSION CONTROL
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Patent #:
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Issue Dt:
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07/01/2008
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10789882
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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INTEGRATED CIRCUIT AND SEED LAYERS
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10789890
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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Method to prevent metal oxide formation during polycide reoxidation
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Patent #:
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Issue Dt:
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10/07/2008
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Application #:
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10789931
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Filing Dt:
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02/27/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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MICROSTRIP LINE DIELECTRIC OVERLAY
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Patent #:
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Issue Dt:
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02/22/2005
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Application #:
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10790242
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Filing Dt:
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03/02/2004
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Publication #:
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Pub Dt:
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09/30/2004
| | | | |
Title:
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SENSING METHOD AND APPARATUS FOR RESISTANCE MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/20/2009
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10790816
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Filing Dt:
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03/03/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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METHOD OF MANUFACTURE OF PROGRAMMABLE CONDUCTOR MEMORY
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Issue Dt:
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03/06/2007
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10791006
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Filing Dt:
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03/02/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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NOVEL MASKED NITROGEN ENHANCED GATE OXIDE
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10791193
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Filing Dt:
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03/02/2004
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Publication #:
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Pub Dt:
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09/02/2004
| | | | |
Title:
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SORTING A GROUP OF INTEGRATED CIRCUIT DEVICES FOR THOSE DEVICES REQUIRING SPECIAL TESTING
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10791400
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Filing Dt:
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03/02/2004
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Publication #:
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|
Pub Dt:
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09/09/2004
| | | | |
Title:
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TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10792229
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Filing Dt:
|
03/03/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
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BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE
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Patent #:
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Issue Dt:
|
01/11/2005
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Application #:
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10792308
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Filing Dt:
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03/03/2004
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Publication #:
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Pub Dt:
|
09/09/2004
| | | | |
Title:
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METHOD OF MAKING FLOATING GATE NON-VOLATILE MEMORY CELL WITH LOW ERASING VOLTAGE HAVING DOUBLE LAYER GATE DIELECTRIC
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Patent #:
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Issue Dt:
|
10/05/2004
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Application #:
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10792532
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Filing Dt:
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03/02/2004
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Publication #:
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Pub Dt:
|
08/26/2004
| | | | |
Title:
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METHODS OF FORMING CONDUCTIVE INTERCONNECTS
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Patent #:
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Issue Dt:
|
05/31/2005
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Application #:
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10792762
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Filing Dt:
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03/05/2004
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Publication #:
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Pub Dt:
|
09/09/2004
| | | | |
Title:
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AN INTEGRATED CIRCUIT WITH A CAPACITOR COMPRISING AN ELECTRODE
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Patent #:
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Issue Dt:
|
09/27/2005
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Application #:
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10793234
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Filing Dt:
|
03/04/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
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STACKED SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER
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Patent #:
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Issue Dt:
|
04/25/2006
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Application #:
|
10793309
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Filing Dt:
|
03/04/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
|
SHALLOW TRENCH ANTIFUSE AND METHODS OF MAKING AND USING SAME
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Patent #:
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Issue Dt:
|
08/30/2005
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Application #:
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10793415
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Filing Dt:
|
03/04/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
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SELECTIVELY CONFIGURABLE CIRCUIT BOARD
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
|
10793564
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Filing Dt:
|
03/04/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
|
BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE
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Patent #:
|
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Issue Dt:
|
09/06/2011
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Application #:
|
10793587
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Filing Dt:
|
03/04/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
|
ULTRA THIN TCS (SICL4) CELL NITRIDE FOR DRAM CAPACITOR WITH DCS (SIH2CI2) INTERFACE SEEDING LAYER
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Patent #:
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Issue Dt:
|
03/20/2007
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Application #:
|
10794696
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Filing Dt:
|
03/05/2004
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Publication #:
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Pub Dt:
|
09/16/2004
| | | | |
Title:
|
SYSTEM FOR STORING DEVICE TEST INFORMATION ON A SEMICONDUCTOR DEVICE USING ON-DEVICE LOGIC FOR DETERMINATION OF TEST RESULTS
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Patent #:
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|
Issue Dt:
|
09/12/2006
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Application #:
|
10795516
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Filing Dt:
|
03/09/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
|
HIGH DENSITY SRAM CELL WITH LATCHED VERTICAL TRANSISTORS
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Patent #:
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Issue Dt:
|
10/18/2005
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Application #:
|
10796000
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Filing Dt:
|
03/10/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
|
METHOD TO MANUFACTURE POLYMER MEMORY WITH COPPER ION SWITCHING SPECIES
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Patent #:
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Issue Dt:
|
12/27/2005
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Application #:
|
10796110
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Filing Dt:
|
03/10/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
|
CHIP SIZE IMAGE SENSOR CAMERA MODULE
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Patent #:
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Issue Dt:
|
10/18/2005
|
Application #:
|
10796115
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Filing Dt:
|
03/10/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
|
SUPPORT FRAME FOR SEMICONDUCTOR PACKAGES
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Patent #:
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Issue Dt:
|
08/08/2006
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Application #:
|
10796257
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Filing Dt:
|
03/09/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
|
METHODS AND SYSTEMS FOR PLANARIZING WORKPIECES, E.G., MICROELECTRONIC WORKPIECES
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Patent #:
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Issue Dt:
|
09/05/2006
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Application #:
|
10796479
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Filing Dt:
|
03/08/2004
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Publication #:
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Pub Dt:
|
09/02/2004
| | | | |
Title:
|
METHODS OF FORMING CAPACITOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
|
03/01/2005
|
Application #:
|
10797495
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Filing Dt:
|
03/10/2004
|
Title:
|
INTERCONNECTING CONDUCTIVE LAYERS OF MEMORY DEVICES
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Patent #:
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Issue Dt:
|
10/31/2006
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Application #:
|
10797504
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Filing Dt:
|
03/10/2004
|
Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
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METHODS RELATING TO SINGULATING SEMICONDUCTOR WAFERS AND WAFER SCALE ASSEMBLIES
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Patent #:
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Issue Dt:
|
06/19/2007
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Application #:
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10797647
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Filing Dt:
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03/10/2004
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Publication #:
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Pub Dt:
|
10/06/2005
| | | | |
Title:
|
SEMICONDUCTOR BGA PACKAGE HAVING A SEGMENTED VOLTAGE PLANE AND METHOD OF MAKING
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Patent #:
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Issue Dt:
|
04/29/2008
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Application #:
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10797727
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Filing Dt:
|
03/08/2004
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Publication #:
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Pub Dt:
|
09/22/2005
| | | | |
Title:
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MEMORY HUB ARCHITECTURE HAVING PROGRAMMABLE LANE WIDTHS
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Patent #:
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Issue Dt:
|
05/23/2006
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Application #:
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10797807
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Filing Dt:
|
03/10/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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METHOD FOR FABRICATING SEMICONDUCTOR COMPONENT WITH CHIP ON BOARD LEADFRAME
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Patent #:
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Issue Dt:
|
08/19/2008
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Application #:
|
10799555
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Filing Dt:
|
03/10/2004
|
Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
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METHOD AND APPARATUS TO WRITE BACK DATA
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Patent #:
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Issue Dt:
|
09/06/2005
|
Application #:
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10800058
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Filing Dt:
|
03/12/2004
|
Publication #:
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|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
INNOVATIVE SOLDER BALL PAD STRUCTURE TO EASE DESIGN RULE, METHODS OF FABRICATING SAME AND SUBSTRATES, ELECTRONIC DEVICE ASSEMBLIES AND SYSTEMS EMPLOYING SAME
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Patent #:
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Issue Dt:
|
08/28/2007
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Application #:
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10800196
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Filing Dt:
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03/11/2004
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Publication #:
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Pub Dt:
|
09/15/2005
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
|
11/20/2007
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Application #:
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10801588
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Filing Dt:
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03/17/2004
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Publication #:
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Pub Dt:
|
09/22/2005
| | | | |
Title:
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DISCRETE TESTS FOR WEAK BITS
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Patent #:
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Issue Dt:
|
03/07/2006
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Application #:
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10804346
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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LOW RESISTANCE BANDGAP REFERENCE CIRCUIT WITH RESISTIVE T-NETWORK
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Patent #:
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Issue Dt:
|
04/08/2008
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Application #:
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10804366
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
09/22/2005
| | | | |
Title:
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METHODS OF SELECTIVELY REMOVING SILICON
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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10804371
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
09/16/2004
| | | | |
Title:
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METHOD OF CONTROLLING A TEST MODE OF A CIRCUIT
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Patent #:
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Issue Dt:
|
09/27/2005
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Application #:
|
10804421
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Filing Dt:
|
03/19/2004
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Publication #:
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Pub Dt:
|
09/09/2004
| | | | |
Title:
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HOLLOW CORE PHOTONIC BANDGAP OPTICAL FIBER
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Patent #:
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Issue Dt:
|
07/19/2005
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Application #:
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10804584
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Filing Dt:
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03/16/2004
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Publication #:
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Pub Dt:
|
10/28/2004
| | | | |
Title:
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MAGNETO-RESISTIVE MEMORY CELL STRUCTURES WITH IMPROVED SELECTIVITY
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Patent #:
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Issue Dt:
|
10/16/2007
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Application #:
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10804699
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Filing Dt:
|
03/19/2004
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Publication #:
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Pub Dt:
|
04/28/2005
| | | | |
Title:
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MOS LINEAR REGION IMPEDANCE CURVATURE CORRECTION
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Patent #:
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Issue Dt:
|
02/05/2008
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Application #:
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10805168
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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METHOD FOR PERFORMING ERROR CORRECTIONS OF DIGITAL INFORMATION CODIFIED AS A SYMBOL SEQUENCE
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Patent #:
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Issue Dt:
|
06/01/2010
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Application #:
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10805182
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
11/18/2004
| | | | |
Title:
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INTEGRATED MEMORY SYSTEM
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Patent #:
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Issue Dt:
|
12/19/2006
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Application #:
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10805557
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Filing Dt:
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03/19/2004
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Publication #:
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Pub Dt:
|
09/16/2004
| | | | |
Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING AND UTILIZING ANTIREFLECTIVE MATERIAL LAYERS, AND METHODS OF FORMING TRANSISTOR GATE STACKS
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Patent #:
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Issue Dt:
|
07/05/2005
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Application #:
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10806765
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Filing Dt:
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03/22/2004
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Publication #:
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Pub Dt:
|
09/30/2004
| | | | |
Title:
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METHOD FOR CONTROLLING PH DURING PLANARIZATION AND CLEANING OF MICROELECTRONIC SUBSTRATES
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10806923
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Filing Dt:
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03/22/2004
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Publication #:
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Pub Dt:
|
09/22/2005
| | | | |
Title:
|
METHODS OF DEPOSITING SILICON DIOXIDE COMPRISING LAYERS IN THE FABRICATION OF INTEGRATED CIRCUITRY, METHODS OF FORMING TRENCH ISOLATION, AND METHODS OF FORMING ARRAYS OF MEMORY CELLS
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Patent #:
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Issue Dt:
|
10/04/2005
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Application #:
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10808018
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Filing Dt:
|
03/24/2004
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Publication #:
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Pub Dt:
|
09/29/2005
| | | | |
Title:
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METHOD OF FORMING SELECT LINES FOR NAND MEMORY DEVICES
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Patent #:
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Issue Dt:
|
09/05/2006
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Application #:
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10808058
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Filing Dt:
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03/24/2004
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Publication #:
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Pub Dt:
|
09/29/2005
| | | | |
Title:
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MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES
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Patent #:
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Issue Dt:
|
08/14/2007
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Application #:
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10808059
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Filing Dt:
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03/24/2004
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Publication #:
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Pub Dt:
|
09/29/2005
| | | | |
Title:
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NROM MEMORY DEVICE WITH A HIGH-PERMITTIVITY GATE DIELECTRIC FORMED BY THE LOW TEMPERATURE OXIDATION OF METALS
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Patent #:
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Issue Dt:
|
04/22/2008
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Application #:
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10808189
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Filing Dt:
|
03/24/2004
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Publication #:
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Pub Dt:
|
09/16/2004
| | | | |
Title:
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DOPED ALUMINUM OXIDE DIELECTRICS
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Patent #:
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Issue Dt:
|
08/14/2007
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Application #:
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10809839
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Filing Dt:
|
03/24/2004
|
Publication #:
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|
Pub Dt:
|
09/29/2005
| | | | |
Title:
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MEMORY ARBITRATION SYSTEM AND METHOD HAVING AN ARBITRATION PACKET PROTOCOL
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|