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Patent #:
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Issue Dt:
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05/19/2009
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Application #:
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10922582
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Filing Dt:
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08/20/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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SEMICODUCTOR DEVICE CONTAINING AN ULTRA THIN DIELECTRIC FILM OR DIELECTRIC LAYER
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07/24/2007
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10922583
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Filing Dt:
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08/19/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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SILICON PILLARS FOR VERTICAL TRANSISTORS
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10922921
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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METHOD AND APPARATUS SENSING A RESISTIVE MEMORY WITH REDUCED POWER CONSUMPTION
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Patent #:
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03/07/2006
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10923191
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Filing Dt:
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08/20/2004
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Title:
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FINFET DEVICE WITH REDUCED DIBL
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Patent #:
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Issue Dt:
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01/27/2009
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10923315
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Filing Dt:
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08/20/2004
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Publication #:
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Pub Dt:
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06/28/2007
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Title:
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METHODS FOR FORMING NIOBIUM AND/OR VANADIUM CONTAINING LAYERS USING ATOMIC LAYER DEPOSITION
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Patent #:
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02/24/2009
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10923437
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Filing Dt:
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08/19/2004
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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METHOD OF MANUFACTURING AN INTERPOSER INCLUDING AT LEAST ONE PASSIVE ELEMENT AT LEAST PARTIALLY DEFINED BY A RECESS THEREIN
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Patent #:
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10/02/2007
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10923450
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Filing Dt:
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08/19/2004
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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METHODS OF FORMING A MULTI-CHIP MODULE HAVING DISCRETE SPACERS
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Patent #:
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09/12/2006
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10923588
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Filing Dt:
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08/19/2004
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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INTERPOSER WITH FLEXIBLE SOLDER PAD ELEMENTS AND METHODS OF MANUFACTURING THE SAME
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Patent #:
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11/07/2006
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10924010
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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SEMICONDUCTOR COMPONENT HAVING CONDUCTORS WITH WIRE BONDABLE METALIZATION LAYERS
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Patent #:
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06/28/2005
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10924186
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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ULTRA-LOW CURRENT BAND-GAP REFERENCE
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Patent #:
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Issue Dt:
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03/14/2006
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10924296
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
Title:
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EMBEDDED ROM DEVICE USING SUBSTRATE LEAKAGE
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Patent #:
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10/03/2006
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10924300
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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MEMORY ADDRESS REPAIR WITHOUT ENABLE FUSES
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Patent #:
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Issue Dt:
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03/18/2008
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10924306
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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METHOD AND APPARATUS FOR GENERATING AND DETECTING INITIALIZATION PATTERNS FOR HIGH SPEED DRAM SYSTEMS
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10924309
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
Title:
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EMBEDDED ROM DEVICE USING SUBSTRATE LEAKAGE
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Patent #:
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Issue Dt:
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11/21/2006
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10924695
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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DYNAMICALLY ADAPTABLE SEMICONDUCTOR PARAMETRIC TESTING
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Patent #:
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Issue Dt:
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05/16/2006
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10925016
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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METHOD AND APPARATUS FOR MEMORY DEVICE WORDLINE
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Patent #:
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Issue Dt:
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01/09/2007
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10925079
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Filing Dt:
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08/23/2004
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Pub Dt:
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02/23/2006
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Title:
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Methods of forming integrated circuits
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Patent #:
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Issue Dt:
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08/28/2007
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10925100
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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METHODS OF FORMING FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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12/05/2006
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10925120
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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MEMORY CELL WITH TRENCHED GATED THYRISTOR
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Patent #:
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Issue Dt:
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10/10/2006
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10925158
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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METHODS OF FORMING CONDUCTIVE LINES
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Patent #:
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Issue Dt:
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06/05/2007
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10925234
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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SYSTEM AND METHOD FOR CONTROLLING INPUT BUFFER BIASING CURRENT
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Patent #:
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Issue Dt:
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04/24/2007
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10925243
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Filing Dt:
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08/25/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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COLUMNAR 1T-N MEMORY CELL STRUCTURE
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Patent #:
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Issue Dt:
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01/30/2007
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10925255
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Filing Dt:
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08/23/2004
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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DUAL PORT MEMORY WITH ASYMMETRIC INPUTS AND OUTPUTS, DEVICE, SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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05/15/2007
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10925260
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Filing Dt:
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08/25/2004
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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BOTTOM SIDE STIFFENER PROBE CARD
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10925339
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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HIGH DENSITY ACCESS TRANSISTOR HAVING INCREASED CHANNEL WIDTH AND METHODS OF FABRICATING SUCH DEVICES
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Patent #:
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Issue Dt:
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09/30/2008
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Application #:
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10925406
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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MICROELECTRONIC IMAGERS WITH OPTICAL DEVICES HAVING INTEGRAL REFERENCE FEATURES AND METHODS FOR MANUFACTURING SUCH MICROELECTRONIC IMAGERS
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Patent #:
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Issue Dt:
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10/30/2007
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10925464
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Filing Dt:
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08/25/2004
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Pub Dt:
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02/03/2005
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Title:
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STABLE PD-SOI DEVICES AND METHODS
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Patent #:
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Issue Dt:
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09/16/2008
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Application #:
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10925501
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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METHODS FOR FORMING INTERCONNECTS IN VIAS AND MICROELECTRONIC WORKPIECES INCLUDING SUCH INTERCONNECTS
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Patent #:
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Issue Dt:
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05/31/2005
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10925505
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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MICROELECTRONIC PACKAGE WITH REDUCED UNDERFILL AND METHODS FOR FORMING SUCH PACKAGES
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Patent #:
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Issue Dt:
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04/03/2007
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10925525
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Filing Dt:
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08/24/2004
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Pub Dt:
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03/02/2006
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Title:
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WAFER BACKSIDE REMOVAL TO COMPLETE THROUGH-HOLES AND PROVIDE WAFER SINGULATION DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
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Issue Dt:
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01/30/2007
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10925527
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Filing Dt:
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08/24/2004
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Pub Dt:
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03/02/2006
| | | | |
Title:
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CONTACT STRUCTURE AND CONTACT LINER PROCESS
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Patent #:
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Issue Dt:
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05/17/2005
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10925543
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Filing Dt:
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08/24/2004
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Pub Dt:
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01/27/2005
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Title:
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APPARATUS FOR DETERMINING BURN-IN RELIABILITY FROM WAFER LEVEL BURN-IN
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Issue Dt:
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09/11/2007
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10925655
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Filing Dt:
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08/25/2004
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Pub Dt:
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02/03/2005
| | | | |
Title:
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STABLE PD-SOI DEVICES AND METHODS
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Patent #:
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Issue Dt:
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09/18/2007
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10925715
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Filing Dt:
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08/24/2004
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Pub Dt:
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03/02/2006
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Title:
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LINER FOR SHALLOW TRENCH ISOLATION
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Patent #:
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Issue Dt:
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10/17/2006
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10925789
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Issue Dt:
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03/13/2007
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10925793
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Issue Dt:
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05/08/2007
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10925865
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Filing Dt:
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08/25/2004
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Pub Dt:
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02/17/2005
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Title:
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SELECTIVELY DEPOSITED SILICON OXIDE LAYERS ON A SILICON SUBSTRATE
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Patent #:
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Issue Dt:
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10/21/2008
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10925917
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Filing Dt:
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08/26/2004
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Pub Dt:
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04/28/2005
| | | | |
Title:
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ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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10926345
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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TWO NARROW BAND AND ONE WIDE BAND COLOR FILTER FOR INCREASING COLOR IMAGE SENSOR SENSITIVITY
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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10926358
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10926360
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
Title:
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APPARATUS AND METHOD FOR MANUFACTURING TILTED MICROLENSES
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10926434
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Filing Dt:
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08/24/2004
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR ATTACHING MICROELECTRONIC SUBSTRATES AND SUPPORT MEMBERS
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10926470
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/26/2007
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10926471
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Filing Dt:
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08/26/2004
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Pub Dt:
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02/03/2005
| | | | |
Title:
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METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10926617
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10926623
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/11/2007
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10926675
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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ONE-TRANSISTOR COMPOSITE-GATE MEMORY
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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10926727
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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01/27/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR CONTROLLING USER ACCESS TO AN ELECTRONIC DEVICE
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10926784
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Filing Dt:
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08/25/2004
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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PHASE -CHANGE MEMORY DEVICE WITH BIASING OF DESELECTED BIT LINES
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10926812
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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LANTHANIDE OXIDE DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10926871
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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TITANIUM SILICIDE BORIDE GATE ELECTRODE
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10926898
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Filing Dt:
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08/25/2004
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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COMMUNICATION DEVICE FOR A LOGIC CIRCUIT
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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10927121
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR IMPROVING PIXEL OUTPUT SWING IN IMAGER SENSORS
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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10927248
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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DELAY LINE OFF-STATE CONTROL WITH POWER REDUCTION
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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10927253
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Filing Dt:
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08/25/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING AN OPENING IN A SOLDER MASK
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Patent #:
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Issue Dt:
|
06/10/2008
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Application #:
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10927308
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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APPARATUS AND METHOD FOR PROCESSING IMAGES
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Patent #:
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Issue Dt:
|
08/02/2005
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Application #:
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10927578
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Filing Dt:
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08/25/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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INTEGRATGED CIRCUIT CHARACTERIZATION PRINTED CIRCUIT BOARD, TEST EQUIPMENT INCLUDING SAME, METHOD OF FABRICATION THEREOF AND METHOD OF CHARACTERIZING AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
|
07/08/2008
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Application #:
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10927591
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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HIGH DYNAMIC RANGE IMAGER WITH A ROLLING SHUTTER
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Patent #:
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Issue Dt:
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06/16/2009
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Application #:
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10927607
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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MEMORY MODULES AND METHODS FOR MANUFACTURING MEMORY MODULES
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10927760
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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SLANTED VIAS FOR ELECTRICAL CIRCUITS ON CIRCUIT BOARDS AND OTHER SUBSTRATES
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10927763
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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INPUT AND OUTPUT BUFFERS HAVING SYMMETRICAL OPERATING CHARACTERISTICS AND IMMUNITY FROM VOLTAGE VARIATIONS
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Patent #:
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Issue Dt:
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12/09/2008
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Application #:
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10927871
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Filing Dt:
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08/27/2004
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Title:
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STATUS OF OVERALL HEALTH OF NONVOLATILE MEMORY
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10928034
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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MEMORY DEVICES HAVING REDUCED COUPLING NOISE BETWEEN WORDLINES
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10928250
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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INTEGRATED DRAM-NVRAM MULTI-LEVEL MEMORY
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Patent #:
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Issue Dt:
|
12/06/2011
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Application #:
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10928310
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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DUAL PINNED DIODE PIXEL WITH SHUTTER
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Patent #:
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Issue Dt:
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10/28/2008
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Application #:
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10928314
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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ACTIVE PHOTOSENSITIVE STRUCTURE WITH BURIED DEPLETION LAYER
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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10928315
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
|
07/10/2007
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Application #:
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10928317
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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METHOD OF FABRICATING A VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY
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Patent #:
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Issue Dt:
|
08/12/2008
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Application #:
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10928323
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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APPARATUS AND METHOD FOR ELIMINATING ARTIFACTS IN ACTIVE PIXEL SENSOR (APS) IMAGERS
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|
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Patent #:
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|
Issue Dt:
|
01/13/2009
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Application #:
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10928324
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
|
ANTI-ECLIPSING CIRCUIT FOR IMAGE SENSORS
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|
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Patent #:
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|
Issue Dt:
|
04/10/2007
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Application #:
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10928385
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Filing Dt:
|
08/27/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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MOTHERBOARD MEMORY SLOT RIBBON CABLE AND APPARATUS
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|
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Patent #:
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|
Issue Dt:
|
01/10/2006
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Application #:
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10928400
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Filing Dt:
|
08/27/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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DEVICE FOR MARGIN TESTING A SEMICONDUCTOR MEMORY BY APPLYING A STRESSING VOLTAGE SIMULTANEOUSLY TO COMPLEMENTARY AND TRUE DIGIT LINES
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|
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Patent #:
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|
Issue Dt:
|
03/28/2006
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Application #:
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10928415
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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COMPACT DECODE AND MULTIPLEXING CIRCUITRY FOR A MULTI-PORT MEMORY HAVING A COMMON MEMORY INTERFACE
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|
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Patent #:
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|
Issue Dt:
|
07/18/2006
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Application #:
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10928424
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR REDUCED POWER OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
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|
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Patent #:
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|
Issue Dt:
|
03/21/2006
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Application #:
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10928491
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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ELECTRONIC SYSTEMS COMPRISING MEMORY DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
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Application #:
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10928505
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Filing Dt:
|
08/26/2004
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS
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|
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Patent #:
|
|
Issue Dt:
|
06/19/2007
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Application #:
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10928512
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
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02/10/2005
| | | | |
Title:
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METHOD OF WAFER BUMPING FOR ENABLING A STITCH WIRE BOND IN THE ABSENCE OF DISCRETE BUMP FORMATION
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|
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Patent #:
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|
Issue Dt:
|
09/26/2006
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Application #:
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10928514
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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METHODS OF FORMING GATELINES AND TRANSISTOR DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
07/10/2007
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Application #:
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10928522
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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VERTICAL TRANSISTOR STRUCTURES HAVING VERTICAL-SURROUNDING-GATES WITH SELF-ALIGNED FEATURES
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|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
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Application #:
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10928547
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Filing Dt:
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08/26/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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METHODS OF FORMING HAFNIUM OXIDE
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|
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Patent #:
|
|
Issue Dt:
|
05/27/2008
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Application #:
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10928598
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Filing Dt:
|
08/27/2004
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Publication #:
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|
Pub Dt:
|
03/02/2006
| | | | |
Title:
|
METHODS FOR FORMING VIAS OF VARYING LATERAL DIMENSIONS
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|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
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Application #:
|
10928666
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Filing Dt:
|
08/26/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
|
ELECTRONIC DEVICES AT THE WAFER LEVEL HAVING FRONT SIDE AND EDGE PROTECTION MATERIAL AND SYSTEMS INCLUDING THE DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
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Application #:
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10928771
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Filing Dt:
|
08/27/2004
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
|
PHOTOLITHOGRAPHIC TECHNIQUES FOR PRODUCING ANGLED LINES
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|
|
Patent #:
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|
Issue Dt:
|
09/28/2010
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Application #:
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10928978
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Filing Dt:
|
08/27/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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TECHNIQUES FOR PACKAGING A MULTIPLE DEVICE COMPONENT
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|
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Patent #:
|
|
Issue Dt:
|
01/23/2007
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Application #:
|
10929173
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
|
METHODS FOR FORMING AN ENRICHED METAL OXIDE SURFACE FOR USE IN A SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
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Application #:
|
10929174
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
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Application #:
|
10929202
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
Title:
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APPARATUS WITH EQUALIZING VOLTAGE GENERATION CIRCUIT AND METHODS OF USE
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
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Application #:
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10929210
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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RESISTIVE HEATER FOR THERMO OPTIC DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10929251
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
SELECTIVE ELECTROLESS-PLATED COPPER METALLIZATION
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|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
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Application #:
|
10929253
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Filing Dt:
|
08/30/2004
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Publication #:
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|
Pub Dt:
|
02/03/2005
| | | | |
Title:
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METHOD AND STRUCTURE FOR HIGH CAPACITANCE MEMORY CELLS
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|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
10929272
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
ATOMIC LAYER DEPOSITION AND CONVERSION
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|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
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Application #:
|
10929281
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
MULTIPLE OXIDE THICKNESSES FOR MERGED MEMORY AND LOGIC APPLICATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
10929283
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Filing Dt:
|
08/30/2004
|
Publication #:
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|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10929307
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
Title:
|
SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10929610
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Filing Dt:
|
08/30/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
ELECTRONIC DEVICE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10929613
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Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
|
PACKAGED MICROELECTRONIC DEVICES AND METHODS OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10929633
|
Filing Dt:
|
08/30/2004
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Publication #:
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|
Pub Dt:
|
04/21/2005
| | | | |
Title:
|
PLATINUM STUFFED WITH SILICON OXIDE AS A DIFFUSION OXYGEN BARRIER FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10929634
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Filing Dt:
|
08/30/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
SEMICONDUCTOR CONTACT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
10929640
|
Filing Dt:
|
08/30/2004
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Publication #:
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Pub Dt:
|
01/26/2006
| | | | |
Title:
|
MICROELECTRONIC COMPONENT ASSEMBLIES WITH RECESSED WIRE BONDS AND METHODS OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10929800
|
Filing Dt:
|
08/30/2004
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
Title:
|
VERTICAL TRANSISTOR AND METHOD OF MAKING
|
|