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Patent #:
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|
Issue Dt:
|
04/26/2011
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Application #:
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11215489
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
|
METHOD OF FORMING HIGH ASPECT RATIO STRUCTURES
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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11215496
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Filing Dt:
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08/30/2005
|
Publication #:
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Pub Dt:
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01/05/2006
| | | | |
Title:
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WRITE ONCE READ ONLY MEMORY EMPLOYING FLOATING GATES
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Patent #:
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Issue Dt:
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06/09/2009
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Application #:
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11215507
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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ATOMIC LAYER DEPOSITION OF GDSCO3 FILMS AS GATE DIELECTRICS
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Patent #:
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Issue Dt:
|
07/01/2008
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Application #:
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11215530
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Filing Dt:
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08/29/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
|
ATOMIC LAYER DEPOSITION OF ZRX HFY SN1-X-Y O2 FILMS AS HIGH K GATE DIELECTRICS
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Patent #:
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Issue Dt:
|
05/06/2008
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Application #:
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11215618
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Filing Dt:
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08/30/2005
|
Publication #:
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Pub Dt:
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01/05/2006
| | | | |
Title:
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WRITE ONCE READ ONLY MEMORY EMPLOYING FLOATING GATES
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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11215619
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
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INTERPOSERS AND OTHER CARRIERS INCLUDING A SLOT WITH A LATERALLY RECESSED AREA AT AN END THEREOF AND SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES INCLUDING SUCH CARRIERS
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11215620
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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QUAD FLAT NO-LEAD (QFN) GRID ARRAY PACKAGE, METHOD OF MAKING AND MEMORY MODULE AND COMPUTER SYSTEM INCLUDING SAME
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Patent #:
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Issue Dt:
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05/06/2008
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Application #:
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11215628
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Filing Dt:
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08/29/2005
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Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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METHODS FOR DESIGNING CARRIER SUBSTRATES WITH RAISED TERMINALS
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11215648
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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SELF-IDENTIFYING STACKED DIE SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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11215664
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SEPARATORS
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11215665
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Filing Dt:
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08/29/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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TIME DELAY OSCILLATOR FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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11215671
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
01/05/2006
| | | | |
Title:
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MASKING STRUCTURE HAVING MULTIPLE LAYERS INCLUDING AN AMORPHOUS CARBON LAYER
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11215778
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
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01/05/2006
| | | | |
Title:
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POLYMER-BASED FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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10/05/2010
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Application #:
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11215780
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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METHODS FOR WAFER-LEVEL PACKAGING OF MICROFEATURE DEVICES AND MICROFEATURE DEVICES FORMED USING SUCH METHODS
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11215836
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Filing Dt:
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08/29/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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METHOD AND APPARATUS FOR GENERATING TEMPERATURE-COMPENSATED READ AND VERIFY OPERATIONS IN FLASH MEMORIES
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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11215854
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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OPEN PATTERN INDUCTOR
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Patent #:
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Issue Dt:
|
12/19/2006
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Application #:
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11215880
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Filing Dt:
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08/30/2005
|
Title:
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LONG RETENTION TIME SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11215890
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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DATA GENERATOR HAVING LINEAR FEEDBACK SHIFT REGISTERS FOR GENERATING DATA PATTERN IN FORWARD AND REVERSE ORDERS
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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11215902
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
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MEMORY CELLS AND SELECT GATES OF NAND MEMORY ARRAYS
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11215922
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Filing Dt:
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08/30/2005
|
Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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STUD ELECTRODE AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
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11/06/2007
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Application #:
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11215933
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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PROGRAMMING METHOD FOR NAND EEPROM
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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11215938
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
|
SYSTEM FOR TWO-STEP RESIST SOFT BAKE TO PREVENT ILD OUTGASSING DURING SEMICONDUCTOR PROCESSING
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Patent #:
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Issue Dt:
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04/10/2007
|
Application #:
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11215963
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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METHODS FOR ERASING FLASH MEMORY
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11215969
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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METHODS FOR ERASING FLASH MEMORY
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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11215982
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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METHOD OF FORMING PITCH MULTIPLED CONTACTS
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Patent #:
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Issue Dt:
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02/26/2008
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Application #:
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11215987
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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DELAY LOCK CIRCUIT HAVING SELF-CALIBRATING LOOP
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11215989
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Filing Dt:
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08/30/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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MEMORY DEVICE TRANSISTORS
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11215990
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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NAND MEMORY DEVICE AND PROGRAMMING METHODS
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Patent #:
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Issue Dt:
|
04/22/2008
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Application #:
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11215993
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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NON-VOLATILE MEMORY COPY BACK
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Patent #:
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Issue Dt:
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03/31/2009
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Application #:
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11216171
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Filing Dt:
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09/01/2005
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Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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SOI DEVICE HAVING INCREASED RELIABILITY AND REDUCED FREE FLOATING BODY EFFECTS
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Patent #:
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Issue Dt:
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12/25/2007
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Application #:
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11216199
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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CMOS CIRCUITS WITH REDUCED CROWBAR CURRENT
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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11216208
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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BIOS LOCK ENCODE/DECODE DRIVER
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Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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11216332
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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01/12/2006
| | | | |
Title:
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SELECTIVE EPITAXY IN VERTICAL INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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11216375
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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01/11/2007
| | | | |
Title:
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SELF ALIGNED METAL GATES ON HIGH-K DIELECTRICS
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11216416
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Filing Dt:
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08/30/2005
|
Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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APPARATUS AND METHOD FOR SUPPRESSING JITTER WITHIN A CLOCK SIGNAL GENERATOR
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11216474
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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LANTHANUM ALUMINUM OXYNITRIDE DIELECTRIC FILMS
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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11216477
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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09/28/2006
| | | | |
Title:
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INTEGRATED CIRCUIT FABRICATION
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11216486
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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PACKAGING OF ELECTRONIC CHIPS WITH AIR-BRIDGE STRUCTURES
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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11216488
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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INTERCONNECT ALLOYS AND METHODS AND APPARATUS USING SAME
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Patent #:
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Issue Dt:
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02/16/2010
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Application #:
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11216541
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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INTEGRATED CIRCUIT INSPECTION SYSTEM
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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11216542
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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GRADED DIELECTRIC LAYERS
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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11216617
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
01/05/2006
| | | | |
Title:
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SUPPORT STRUCTURE FOR USE IN THINNING SEMICONDUCTOR SUBSTRATES AND FOR SUPPORTING THINNED SEMICONDUCTOR SUBSTRATES
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Patent #:
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Issue Dt:
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03/31/2009
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Application #:
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11216644
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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VOLTAGE-CONTROLLED SEMICONDUCTOR INDUCTOR AND METHOD
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Patent #:
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Issue Dt:
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11/04/2008
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Application #:
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11216676
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
01/05/2006
| | | | |
Title:
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MULTI-COMPONENT INTEGRATED CIRCUIT CONTACTS
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11216739
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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NAND MEMORY DEVICE AND PROGRAMMING METHODS
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Patent #:
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Issue Dt:
|
03/18/2008
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Application #:
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11216742
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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SELECTIVE THRESHOLD VOLTAGE VERIFICATION AND COMPACTION
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Patent #:
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Issue Dt:
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07/01/2008
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Application #:
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11216755
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Filing Dt:
|
08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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MULTIPLE SELECT GATE ARCHITECTURE
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Patent #:
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Issue Dt:
|
02/03/2009
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Application #:
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11216814
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Filing Dt:
|
08/31/2005
|
Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
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ELECTRONIC DEVICE PACKAGE
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|
Patent #:
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|
Issue Dt:
|
11/13/2007
|
Application #:
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11216915
|
Filing Dt:
|
08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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TRANSISTOR ASSEMBLIES
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Patent #:
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Issue Dt:
|
10/02/2007
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Application #:
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11216956
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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METHODS FOR ERASING FLASH MEMORY
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|
Patent #:
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Issue Dt:
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12/06/2011
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Application #:
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11216958
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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COBALT TITANIUM OXIDE DIELECTRIC FILMS
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|
Patent #:
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|
Issue Dt:
|
11/07/2006
|
Application #:
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11216959
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
01/05/2006
| | | | |
Title:
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METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS USING CONDUCTIVE LAYER AND GROOVES
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Patent #:
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Issue Dt:
|
03/11/2008
|
Application #:
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11216970
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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FLASH MEMORY WITH RECESSED FLOATING GATE
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Patent #:
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Issue Dt:
|
09/05/2006
|
Application #:
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11217022
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
|
DELAY LOCK CIRCUIT HAVING SELF-CALIBRATING LOOP
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Patent #:
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|
Issue Dt:
|
12/08/2009
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Application #:
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11217030
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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BAND ENGINEERED NANO-CRYSTAL NON-VOLATILE MEMORY DEVICE UTILIZING ENHANCED GATE INJECTION
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Patent #:
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Issue Dt:
|
11/06/2007
|
Application #:
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11217033
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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A Transistor Assembly
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Patent #:
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Issue Dt:
|
02/08/2011
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Application #:
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11217095
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Filing Dt:
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08/31/2005
|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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METHOD AND APPARATUS TO SORT NANOTUBES
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Patent #:
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Issue Dt:
|
11/13/2012
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Application #:
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11217149
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Filing Dt:
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08/31/2005
|
Publication #:
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|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
MICROFEATURE WORKPIECES HAVING ALLOYED CONDUCTIVE STRUCTURES, AND ASSOCIATED METHODS
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Patent #:
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Issue Dt:
|
02/05/2008
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Application #:
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11217151
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Filing Dt:
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08/31/2005
|
Publication #:
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|
Pub Dt:
|
03/01/2007
| | | | |
Title:
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RETAINING RINGS, AND ASSOCIATED PLANARIZING APPARATUSES, AND RELATED METHODS FOR PLANARIZING MICRO-DEVICE WORKPIECES
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Patent #:
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Issue Dt:
|
02/05/2008
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Application #:
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11217152
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Filing Dt:
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08/31/2005
|
Publication #:
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|
Pub Dt:
|
03/01/2007
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Title:
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INTERCONNECTING SUBSTRATES FOR MICROELECTRONIC DIES, METHODS FOR FORMING VIAS IN SUCH SUBSTRATES, AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11217169
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Filing Dt:
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09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11217170
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Filing Dt:
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09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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METHODS AND APPARATUS FOR SORTING AND/OR DEPOSITING NANOTUBES
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Patent #:
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Issue Dt:
|
10/21/2008
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Application #:
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11217269
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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03/01/2007
| | | | |
Title:
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APPARATUS AND METHOD FOR REMOVING MATERIAL FROM MICROFEATURE WORKPIECES
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Patent #:
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Issue Dt:
|
08/11/2009
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Application #:
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11217270
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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METHODS FOR FORMING ARRAYS OF SMALL, CLOSELY SPACED FEATURES
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Patent #:
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Issue Dt:
|
12/12/2006
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Application #:
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11217539
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
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01/12/2006
| | | | |
Title:
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METHODS OF FORMING BURIED BIT LINE DRAM CIRCUITRY
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Patent #:
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Issue Dt:
|
03/13/2007
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Application #:
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11217561
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
01/05/2006
| | | | |
Title:
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SEMICONDUCTOR PROCESSING METHOD AND FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
|
03/13/2007
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Application #:
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11217618
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
12/29/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR DATA COMPRESSION IN MEMORY DEVICES
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Patent #:
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|
Issue Dt:
|
08/04/2009
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Application #:
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11217624
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
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METHOD FOR FORMING A FLOATING GATE MEMORY WITH POLYSILICON LOCAL INTERCONNECTS
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|
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Patent #:
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|
Issue Dt:
|
07/07/2009
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Application #:
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11217627
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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MICROELECTRONIC DEVICES, STACKED MICROELECTRONIC DEVICES, AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
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|
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Patent #:
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|
Issue Dt:
|
06/29/2010
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Application #:
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11217629
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
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MICROELECTRONIC DEVICES HAVING INTERMEDIATE CONTACTS FOR CONNECTION TO INTERPOSER SUBSTRATES, AND ASSOCIATED METHODS OF PACKAGING MICROELECTRONIC DEVICES WITH INTERMEDIATE CONTACTS
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Patent #:
|
|
Issue Dt:
|
02/03/2009
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Application #:
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11217749
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
|
STACKED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
09/01/2009
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Application #:
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11217771
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Filing Dt:
|
08/31/2005
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Publication #:
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|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
MEMORY UTILIZING OXIDE-CONDUCTOR NANOLAMINATES
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|
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Patent #:
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|
Issue Dt:
|
11/27/2007
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Application #:
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11217776
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Filing Dt:
|
08/31/2005
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Publication #:
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|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
CONTROLLING DIFFUSION IN DOPED SEMICONDUCTOR REGIONS
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|
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Patent #:
|
|
Issue Dt:
|
08/29/2006
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Application #:
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11217813
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
01/12/2006
| | | | |
Title:
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METHODS FOR NEUTRALIZING HOLES IN TUNNEL OXIDES OF FLOATING-GATE MEMORY CELLS AND DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
04/03/2007
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Application #:
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11217820
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Filing Dt:
|
09/01/2005
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Publication #:
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|
Pub Dt:
|
01/12/2006
| | | | |
Title:
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FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
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Application #:
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11217828
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
METHODS FOR NEUTRALIZING HOLES IN TUNNEL OXIDES OF FLOATING-GATE MEMORY CELLS AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
11217882
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
SYSTEMS AND METHODS FOR PLASMA DOPING MICROFEATURE WORKPIECES
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|
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Patent #:
|
|
Issue Dt:
|
10/04/2011
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Application #:
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11217888
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
|
SYSTEMS AND METHODS FOR IMPLEMENTING AND MANUFACTURING RETICLES FOR USE IN PHOTOLITHOGRAPHY TOOLS
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|
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Patent #:
|
|
Issue Dt:
|
11/20/2007
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Application #:
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11217894
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Filing Dt:
|
09/01/2005
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Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHODS FOR ETCHING DOPED OXIDES IN THE MANUFACTURE OF MICROFEATURE DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
09/02/2008
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Application #:
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11217905
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHODS OF FORMING OPENINGS INTO DIELECTRIC MATERIAL
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|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
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Application #:
|
11217920
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Filing Dt:
|
09/01/2005
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
Title:
|
FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
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Application #:
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11217946
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
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METHOD FOR FORMING AN ARRAY WITH POLYSILICON LOCAL INTERCONNECTS
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|
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Patent #:
|
|
Issue Dt:
|
10/09/2007
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Application #:
|
11217952
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
METHODS FOR NEUTRALIZING HOLES IN TUNNEL OXIDES OF FLOATING-GATE MEMORY CELLS AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
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Application #:
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11217980
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
DISPOSABLE PILLARS FOR CONTACT FORMATION
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|
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Patent #:
|
|
Issue Dt:
|
09/23/2008
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Application #:
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11217982
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Filing Dt:
|
09/01/2005
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Publication #:
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|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
POROUS ORGANOSILICATE LAYERS, AND VAPOR DEPOSITION SYSTEMS AND METHODS FOR PREPARING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
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Application #:
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11218028
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Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
MICROELECTRONIC DEVICE PACKAGES, STACKED MICROELECTRONIC DEVICE PACKAGES, AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
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Application #:
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11218031
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Filing Dt:
|
08/31/2005
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Publication #:
|
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Pub Dt:
|
12/29/2005
| | | | |
Title:
|
LEADFRAME ALTERATION TO DIRECT COMPOUND FLOW INTO PACKAGE
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|
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Patent #:
|
|
Issue Dt:
|
11/14/2006
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Application #:
|
11218038
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Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR DATA COMPRESSION IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
|
Application #:
|
11218039
|
Filing Dt:
|
08/31/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
MICROFEATURE WORKPIECES, CARRIERS, AND ASSOCIATED METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
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Application #:
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11218045
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Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
02/23/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICES HAVING ANTIREFLECTIVE MATERIAL
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|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
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Application #:
|
11218092
|
Filing Dt:
|
08/31/2005
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Publication #:
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Pub Dt:
|
03/23/2006
| | | | |
Title:
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APPARATUS AND METHOD FOR HIGH DENSITY MULTI-CHIP STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
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Application #:
|
11218123
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR DIGITAL PHASE GENERATION FOR HIGH FREQUENCY CLOCK APPLICATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
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Application #:
|
11218184
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Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
03/08/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
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Application #:
|
11218185
|
Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
METHODS OF FORMING TRANSISTOR DEVICES ASSOCIATED WITH SEMICONDUCTOR-ON-INSULATOR CONSTRUCTIONS
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|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
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Application #:
|
11218194
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Filing Dt:
|
09/01/2005
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Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZING DATA FROM MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11218201
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Filing Dt:
|
08/31/2005
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Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
METHODS OF FORMING SEMICONDUCTOR-ON-INSULATOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
11218229
|
Filing Dt:
|
08/31/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHODS OF FORMING CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
11218231
|
Filing Dt:
|
09/01/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11218232
|
Filing Dt:
|
09/01/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHODS OF FORMING CONDUCTIVE STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11218233
|
Filing Dt:
|
09/01/2005
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHODS OF FORMING LAYERS
|
|