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08/28/2007
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11218243
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09/01/2005
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03/01/2007
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Title:
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MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
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09/18/2007
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11218254
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09/01/2005
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Pub Dt:
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03/01/2007
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Title:
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MICROFEATURE WORKPIECES AND METHODS OF FORMING A REDISTRIBUTION LAYER ON MICROFEATURE WORKPIECES
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05/08/2012
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11218256
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09/01/2005
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Pub Dt:
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03/01/2007
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Title:
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MICROELECTRONIC DEVICES AND MICROELECTRONIC SUPPORT DEVICES, AND ASSOCIATED ASSEMBLIES AND METHODS
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09/01/2009
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11218347
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09/01/2005
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03/01/2007
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Title:
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METHOD OF SELECTIVELY DEPOSITING MATERIALS ON A SUBSTRATE USING A SUPERCRITICAL FLUID
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11/24/2009
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11218352
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09/01/2005
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Pub Dt:
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03/01/2007
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Title:
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MICROFEATURE WORKPIECE SUBSTRATES HAVING THROUGH-SUBSTRATE VIAS, AND ASSOCIATED METHODS OF FORMATION
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11/03/2009
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11218371
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09/02/2005
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03/08/2007
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Title:
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POWER LOSS RECOVERY IN NON-VOLATILE MEMORY
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08/10/2010
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11218705
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09/01/2005
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03/01/2007
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Title:
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METHODS FOR FORMING THROUGH-WAFER INTERCONNECTS, INTERMEDIATE STRUCTURES SO FORMED, AND DEVICES AND SYSTEMS HAVING AT LEAST ONE SOLDER DAM STRUCTURE
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04/12/2011
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11218773
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09/01/2005
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04/06/2006
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Title:
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METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS
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08/21/2007
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11218848
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09/01/2005
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03/01/2007
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Title:
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OPERATION OF MULTIPLE SELECT GATE ARCHITECTURE
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09/30/2008
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11218849
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09/01/2005
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03/01/2007
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Title:
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HIGH PERFORMANCE MULTI-LEVEL NON-VOLATILE MEMORY DEVICE
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08/25/2009
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11218851
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09/01/2005
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03/01/2007
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Title:
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PROGRAM AND READ TRIM SETTING
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08/07/2007
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11218988
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09/01/2005
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03/01/2007
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Title:
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OUTPUT DRIVER ROBUST TO DATA DEPENDENT NOISE
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08/19/2008
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11218990
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09/01/2005
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01/12/2006
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Title:
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VERTICAL TUNNELING TRANSISTOR
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02/19/2008
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11218992
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09/01/2005
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03/01/2007
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Title:
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TECHNIQUES FOR GENERATING TEST PATTERNS IN HIGH SPEED MEMORY DEVICES
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NONE
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11218994
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09/01/2005
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03/01/2007
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Title:
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Techniques for dynamically selecting an input buffer
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08/21/2007
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11219020
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09/01/2005
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01/12/2006
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Title:
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FLASH MEMORY
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07/20/2010
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11219067
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09/01/2005
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03/01/2007
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Title:
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METHOD OF FORMING ISOLATED FEATURES USING PITCH MULTIPLICATION
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01/11/2011
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11219077
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09/01/2005
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03/01/2007
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Title:
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TRANSISTOR GATE FORMING METHODS AND TRANSISTOR STRUCTURES
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05/26/2009
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11219079
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09/01/2005
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03/01/2007
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Title:
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TRANSISTOR GATE FORMING METHODS AND INTEGRATED CIRCUITS
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11/04/2008
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11219085
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09/01/2005
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03/01/2007
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Title:
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DRAM TUNNELING ACCESS TRANSISTOR
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04/14/2009
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11219132
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09/01/2005
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03/01/2007
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Title:
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METHODS FOR FORMING THROUGH-WAFER INTERCONNECTS AND STRUCTURES RESULTING THEREFROM
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09/25/2007
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11219302
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09/01/2005
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Pub Dt:
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04/19/2007
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Title:
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MEASURE CONTROL DELAY AND METHOD HAVING LATCHING CIRCUIT INTEGRAL WITH DELAY CIRCUIT
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07/07/2009
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11219303
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09/01/2005
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Pub Dt:
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03/01/2007
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Title:
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SILICIDED RECESSED SILICON
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08/26/2008
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11219304
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09/01/2005
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03/01/2007
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Title:
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PERIPHERAL GATE STACKS AND RECESSED ARRAY GATES
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08/17/2010
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11219346
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09/01/2005
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03/01/2007
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Title:
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PITCH MULTIPLICATION SPACERS AND METHODS OF FORMING THE SAME
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03/30/2010
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11219349
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09/01/2005
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03/01/2007
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Title:
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METHOD OF MANUFACTURING A MEMORY DEVICE
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04/21/2009
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11219535
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09/01/2005
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Pub Dt:
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03/15/2007
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Title:
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NON-VOLATILE MEMORY WITH ERROR DETECTION
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12/25/2007
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11219540
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09/01/2005
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Pub Dt:
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01/12/2006
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Title:
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METHOD AND SYSTEM FOR MONITORING PLASMA USING OPTICAL EMISSION SPECTROMETRY
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07/01/2008
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11219604
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09/01/2005
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Pub Dt:
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03/01/2007
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Title:
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PROTECTIVE COATING FOR PLANARIZATION
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06/26/2007
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11220202
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09/06/2005
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01/19/2006
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Title:
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LOW VOLTAGE COMPARATOR
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11/21/2006
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11220231
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09/06/2005
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Pub Dt:
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03/02/2006
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Title:
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ZERO-ENABLED FUSE-SET
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06/05/2007
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11220670
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09/08/2005
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Pub Dt:
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01/12/2006
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Title:
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PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION
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10/02/2007
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11221521
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09/07/2005
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01/12/2006
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Title:
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CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
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05/05/2009
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11221539
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09/07/2005
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01/05/2006
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Title:
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CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
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03/20/2007
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11222365
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09/07/2005
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01/05/2006
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Title:
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CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
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12/04/2007
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11222462
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09/07/2005
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01/12/2006
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Title:
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CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
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06/30/2009
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11223045
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09/12/2005
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03/01/2007
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METHOD AND APPARATUS PROVIDING PIXEL ARRAY HAVING AUTOMATIC LIGHT CONTROL PIXELS AND IMAGE CAPTURE PIXELS
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03/06/2007
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11225450
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09/13/2005
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01/12/2006
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METHOD AND STRUCTURE FOR REDUCING RESISTANCE OF A SEMICONDUCTOR DEVICE FEATURE
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04/07/2009
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11226978
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09/15/2005
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01/12/2006
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SEMICONDUCTOR DEVICE
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05/15/2007
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11230773
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09/20/2005
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01/19/2006
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SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
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01/29/2008
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11232202
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09/21/2005
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02/02/2006
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APPARATUS AND METHOD FOR PRINTING MICRO METAL STRUCTURES
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01/27/2009
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11233464
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09/22/2005
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03/23/2006
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MEMORY DEVICE WITH UNIPOLAR AND BIPOLAR SELECTORS
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08/28/2007
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11233569
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09/23/2005
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01/26/2006
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REDUCTION OF FIELD EDGE THINNING IN PERIPHERAL DEVICES
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01/26/2010
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11233714
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09/23/2005
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01/26/2006
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Title:
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ANIMATION PACKAGER FOR AN ON-LINE BOOK
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04/29/2008
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11233967
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09/23/2005
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02/02/2006
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METHODS OF FORMING METAL OXIDE AND SEMIMETAL OXIDE
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04/15/2008
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11234000
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09/23/2005
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01/26/2006
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DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER
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06/26/2007
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11236115
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09/26/2005
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02/02/2006
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
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01/02/2007
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11237396
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09/28/2005
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03/02/2006
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SEMICONDUCTOR CONSTRUCTIONS
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07/10/2007
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11238137
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09/28/2005
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04/13/2006
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READING CIRCUIT AND METHOD FOR A NONVOLATILE MEMORY DEVICE
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09/16/2008
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11240004
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09/30/2005
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04/05/2007
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METHOD AND APPARATUS FOR OPTIMIZING FLASH DEVICE ERASE DISTRIBUTION
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02/10/2009
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11240099
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09/30/2005
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02/09/2006
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SYSTEM AND METHOD FOR PROCESSOR WITH PREDICTIVE MEMORY RETRIEVAL ASSIST
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07/22/2008
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11241486
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09/29/2005
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02/09/2006
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ATOMIC LAYER DEPOSITION METHODS
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08/12/2008
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11241488
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09/29/2005
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02/09/2006
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Title:
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SEMICONDUCTOR SUBSTRATE
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04/01/2008
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11241517
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09/30/2005
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01/26/2006
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METHODS OF FORMING A TRANSISTOR WITH AN INTEGRATED METAL SILICIDE GATE ELECTRODE
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01/29/2008
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11241729
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09/30/2005
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08/03/2006
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MEMORY DEVICE AND METHOD FOR OPERATING THE SAME WITH HIGH REJECTION OF THE NOISE ON THE HIGH-VOLTAGE SUPPLY LINE
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01/20/2009
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11242224
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10/03/2005
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Pub Dt:
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02/09/2006
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Title:
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METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER
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09/11/2007
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11242557
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10/03/2005
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Pub Dt:
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02/09/2006
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METHODS FOR SECURING COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES TO EACH OTHER WITH ADHESIVE MATERIALS THAT INCLUDE PRESSURE-SENSITIVE AND CURABLE COMPONENTS
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01/20/2009
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11242905
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10/05/2005
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Pub Dt:
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04/13/2006
| | | | |
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SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS
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Issue Dt:
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01/08/2008
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Application #:
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11243702
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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INTERCONNECT FOR BUMPED SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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11243825
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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TECHNIQUE TO SIMULTANEOUSLY DISTRIBUTE CLOCK SIGNALS AND DATA ON INTEGRATED CIRCUITS, INTERPOSERS, AND CIRCUIT BOARDS
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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11243925
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Filing Dt:
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10/04/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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SUBSTRATE COMPRISING A PLURALITY OF INTEGRATED CIRCUITRY DIE, AND A SUBSTRATE
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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11244859
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Filing Dt:
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10/06/2005
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Publication #:
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Pub Dt:
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04/12/2007
| | | | |
Title:
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ATOMIC LAYER DEPOSITION METHODS
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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11245725
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Filing Dt:
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10/06/2005
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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DEVICE AND METOD HAVING A MEMORY ARRAY STORING EACH BIT IN MULTIPLE MEMORY CELLS
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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11245765
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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6F2 3-TRANSISTOR DRAM GAIN CELL
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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11246469
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
|
02/09/2006
| | | | |
Title:
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VARIABLE RESISTANCE CIRCUIT
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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11246515
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR FORMING METAL CONTACTS ON A SUBSTRATE
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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11246755
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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METHODS OF FABRICATING INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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11247043
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
|
02/09/2006
| | | | |
Title:
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SOURCE LINES FOR NAND MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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11247495
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Filing Dt:
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10/10/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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Semiconductor assemblies having electrophoretically insulated vias
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11247727
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
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05/04/2006
| | | | |
Title:
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MEMORY CELL HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR AND PROGRAMMING TECHNIQUE THEREFOR
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Patent #:
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Issue Dt:
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07/31/2007
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11247774
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
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05/11/2006
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Title:
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CIRCUITRY FOR AND METHOD OF IMPROVING STATISTICAL DISTRIBUTION OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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11248106
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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METHODS FOR PLANARIZING MICROELECTRONIC WORKPIECES
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11248144
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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SYSTEM-ON-A-CHIP WITH MULTI-LAYERED METALLIZED THROUGH-HOLE INTERCONNECTION
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Patent #:
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Issue Dt:
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02/12/2008
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Application #:
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11248384
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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05/06/2008
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11249540
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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INTERPOSERS FOR CHIP-SCALE PACKAGES AND INTERMEDIATES THEREOF
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Patent #:
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Issue Dt:
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03/27/2007
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11249763
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/20/2006
| | | | |
Title:
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MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/01/2008
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Application #:
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11250176
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Filing Dt:
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10/13/2005
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Pub Dt:
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04/20/2006
| | | | |
Title:
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MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/05/2007
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Application #:
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11250600
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Filing Dt:
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10/14/2005
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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CLOCK GENERATOR HAVING A DELAY LOCKED LOOP AND DUTY CYCLE CORRECTION CIRCUIT IN A PARALLEL CONFIGURATION
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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11251985
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Filing Dt:
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10/17/2005
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Pub Dt:
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02/16/2006
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Title:
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TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
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Patent #:
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Issue Dt:
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10/06/2009
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11252465
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Filing Dt:
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10/17/2005
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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HIGH RESOLUTION PRINTING TECHNIQUE
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Patent #:
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Issue Dt:
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04/10/2007
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11253390
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Filing Dt:
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10/19/2005
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Publication #:
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Pub Dt:
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02/16/2006
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Title:
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METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11255613
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Filing Dt:
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10/21/2005
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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METHODS OF FORMING INTEGRATED CIRCUITS, AND DRAM CIRCUITRY MEMORY CELLS
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Patent #:
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12/05/2006
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11255646
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Filing Dt:
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10/21/2005
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Pub Dt:
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02/16/2006
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Title:
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PRECONDITIONING OF DEFECTIVE AND REDUNDANT COLUMNS IN A MEMORY DEVICE
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Issue Dt:
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02/19/2008
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11255972
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Filing Dt:
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10/24/2005
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Pub Dt:
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05/11/2006
| | | | |
Title:
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METHOD OF MANUFACTURING A CAPACITOR
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11256424
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Filing Dt:
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10/20/2005
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Pub Dt:
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03/02/2006
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Title:
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METHOD OF FORMING A VERTICAL TRANSISTOR
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Issue Dt:
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04/14/2009
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11256430
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Filing Dt:
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10/20/2005
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Publication #:
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Pub Dt:
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03/02/2006
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Title:
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METHOD OF FORMING A VERTICAL TRANSISTOR
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Issue Dt:
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06/15/2010
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11257157
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Filing Dt:
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10/25/2005
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Pub Dt:
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02/23/2006
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Title:
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DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
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12/11/2007
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11257636
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Filing Dt:
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10/25/2005
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03/02/2006
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Title:
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STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
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09/04/2007
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11257637
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10/25/2005
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03/02/2006
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Title:
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STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
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Issue Dt:
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10/04/2011
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11257946
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10/24/2005
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Pub Dt:
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02/23/2006
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Title:
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METHODS OF FORMING MATERIAL ON A SUBSTRATE, AND A METHOD OF FORMING A FIELD EFFECT TRANSISTOR GATE OXIDE ON A SUBSTRATE
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11/25/2008
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11258675
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10/25/2005
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Pub Dt:
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03/02/2006
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Title:
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PROCESS FOR MANUFACTURING A BYTE SELECTION TRANSISTOR FOR A MATRIX OF NON VOLATILE MEMORY CELLS AND CORRESPONDING STRUCTURE
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11/13/2007
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11258921
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10/27/2005
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03/02/2006
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Title:
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METHOD OF FORMING A MEMORY CELL
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10/03/2006
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11259841
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10/26/2005
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Pub Dt:
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03/09/2006
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Title:
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ACCESS CIRCUIT AND METHOD FOR ALLOWING EXTERNAL TEST VOLTAGE TO BE APPLIED TO ISOLATED WELLS
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08/10/2010
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11260339
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10/27/2005
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05/03/2007
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Title:
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NON-VOLATILE MEMORY DEVICE WITH TENSILE STRAINED SILICON LAYER
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06/24/2008
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11260597
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10/27/2005
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Pub Dt:
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04/13/2006
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Title:
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LOW VOLTAGE SENSE AMPLIFIER FOR OPERATION UNDER A REDUCED BIT LINE BIAS VOLTAGE
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Issue Dt:
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04/16/2013
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11261131
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10/28/2005
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Pub Dt:
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05/04/2006
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Title:
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Flash memory device with a low pin count (LPC) communication interface
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Issue Dt:
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09/12/2006
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11261530
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10/28/2005
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Publication #:
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Pub Dt:
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03/09/2006
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Title:
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COMPOSITE DIELECTRIC FORMING METHODS AND COMPOSITE DIELECTRICS
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01/08/2008
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11261903
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10/27/2005
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06/08/2006
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Title:
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PROGRAMMING METHOD OF MULTILEVEL MEMORIES AND CORRESPONDING CIRCUIT
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Issue Dt:
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05/27/2008
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11262275
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10/28/2005
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05/03/2007
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Title:
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SYSTEM AND METHOD FOR CONTROLLING TIMING OF OUTPUT SIGNALS
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02/02/2010
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11263254
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10/31/2005
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Pub Dt:
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05/03/2007
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Title:
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RECESSED CHANNEL NEGATIVE DIFFERENTIAL RESISTANCE-BASED MEMORY CELL
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