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Reel/Frame:	036779/0001			Pages:	985
		Recorded:	10/05/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14854
Page 96 of 149
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Patent #:	8709536	Issue Dt:	04/29/2014	Application #:	12873376	Filing Dt:	09/01/2010
Publication #:	US20120048799	Pub Dt:	03/01/2012
Title:	COMPOSITE FILTRATION MEMBRANES AND METHODS OF PREPARATION THEREOF

Patent #:	8453100	Issue Dt:	05/28/2013	Application #:	12873554	Filing Dt:	09/01/2010
Publication #:	US20120054711	Pub Dt:	03/01/2012
Title:	CIRCUIT ANALYSIS USING TRANSVERSE BUCKETS

Patent #:	7943493	Issue Dt:	05/17/2011	Application #:	12873882	Filing Dt:	09/01/2010
Publication #:	US20100330783	Pub Dt:	12/30/2010
Title:	ELECTRICAL FUSE HAVING A FULLY SILICIDED FUSELINK AND ENHANCED FLUX DIVERGENCE

Patent #:	8418110	Issue Dt:	04/09/2013	Application #:	12875081	Filing Dt:	09/02/2010
Publication #:	US20120060139	Pub Dt:	03/08/2012
Title:	USING PORT OBSCURITY FACTORS TO IMPROVE ROUTING

Patent #:	8188570	Issue Dt:	05/29/2012	Application #:	12875398	Filing Dt:	09/03/2010
Publication #:	US20100327398	Pub Dt:	12/30/2010
Title:	DESIGN STRUCTURE AND METHOD FOR BURIED INDUCTORS FOR ULTRA-HIGH RESISTIVITY WAFERS FOR SOI/RF SIGE APPLICATIONS

Patent #:	8198682	Issue Dt:	06/12/2012	Application #:	12875416	Filing Dt:	09/03/2010
Publication #:	US20110057258	Pub Dt:	03/10/2011
Title:	SEMICONDUCTOR STRUCTURE HAVING A GATE ELECTRODE AT LEAST PARTIALLY DISPOSED IN A TRENCH FORMED AT A BEND IN A SEMICONDUCTOR MATERIAL.

Patent #:	NONE	Issue Dt:		Application #:	12875517	Filing Dt:	09/03/2010
Publication #:	US20100333058	Pub Dt:	12/30/2010
Title:	METHOD FOR INCREASING THE MANUFACTURING YIELD OF PROGRAMMABLE LOGIC DEVICES

Patent #:	8302043	Issue Dt:	10/30/2012	Application #:	12876319	Filing Dt:	09/07/2010
Publication #:	US20110066988	Pub Dt:	03/17/2011
Title:	VERIFICATION OF LOGIC CIRCUIT DESIGNS USING DYNAMIC CLOCK GATING

Patent #:	8378394	Issue Dt:	02/19/2013	Application #:	12876343	Filing Dt:	09/07/2010
Publication #:	US20120056264	Pub Dt:	03/08/2012
Title:	METHOD FOR FORMING AND STRUCTURE OF A RECESSED SOURCE/DRAIN STRAP FOR A MUGFET

Patent #:	8599533	Issue Dt:	12/03/2013	Application #:	12876441	Filing Dt:	09/07/2010
Publication #:	US20120057273	Pub Dt:	03/08/2012
Title:	NANOSTRUCTURE ELECTRODE FOR PSEUDOCAPACITIVE ENERGY STORAGE

Patent #:	8344358	Issue Dt:	01/01/2013	Application #:	12876454	Filing Dt:	09/07/2010
Publication #:	US20120056161	Pub Dt:	03/08/2012
Title:	GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE

Patent #:	8361872	Issue Dt:	01/29/2013	Application #:	12876480	Filing Dt:	09/07/2010
Publication #:	US20120056275	Pub Dt:	03/08/2012
Title:	HIGH PERFORMANCE LOW POWER BULK FET DEVICE AND METHOD OF MANUFACTURE

Patent #:	8435884	Issue Dt:	05/07/2013	Application #:	12876510	Filing Dt:	09/07/2010
Publication #:	US20120058640	Pub Dt:	03/08/2012
Title:	METHOD FOR FORMING AN INTERCONNECT STRUCTURE

Patent #:	8636917	Issue Dt:	01/28/2014	Application #:	12876518	Filing Dt:	09/07/2010
Publication #:	US20100327219	Pub Dt:	12/30/2010
Title:	SOLUTION FOR FORMING POLISHING SLURRY, POLISHING SLURRY AND RELATED METHODS

Patent #:	8453082	Issue Dt:	05/28/2013	Application #:	12877117	Filing Dt:	09/08/2010
Publication #:	US20120060064	Pub Dt:	03/08/2012
Title:	SOFT ERROR VERIFICATION IN HARDWARE DESIGNS

Patent #:	8233345	Issue Dt:	07/31/2012	Application #:	12877628	Filing Dt:	09/08/2010
Publication #:	US20120057401	Pub Dt:	03/08/2012
Title:	PHASE CHANGE MEMORY CYCLE TIMER AND METHOD

Patent #:	9017486	Issue Dt:	04/28/2015	Application #:	12878128	Filing Dt:	09/09/2010
Publication #:	US20120061234	Pub Dt:	03/15/2012
Title:	Deposition Chamber Cleaning Method Including Stressed Cleaning Layer

Patent #:	8491739	Issue Dt:	07/23/2013	Application #:	12878297	Filing Dt:	09/09/2010
Publication #:	US20120061023	Pub Dt:	03/15/2012
Title:	Implementing Interleaved-Dielectric Joining of Multi-Layer Laminates

Patent #:	8378498	Issue Dt:	02/19/2013	Application #:	12878579	Filing Dt:	09/09/2010
Publication #:	US20120061848	Pub Dt:	03/15/2012
Title:	CHIP ASSEMBLY WITH A CORELESS SUBSTRATE EMPLOYING A PATTERNED ADHESIVE LAYER

Patent #:	8426241	Issue Dt:	04/23/2013	Application #:	12878746	Filing Dt:	09/09/2010
Publication #:	US20120061790	Pub Dt:	03/15/2012
Title:	STRUCTURE AND METHOD OF FABRICATING A CZTS PHOTOVOLTAIC DEVICE BY ELECTRODEPOSITION

Patent #:	9234291	Issue Dt:	01/12/2016	Application #:	12878787	Filing Dt:	09/09/2010
Publication #:	US20120061250	Pub Dt:	03/15/2012
Title:	Zinc Thin Films Plating Chemistry and Methods

Patent #:	8266566	Issue Dt:	09/11/2012	Application #:	12879516	Filing Dt:	09/10/2010
Publication #:	US20120066654	Pub Dt:	03/15/2012
Title:	STABILITY-DEPENDENT SPARE CELL INSERTION

Patent #:	8237279	Issue Dt:	08/07/2012	Application #:	12879602	Filing Dt:	09/10/2010
Publication #:	US20120061832	Pub Dt:	03/15/2012
Title:	COLLAR STRUCTURE AROUND SOLDER BALLS THAT CONNECT SEMICONDUCTOR DIE TO SEMICONDUCTOR CHIP PACKAGE SUBSTRATE

Patent #:	8653602	Issue Dt:	02/18/2014	Application #:	12880085	Filing Dt:	09/11/2010
Publication #:	US20120061772	Pub Dt:	03/15/2012
Title:	Transistor having replacement metal gate and process for fabricating the same

Patent #:	8198153	Issue Dt:	06/12/2012	Application #:	12880180	Filing Dt:	09/13/2010
Publication #:	US20110014757	Pub Dt:	01/20/2011
Title:	PROCESS INTEGRATION FOR FLASH STORAGE ELEMENT AND DUAL CONDUCTOR COMPLEMENTARY MOSFETS

Patent #:	8347260	Issue Dt:	01/01/2013	Application #:	12880228	Filing Dt:	09/13/2010
Publication #:	US20120066657	Pub Dt:	03/15/2012
Title:	METHOD OF DESIGNING AN INTEGRATED CIRCUIT BASED ON A COMBINATION OF MANUFACTURABILITY, TEST COVERAGE AND, OPTIONALLY, DIAGNOSTIC COVERAGE

Patent #:	8691690	Issue Dt:	04/08/2014	Application #:	12880437	Filing Dt:	09/13/2010
Publication #:	US20120064714	Pub Dt:	03/15/2012
Title:	CONTACT FORMATION METHOD INCORPORATING PREVENTATIVE ETCH STEP REDUCING INTERLAYER DIELECTRIC MATERIAL FLAKE DEFECTS

Patent #:	8216907	Issue Dt:	07/10/2012	Application #:	12880478	Filing Dt:	09/13/2010
Publication #:	US20100327376	Pub Dt:	12/30/2010
Title:	PROCESS TO FABRICATE A METAL HIGH-K TRANSISTOR HAVING FIRST AND SECOND SILICON SIDEWALLS FOR REDUCED PARASITIC CAPACITANCE

Patent #:	8527811	Issue Dt:	09/03/2013	Application #:	12880794	Filing Dt:	09/13/2010
Publication #:	US20120066547	Pub Dt:	03/15/2012
Title:	Problem Record Signature Generation, Classification and Search in Problem Determination

Patent #:	8263446	Issue Dt:	09/11/2012	Application #:	12881152	Filing Dt:	09/13/2010
Publication #:	US20120061762	Pub Dt:	03/15/2012
Title:	ASYMMETRIC FINFET DEVICES

Patent #:	8492818	Issue Dt:	07/23/2013	Application #:	12881481	Filing Dt:	09/14/2010
Publication #:	US20120061798	Pub Dt:	03/15/2012
Title:	HIGH CAPACITANCE TRENCH CAPACITOR

Patent #:	8407632	Issue Dt:	03/26/2013	Application #:	12881548	Filing Dt:	09/14/2010
Publication #:	US20120065765	Pub Dt:	03/15/2012
Title:	DETECTING DOSE AND FOCUS VARIATIONS DURING PHOTOLITHOGRAPHY

Patent #:	8133810	Issue Dt:	03/13/2012	Application #:	12881806	Filing Dt:	09/14/2010
Publication #:	US20110003473	Pub Dt:	01/06/2011
Title:	STRUCTURE FOR METAL CAP APPLICATIONS

Patent #:	8411444	Issue Dt:	04/02/2013	Application #:	12882362	Filing Dt:	09/15/2010
Publication #:	US20120063094	Pub Dt:	03/15/2012
Title:	THERMAL INTERFACE MATERIAL APPLICATION FOR INTEGRATED CIRCUIT COOLING

Patent #:	8188765	Issue Dt:	05/29/2012	Application #:	12882425	Filing Dt:	09/15/2010
Publication #:	US20120062300	Pub Dt:	03/15/2012
Title:	CIRCUIT AND METHOD FOR ASYNCHRONOUS PIPELINE PROCESSING WITH VARIABLE REQUEST SIGNAL DELAY

Patent #:	8574970	Issue Dt:	11/05/2013	Application #:	12882490	Filing Dt:	09/15/2010
Publication #:	US20120061759	Pub Dt:	03/15/2012
Title:	A METHOD OF FORMING AN EXTREMELY THIN SEMICONDUCTOR INSULATOR (ETOSOI) FET HAVING A STAIR-SHAPED RAISED SOURCE/DRAIN

Patent #:	8492289	Issue Dt:	07/23/2013	Application #:	12882500	Filing Dt:	09/15/2010
Publication #:	US20120061838	Pub Dt:	03/15/2012
Title:	BARRIER LAYER FORMATION FOR METAL INTERCONNECTS THROUGH ENHANCED IMPURITY DIFFUSION

Patent #:	8030716	Issue Dt:	10/04/2011	Application #:	12883874	Filing Dt:	09/16/2010
Publication #:	US20110001195	Pub Dt:	01/06/2011
Title:	SELF-ALIGNED CMOS STRUCTURE WITH DUAL WORKFUNCTION

Patent #:	8629014	Issue Dt:	01/14/2014	Application #:	12885592	Filing Dt:	09/20/2010
Publication #:	US20120068261	Pub Dt:	03/22/2012
Title:	Replacement Metal Gate Structures for Effective Work Function Control

Patent #:	8105861	Issue Dt:	01/31/2012	Application #:	12885648	Filing Dt:	09/20/2010
Publication #:	US20110008925	Pub Dt:	01/13/2011
Title:	CMOS IMAGE SENSOR WITH REDUCED DARK CURRENT

Patent #:	8492270	Issue Dt:	07/23/2013	Application #:	12885665	Filing Dt:	09/20/2010
Publication #:	US20120068346	Pub Dt:	03/22/2012
Title:	STRUCTURE FOR NANO-SCALE METALLIZATION AND METHOD FOR FABRICATING SAME

Patent #:	8445948	Issue Dt:	05/21/2013	Application #:	12886139	Filing Dt:	09/20/2010
Publication #:	US20110006367	Pub Dt:	01/13/2011
Title:	GATE PATTERNING OF NANO-CHANNEL DEVICES

Patent #:	8492811	Issue Dt:	07/23/2013	Application #:	12886224	Filing Dt:	09/20/2010
Publication #:	US20120068237	Pub Dt:	03/22/2012
Title:	SELF-ALIGNED STRAP FOR EMBEDDED CAPACITOR AND REPLACEMENT GATE DEVICES

Patent #:	8377780	Issue Dt:	02/19/2013	Application #:	12886639	Filing Dt:	09/21/2010
Publication #:	US20120068233	Pub Dt:	03/22/2012
Title:	TRANSISTORS HAVING STRESSED CHANNEL REGIONS AND METHODS OF FORMING TRANSISTORS HAVING STRESSED CHANNEL REGIONS

Patent #:	8427894	Issue Dt:	04/23/2013	Application #:	12886692	Filing Dt:	09/21/2010
Publication #:	US20120069688	Pub Dt:	03/22/2012
Title:	IMPLEMENTING SINGLE BIT REDUNDANCY FOR DYNAMIC SRAM CIRCUIT WITH ANY BIT DECODE

Patent #:	8617937	Issue Dt:	12/31/2013	Application #:	12886850	Filing Dt:	09/21/2010
Publication #:	US20120068264	Pub Dt:	03/22/2012
Title:	FORMING NARROW FINS FOR FINFET DEVICES USING ASYMMETRICALLY SPACED MANDRELS

Patent #:	8486776	Issue Dt:	07/16/2013	Application #:	12886881	Filing Dt:	09/21/2010
Publication #:	US20120068267	Pub Dt:	03/22/2012
Title:	STRAINED DEVICES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

Patent #:	8551845	Issue Dt:	10/08/2013	Application #:	12886903	Filing Dt:	09/21/2010
Publication #:	US20120068193	Pub Dt:	03/22/2012
Title:	STRUCTURE AND METHOD FOR INCREASING STRAIN IN A DEVICE

Patent #:	8464090	Issue Dt:	06/11/2013	Application #:	12887007	Filing Dt:	09/21/2010
Publication #:	US20120072767	Pub Dt:	03/22/2012
Title:	RECOVERY OF FAILED DISKS IN AN ARRAY OF DISKS

Patent #:	8439561	Issue Dt:	05/14/2013	Application #:	12887551	Filing Dt:	09/22/2010
Publication #:	US20110010151	Pub Dt:	01/13/2011
Title:	FLUID DISTRIBUTION APPARATUS AND METHOD FACILITATING COOLING OF ELECTRONICS RACK(S) AND SIMULATING HEATED AIRFLOW EXHAUST OF ELECTRONICS RACK(S)

Patent #:	8769445	Issue Dt:	07/01/2014	Application #:	12887565	Filing Dt:	09/22/2010
Publication #:	US20120070064	Pub Dt:	03/22/2012
Title:	METHOD FOR DETERMINING MASK OPERATION ACTIVITIES

Patent #:	8518817	Issue Dt:	08/27/2013	Application #:	12887737	Filing Dt:	09/22/2010
Publication #:	US20120070979	Pub Dt:	03/22/2012
Title:	METHOD OF ELECTROLYTIC PLATING AND SEMICONDUCTOR DEVICE FABRICATION

Patent #:	8441847	Issue Dt:	05/14/2013	Application #:	12887850	Filing Dt:	09/22/2010
Publication #:	US20110069539	Pub Dt:	03/24/2011
Title:	PROGRAMMING MULTI-LEVEL PHASE CHANGE MEMORY CELLS

Patent #:	9034660	Issue Dt:	05/19/2015	Application #:	12888388	Filing Dt:	09/22/2010
Publication #:	US20110076670	Pub Dt:	03/31/2011
Title:	DETECTION OF ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS

Patent #:	NONE	Issue Dt:		Application #:	12888394	Filing Dt:	09/22/2010
Publication #:	US20110076782	Pub Dt:	03/31/2011
Title:	READ-AFTER-WRITE DETECTION OF ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES

Patent #:	8694280	Issue Dt:	04/08/2014	Application #:	12888403	Filing Dt:	09/22/2010
Publication #:	US20110077902	Pub Dt:	03/31/2011
Title:	SERVO CONTROL CIRCUIT FOR DETECTING ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS

Patent #:	9081004	Issue Dt:	07/14/2015	Application #:	12888408	Filing Dt:	09/22/2010
Publication #:	US20110077869	Pub Dt:	03/31/2011
Title:	CIRCUIT FOR DETECTING ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS

Patent #:	8481380	Issue Dt:	07/09/2013	Application #:	12888828	Filing Dt:	09/23/2010
Publication #:	US20120074469	Pub Dt:	03/29/2012
Title:	ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE

Patent #:	NONE	Issue Dt:		Application #:	12888883	Filing Dt:	09/23/2010
Publication #:	US20120079212	Pub Dt:	03/29/2012
Title:	ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES

Patent #:	8722548	Issue Dt:	05/13/2014	Application #:	12890051	Filing Dt:	09/24/2010
Publication #:	US20120074533	Pub Dt:	03/29/2012
Title:	STRUCTURES AND TECHNIQUES FOR ATOMIC LAYER DEPOSITION

Patent #:	8465164	Issue Dt:	06/18/2013	Application #:	12890173	Filing Dt:	09/24/2010
Publication #:	US20120075734	Pub Dt:	03/29/2012
Title:	MIRROR ASSEMBLY INCLUDING FOAM ENCOMPASSED WITHIN A POLYMER MATRIX

Patent #:	8495528	Issue Dt:	07/23/2013	Application #:	12890854	Filing Dt:	09/27/2010
Publication #:	US20120077130	Pub Dt:	03/29/2012
Title:	METHOD FOR GENERATING A PLURALITY OF OPTIMIZED WAVEFRONTS FOR A MULTIPLE EXPOSURE LITHOGRAPHIC PROCESS

Patent #:	8609534	Issue Dt:	12/17/2013	Application #:	12890941	Filing Dt:	09/27/2010
Publication #:	US20120074520	Pub Dt:	03/29/2012
Title:	ELECTRICAL FUSE STRUCTURE AND METHOD OF FABRICATING SAME

Patent #:	8228713	Issue Dt:	07/24/2012	Application #:	12892160	Filing Dt:	09/28/2010
Publication #:	US20120075918	Pub Dt:	03/29/2012
Title:	SRAM HAVING WORDLINE UP-LEVEL VOLTAGE ADJUSTABLE TO ASSIST BITCELL STABILITY AND DESIGN STRUCTURE FOR SAME

Patent #:	8582351	Issue Dt:	11/12/2013	Application #:	12892191	Filing Dt:	09/28/2010
Publication #:	US20120075919	Pub Dt:	03/29/2012
Title:	METHODS AND SYSTEMS FOR ADJUSTING WORDLINE UP-LEVEL VOLTAGE TO IMPROVE PRODUCTION YIELD RELATIVE TO SRAM-CELL STABILITY

Patent #:	8460981	Issue Dt:	06/11/2013	Application #:	12892465	Filing Dt:	09/28/2010
Publication #:	US20120074501	Pub Dt:	03/29/2012
Title:	USE OF CONTACTS TO CREATE DIFFERENTIAL STRESSES ON DEVICES

Patent #:	8815671	Issue Dt:	08/26/2014	Application #:	12892474	Filing Dt:	09/28/2010
Publication #:	US20120074502	Pub Dt:	03/29/2012
Title:	USE OF CONTACTS TO CREATE DIFFERENTIAL STRESSES ON DEVICES

Patent #:	8124470	Issue Dt:	02/28/2012	Application #:	12892950	Filing Dt:	09/29/2010
Title:	STRAINED THIN BODY SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND DEVICE

Patent #:	8268716	Issue Dt:	09/18/2012	Application #:	12894231	Filing Dt:	09/30/2010
Publication #:	US20120083113	Pub Dt:	04/05/2012
Title:	CREATION OF LEAD-FREE SOLDER JOINT WITH INTERMETALLICS

Patent #:	8768679	Issue Dt:	07/01/2014	Application #:	12894286	Filing Dt:	09/30/2010
Publication #:	US20120084066	Pub Dt:	04/05/2012
Title:	SYSTEM AND METHOD FOR EFFICIENT MODELING OF NPSKEW EFFECTS ON STATIC TIMING TESTS

Patent #:	8424015	Issue Dt:	04/16/2013	Application #:	12894308	Filing Dt:	09/30/2010
Publication #:	US20120084477	Pub Dt:	04/05/2012
Title:	TRANSACTIONAL MEMORY PREEMPTION MECHANISM

Patent #:	8450043	Issue Dt:	05/28/2013	Application #:	12894412	Filing Dt:	09/30/2010
Publication #:	US20120082944	Pub Dt:	04/05/2012
Title:	Patterning nano-scale patterns on a film comprising unzipping copolymers

Patent #:	8341588	Issue Dt:	12/25/2012	Application #:	12897021	Filing Dt:	10/04/2010
Publication #:	US20120083913	Pub Dt:	04/05/2012
Title:	SEMICONDUCTOR LAYER FORMING METHOD AND STRUCTURE

Patent #:	8507962	Issue Dt:	08/13/2013	Application #:	12897230	Filing Dt:	10/04/2010
Publication #:	US20120080732	Pub Dt:	04/05/2012
Title:	ISOLATION STRUCTURES FOR GLOBAL SHUTTER IMAGER PIXEL, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

Patent #:	8836835	Issue Dt:	09/16/2014	Application #:	12897295	Filing Dt:	10/04/2010
Publication #:	US20120081588	Pub Dt:	04/05/2012
Title:	PIXEL SENSOR CELL WITH HOLD NODE FOR LEAKAGE CANCELLATION AND METHODS OF MANUFACTURE AND DESIGN STRUCTURE

Patent #:	8456351	Issue Dt:	06/04/2013	Application #:	12897964	Filing Dt:	10/05/2010
Publication #:	US20110254727	Pub Dt:	10/20/2011
Title:	PHASED ARRAY MILLIMETER WAVE IMAGING TECHNIQUES

Patent #:	8413094	Issue Dt:	04/02/2013	Application #:	12897983	Filing Dt:	10/05/2010
Publication #:	US20120084741	Pub Dt:	04/05/2012
Title:	STRUCTURE, DESIGN STRUCTURE AND PROCESS FOR INCREASING MAGNITUDE OF DEVICE THRESHOLD VOLTAGE FOR LOW POWER APPLICATIONS

Patent #:	NONE	Issue Dt:		Application #:	12898885	Filing Dt:	10/06/2010
Publication #:	US20120086101	Pub Dt:	04/12/2012
Title:	INTEGRATED CIRCUIT AND INTERCONNECT, AND METHOD OF FABRICATING SAME

Patent #:	8467230	Issue Dt:	06/18/2013	Application #:	12898924	Filing Dt:	10/06/2010
Publication #:	US20120087176	Pub Dt:	04/12/2012
Title:	DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY USING BODY BIAS TO CLEAR DATA AT POWER-UP

Patent #:	8440544	Issue Dt:	05/14/2013	Application #:	12899127	Filing Dt:	10/06/2010
Publication #:	US20120086100	Pub Dt:	04/12/2012
Title:	CMOS STRUCTURE AND METHOD OF MANUFACTURE

Patent #:	8236710	Issue Dt:	08/07/2012	Application #:	12899638	Filing Dt:	10/07/2010
Publication #:	US20120086103	Pub Dt:	04/12/2012
Title:	TECHNIQUE TO CREATE A BURIED PLATE IN EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE

Patent #:	9041082	Issue Dt:	05/26/2015	Application #:	12899691	Filing Dt:	10/07/2010
Publication #:	US20120086059	Pub Dt:	04/12/2012
Title:	ENGINEERING MULTIPLE THRESHOLD VOLTAGES IN AN INTEGRATED CIRCUIT

Patent #:	8387160	Issue Dt:	02/26/2013	Application #:	12899817	Filing Dt:	10/07/2010
Publication #:	US20110020533	Pub Dt:	01/27/2011
Title:	SCANNING PROBE-BASED LITHOGRAPHY METHOD

Patent #:	8412487	Issue Dt:	04/02/2013	Application #:	12899868	Filing Dt:	10/07/2010
Publication #:	US20110029274	Pub Dt:	02/03/2011
Title:	SELF HEATING MONITOR FOR SIGE AND SOI CMOS DEVICES

Patent #:	8299625	Issue Dt:	10/30/2012	Application #:	12899911	Filing Dt:	10/07/2010
Publication #:	US20120086128	Pub Dt:	04/12/2012
Title:	BORDERLESS INTERCONNECT LINE STRUCTURE SELF-ALIGNED TO UPPER AND LOWER LEVEL CONTACT VIAS

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100

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Assignors

GLOBALFOUNDRIES U.S. 2 LLC

Exec Dt:

09/10/2015

GLOBALFOUNDRIES U.S. INC.

Exec Dt:

09/10/2015

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309

UGLAND HOUSE

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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