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Total properties:
15
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Patent #:
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Issue Dt:
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08/26/2008
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Application #:
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09917972
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Filing Dt:
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07/30/2001
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Publication #:
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Pub Dt:
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01/30/2003
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Title:
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BUILT-IN-SELF-TEST USING EMBEDDED MEMORY AND PROCESSOR IN AN APPLICATION SPECIFIC INTEGRATED CIRCUIT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10327173
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Filing Dt:
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12/20/2002
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Publication #:
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Pub Dt:
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06/24/2004
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Title:
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Method of field upgradeable boot code
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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10696811
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Filing Dt:
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10/30/2003
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Publication #:
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Pub Dt:
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05/05/2005
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Title:
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FIXED FREQUENCY CLOCK OUTPUT HAVING A VARIABLE HIGH FREQUENCY INPUT CLOCK AND AN UNRELATED FIXED FREQUENCY REFERENCE SIGNAL
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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10788074
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Filing Dt:
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02/25/2004
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Publication #:
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Pub Dt:
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08/25/2005
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Title:
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PARALLEL VIDEO PROCESSING ARCHITECTURE
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Patent #:
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Issue Dt:
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07/05/2011
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Application #:
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10826886
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Filing Dt:
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04/15/2004
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Publication #:
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Pub Dt:
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10/20/2005
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Title:
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PROGRAMMABLE I/O INTERFACE
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Patent #:
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Issue Dt:
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01/20/2009
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Application #:
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10903560
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Filing Dt:
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07/29/2004
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Publication #:
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Pub Dt:
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02/02/2006
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Title:
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MODULATED VIDEO WAVEFORM GENERATOR
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Patent #:
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Issue Dt:
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03/04/2008
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Application #:
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10938098
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Filing Dt:
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09/10/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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METHOD AND APPARATUS FOR IMAGE PROCESSING
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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10941859
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Filing Dt:
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09/16/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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IMAGE PROCESSING METHOD AND DEVICE
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Patent #:
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Issue Dt:
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06/07/2011
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Application #:
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10945735
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Filing Dt:
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09/20/2004
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Publication #:
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Pub Dt:
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03/23/2006
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Title:
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METHOD AND APPARATUS FOR IMAGE PROCESSING
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|
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Patent #:
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|
Issue Dt:
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05/27/2008
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Application #:
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10994011
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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METHOD AND APPARATUS FOR DMA-GENERATED MEMORY WRITE-BACK
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Patent #:
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Issue Dt:
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06/03/2008
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Application #:
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10995987
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
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Title:
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METHOD AND APPARATUS FOR INTERVAL DMA TRANSFER ACCESS
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|
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Patent #:
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Issue Dt:
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10/28/2008
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Application #:
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11352167
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Filing Dt:
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02/10/2006
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Publication #:
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Pub Dt:
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08/16/2007
| | | | |
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Title:
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SYSTEM AND METHOD FOR ROUTING SUPPLY VOLTAGES OR OTHER SIGNALS BETWEEN SIDE-BY-SIDE DIE AND A LEAD FRAME FOR SYSTEM IN A PACKAGE (SIP) DEVICES
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Patent #:
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|
Issue Dt:
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01/27/2009
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Application #:
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11377108
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Filing Dt:
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03/15/2006
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Publication #:
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Pub Dt:
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09/20/2007
| | | | |
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Title:
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ON-CHIP TEST CIRCUIT AND METHOD FOR TESTING OF SYSTEM-ON-CHIP (SOC) INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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05/11/2010
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Application #:
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11391625
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Filing Dt:
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03/27/2006
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Publication #:
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Pub Dt:
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09/27/2007
| | | | |
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Title:
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ON-DIE BOND WIRES SYSTEM AND METHOD FOR ENHANCING ROUTABILITY OF A REDISTRIBUTION LAYER
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Patent #:
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Issue Dt:
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12/08/2009
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Application #:
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11416840
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Filing Dt:
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05/03/2006
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Publication #:
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Pub Dt:
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11/08/2007
| | | | |
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Title:
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SYSTEM AND METHOD FOR ROUTING SIGNALS BETWEEN SIDE-BY-SIDE DIE IN LEAD FRAME TYPE SYSTEM IN A PACKAGE (SIP) DEVICES
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