Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 022078/0001 | |
| Pages: | 3 |
| | Recorded: | 01/08/2009 | | |
| Attorney Dkt #: | 4717-21 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
2
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Patent #:
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Issue Dt:
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03/16/1999
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Application #:
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08920117
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Filing Dt:
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08/26/1997
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Title:
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SMART-CUT PROCESS FOR THE PRODUCTION OF THIN SEMICONDUCTOR MATERIAL FILMS
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09823855
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Filing Dt:
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03/31/2001
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Publication #:
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Pub Dt:
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10/03/2002
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Title:
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STRAINED SILICON ON INSULATOR STRUCTURES
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Assignee
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| PARC TECHNOLOGIQUE DES FONTAINES |
| CHEMIN DES FRANQUES |
| 38190 BERNIN, FRANCE |
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Correspondence name and address
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WINSTON & STRAWN LLP
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1700 K STREET, N.W.
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ALLAN A. FANUCCI, PATENT DEPARTMENT
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WASHINGTON, DC 20006-3817
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