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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:040165/0001   Pages: 151
Recorded: 09/27/2016
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
11/30/1999
Application #:
09159142
Filing Dt:
09/23/1998
Title:
SIMULTANEOUS OPERATION FLASH MEMORY DEVICE WITH A FLEXIBLE BANK PARTITION ARCHITECTURE
2
Patent #:
Issue Dt:
08/12/2014
Application #:
12026425
Filing Dt:
02/05/2008
Publication #:
Pub Dt:
09/04/2008
Title:
SEMICONDUCTOR MANUFACTURING EQUIPMENT AND MANUFACTURING METHOD OF THE SAME
3
Patent #:
Issue Dt:
06/24/2014
Application #:
12255356
Filing Dt:
10/21/2008
Publication #:
Pub Dt:
05/07/2009
Title:
LINEAR DROP-OUT REGULATOR CIRCUIT
4
Patent #:
Issue Dt:
01/28/2014
Application #:
12256333
Filing Dt:
10/22/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
5
Patent #:
Issue Dt:
08/19/2014
Application #:
13022517
Filing Dt:
02/07/2011
Publication #:
Pub Dt:
08/09/2012
Title:
PATTERNED DUMMY WAFERS LOADING IN BATCH TYPE CVD
Assignor
1
Exec Dt:
06/01/2015
Assignee
1
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

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