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Patent Assignment Details
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Reel/Frame:032885/0010   Pages: 6
Recorded: 05/13/2014
Attorney Dkt #:SSP-105
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 18
1
Patent #:
Issue Dt:
10/19/2010
Application #:
11602214
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
ORGANIC ELECTROLUMINESCENT MATERIALS AND ORGANIC ELECTROLUMINESCENT DEVICE USING THE SAME
2
Patent #:
Issue Dt:
04/22/2014
Application #:
12812852
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
05/26/2011
Title:
Thyristor comprising a special doped region characterized by an LDD region and a halo implant
3
Patent #:
Issue Dt:
11/05/2013
Application #:
13123148
Filing Dt:
04/07/2011
Publication #:
Pub Dt:
08/11/2011
Title:
ELECTRICALLY ERASABLE PROGRAMMABLE MEMORY AND ITS MANUFACTURING METHOD
4
Patent #:
Issue Dt:
04/08/2014
Application #:
13253855
Filing Dt:
10/05/2011
Publication #:
Pub Dt:
08/16/2012
Title:
Memory Array
5
Patent #:
Issue Dt:
02/25/2014
Application #:
13541600
Filing Dt:
07/03/2012
Publication #:
Pub Dt:
01/10/2013
Title:
WORD-LINE VOLTAGE REGULATING CIRCUIT AND SINGLE POWER SUPPLY MEMORY
6
Patent #:
Issue Dt:
01/27/2015
Application #:
13570791
Filing Dt:
08/09/2012
Publication #:
Pub Dt:
03/28/2013
Title:
Flash Memory Device
7
Patent #:
Issue Dt:
10/01/2013
Application #:
13596900
Filing Dt:
08/28/2012
Publication #:
Pub Dt:
05/30/2013
Title:
FLASH MEMORY AND METHOD FOR FORMING THE SAME
8
Patent #:
Issue Dt:
06/17/2014
Application #:
13601858
Filing Dt:
08/31/2012
Publication #:
Pub Dt:
09/12/2013
Title:
FLASH MEMORY
9
Patent #:
Issue Dt:
04/15/2014
Application #:
13631844
Filing Dt:
09/28/2012
Publication #:
Pub Dt:
04/04/2013
Title:
SUPERJUNCTION LDMOS AND MANUFACTURING METHOD OF THE SAME
10
Patent #:
Issue Dt:
04/28/2015
Application #:
13680547
Filing Dt:
11/19/2012
Publication #:
Pub Dt:
08/29/2013
Title:
MEMORY AND METHOD OF OPERATING THE SAME
11
Patent #:
NONE
Issue Dt:
Application #:
13846549
Filing Dt:
03/18/2013
Publication #:
Pub Dt:
11/14/2013
Title:
EEPROM MEMORY UNIT AND EEPROM MEMORY DEVICE
12
Patent #:
Issue Dt:
07/15/2014
Application #:
13914244
Filing Dt:
06/10/2013
Publication #:
Pub Dt:
12/12/2013
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
13
Patent #:
Issue Dt:
10/06/2015
Application #:
13963361
Filing Dt:
08/09/2013
Publication #:
Pub Dt:
03/27/2014
Title:
MEMORY ARRAY DEVICE AND METHOD FOR REDUCING READ CURRENT OF THE SAME
14
Patent #:
Issue Dt:
04/21/2015
Application #:
13964754
Filing Dt:
08/12/2013
Publication #:
Pub Dt:
06/05/2014
Title:
CHARGE PUMP CIRCUIT
15
Patent #:
Issue Dt:
11/03/2015
Application #:
14017770
Filing Dt:
09/04/2013
Publication #:
Pub Dt:
05/22/2014
Title:
FLASH MEMORY CIRCUIT
16
Patent #:
Issue Dt:
06/30/2015
Application #:
14032925
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
06/26/2014
Title:
OSCILLATOR AND SELF-CALIBRATION METHOD THEREOF
17
Patent #:
NONE
Issue Dt:
Application #:
14036953
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
06/19/2014
Title:
INTERCONNECT STRUCTURE AND FORMING METHOD THEREOF
18
Patent #:
Issue Dt:
07/14/2015
Application #:
14041887
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
06/26/2014
Title:
ROW DECODING CIRCUIT AND MEMORY
Assignor
1
Exec Dt:
01/24/2013
Assignee
1
NO. 1399, ZUCHONGZHI ROAD
ZHANGJIANG HI-TECH PARK
SHANGHAI, CHINA 201203
Correspondence name and address
RABIN & BERDO, P.C.
1101 14TH STREET, N.W., SUITE 500
WASHINGTON, DC 20005

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