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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:012927/0011   Pages: 5
Recorded: 05/28/2002
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 7
1
Patent #:
Issue Dt:
06/08/2004
Application #:
09601007
Filing Dt:
09/08/2000
Title:
DATA INTERPOLATING SYSTEM
2
Patent #:
Issue Dt:
10/28/2003
Application #:
09623073
Filing Dt:
10/25/2000
Title:
DIGITAL TO ANALOG CONVERTER USING B SPINE FUNCTION
3
Patent #:
Issue Dt:
05/21/2002
Application #:
09623074
Filing Dt:
10/13/2000
Title:
SAMPLING FUNCTION GENERATOR
4
Patent #:
Issue Dt:
07/13/2004
Application #:
09719621
Filing Dt:
12/14/2000
Title:
DIGITAL-TO-ANALOG CONVERTER WITH PLURAL VOLTAGE HOLDING SECTIONS, PLURAL STEP FUNCTION GENERATORS, VOLTAGE SUMMING SECTION AND INTEGRATOR
5
Patent #:
Issue Dt:
05/11/2004
Application #:
09719622
Filing Dt:
12/14/2000
Title:
DATA INTERPOLATION METHOD
6
Patent #:
Issue Dt:
06/25/2002
Application #:
09743456
Filing Dt:
01/09/2001
Title:
DIGITAL TO ANALOG CONVERTER WITH STEP VOLTAGE GENERATOR FOR SMOOTHING ANALOG OUTPUT
7
Patent #:
Issue Dt:
04/25/2006
Application #:
09913173
Filing Dt:
08/09/2001
Title:
IMAGE PROCESSING CIRCUIT
Assignor
1
Exec Dt:
12/27/2001
Assignee
1
5-13, NISHISHIROMACHI 2-CHOME
JOUETSU-SHI, JAPAN 943-0
Correspondence name and address
DELLETT AND WALTERS
JAMES H. WALTERS
310 S.W. FOURTH AVENUE, SUITE 1101
PORTLAND, OREGON 97204

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