Patent Assignment Details
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Reel/Frame: | 010640/0021 | |
| Pages: | 3 |
| | Recorded: | 02/25/2000 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09514217
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Filing Dt:
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02/25/2000
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Title:
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Structure of Combined Passive Elements and Logic Circuit on a Silicon on Insulator Wafer
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Assignee
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NO. 3, LI-HSIN RD. II, SCIENCE-BASED INDUSTRIAL PARK |
HSINCHU-CITY, TAIWAN R.O.C |
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Correspondence name and address
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THOMAS, KAYDEN, HORSTEMEYER & RISLEY LLP
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DANIEL R. MCCLURE
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100 GALLERIA PARKWAY, SUITE 1750
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ATLANTA, GEORGIA 30339
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