|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10956848
|
Filing Dt:
|
10/01/2004
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
Title:
|
DIGITAL PHASE SHIFT CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10956860
|
Filing Dt:
|
09/30/2004
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
Title:
|
NQL - NETLIST QUERY LANGUAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
10956862
|
Filing Dt:
|
09/30/2004
|
Publication #:
|
|
Pub Dt:
|
04/06/2006
| | | | |
Title:
|
NETLIST DATABASE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
10959186
|
Filing Dt:
|
10/07/2004
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
Title:
|
CORDLESS TELEPHONE WITH MP3 PLAYER CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10959868
|
Filing Dt:
|
10/06/2004
|
Publication #:
|
|
Pub Dt:
|
02/24/2005
| | | | |
Title:
|
ANALOG CAPACITOR IN DUAL DAMASCENE PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
10960170
|
Filing Dt:
|
10/07/2004
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
TASK QUEUING METHODS AND SYSTEMS FOR TRANSMITTING FRAME INFORMATION OVER AN I/O INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10960492
|
Filing Dt:
|
10/07/2004
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
MEMORY INTERFACE WITH WRITE BUFFER AND ENCODER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10960680
|
Filing Dt:
|
10/07/2004
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
MULTI-CHIP INTEGRATED CIRCUIT MODULE FOR HIGH-FREQUENCY OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
10962188
|
Filing Dt:
|
10/08/2004
|
Publication #:
|
|
Pub Dt:
|
05/19/2005
| | | | |
Title:
|
PIPELINED DECISION-FEEDBACK UNIT IN A REDUCED-STATE VITERBI DETECTOR WITH LOCAL FEEDBACK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10962262
|
Filing Dt:
|
10/11/2004
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
RELIABILITY CIRCUIT FOR APPLYING AN AC STRESS SIGNAL OR DC MEASUREMENT TO A TRANSISTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10963156
|
Filing Dt:
|
10/12/2004
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
Title:
|
CATHODE WITH IMPROVED WORK FUNCTION AND METHOD FOR MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
10964056
|
Filing Dt:
|
10/12/2004
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
METHOD FOR TRAINING A TRANSCEIVER FOR HIGH SPEED COMMUNICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
10965138
|
Filing Dt:
|
10/14/2004
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
PARALLEL SAMPLED MULTI-STAGE DECIMATED DIGITAL LOOP FILTER FOR CLOCK/DATA RECOVERY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10966074
|
Filing Dt:
|
10/14/2004
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
METHOD FOR FABRICATING PLANAR SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10967900
|
Filing Dt:
|
10/18/2004
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
Title:
|
ELECTRO-MECHANICAL DEVICE HAVING A CHARGE DISSIPATION LAYER AND A METHOD OF MANUFACTURE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
10969086
|
Filing Dt:
|
10/20/2004
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
TRANSITION FAULT DETECTION REGISTER WITH EXTENDED SHIFT MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
10970211
|
Filing Dt:
|
10/21/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
ARBITRATING ACCESS FOR A PLURALITY OF DATA CHANNEL INPUTS WITH DIFFERENT CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2011
|
Application #:
|
10971216
|
Filing Dt:
|
10/22/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
DRIVING MULTIPLE CONSECUTIVE BITS IN A SERIAL DATA STREAM AT MULTIPLE VOLTAGE LEVELS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
10971911
|
Filing Dt:
|
10/23/2004
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
DEBUGGING SIMULATION OF A CIRCUIT CORE USING PATTERN RECORDER, PLAYER & CHECKER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
10971961
|
Filing Dt:
|
10/22/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
LOCAL INTERCONNECT MANUFACTURING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10972892
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
PROGRAMMABLE POWER PERSONALITY CARD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10972898
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
05/26/2005
| | | | |
Title:
|
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2013
|
Application #:
|
10973585
|
Filing Dt:
|
10/26/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
CORRECTION-CALCULATION ALGORITHM FOR ESTIMATION OF THE SIGNAL TO NOISE RATIO IN HIGH BIT RATE DMT MODULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10973851
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
CONTACT RING DESIGN FOR REDUCING BUBBLE AND ELECTROLYTE EFFECTS DURING ELECTROCHEMICAL PLATING IN MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
10974103
|
Filing Dt:
|
10/27/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR IMPROVED INCREASED BIT-DEPTH DISPLAY FROM A TRANSFORM DECODER BY RETAINING ADDITIONAL INVERSE TRANSFORM BITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10975315
|
Filing Dt:
|
10/28/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
TEST CLOCKING SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10975981
|
Filing Dt:
|
10/27/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
METHOD OF OPTIMIZING CRITICAL PATH DELAY IN AN INTEGRATED CIRCUIT DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10976518
|
Filing Dt:
|
10/29/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
PROCESS FOR DESIGNING BASE PLATFORMS FOR IC DESIGN TO PERMIT RESOURCE RECOVERY AND FLEXIBLE MACRO PLACEMENT, BASE PLATFORM FOR ICS, AND PROCESS OF CREATING ICS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
10977386
|
Filing Dt:
|
10/29/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
METHOD OF AUTOMATING PLACE AND ROUTE CORRECTIONS FOR AN INTEGRATED CIRCUIT DESIGN FROM PHYSICAL DESIGN VALIDATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
10977732
|
Filing Dt:
|
10/29/2004
|
Publication #:
|
|
Pub Dt:
|
07/21/2005
| | | | |
Title:
|
CONTROL OF HOT CARRIER INJECTION IN A METAL-OXIDE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
10977881
|
Filing Dt:
|
10/29/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2010
|
Application #:
|
10978716
|
Filing Dt:
|
11/01/2004
|
Publication #:
|
|
Pub Dt:
|
03/24/2005
| | | | |
Title:
|
MIXED SIGNAL INTEGRATED CIRCUIT WITH IMPROVED ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
10978755
|
Filing Dt:
|
11/01/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
SERIAL DATA LINK USING DECISION FEEDBACK EQUALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10979491
|
Filing Dt:
|
11/02/2004
|
Publication #:
|
|
Pub Dt:
|
03/24/2005
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
10980373
|
Filing Dt:
|
11/03/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
SERIAL ATTACHED SMALL COMPUTER SYSTEM INTERFACE (SAS) CONNECTION EMULATION FOR DIRECT ATTACHED SERIAL ADVANCED TECHNOLOGY ATTACHEMNT (SATA)
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10980945
|
Filing Dt:
|
11/03/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
METHOD OF WAFER PATTERNING FOR REDUCING EDGE EXCLUSION ZONE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
10981175
|
Filing Dt:
|
11/03/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
LATERAL DOUBLE DIFFUSED MOS TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10981309
|
Filing Dt:
|
11/04/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
CONCATENATED ITERATIVE AND ALGEBRAIC CODING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
10981327
|
Filing Dt:
|
11/04/2004
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
DIGITAL AUTOMATIC GAIN CONTROL OF A MULTILEVEL OPTICAL DISC READ SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
10983485
|
Filing Dt:
|
11/08/2004
|
Publication #:
|
|
Pub Dt:
|
05/12/2005
| | | | |
Title:
|
SET-ASSOCIATIVE MEMORY ARCHITECTURE FOR ROUTING TABLES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
10983888
|
Filing Dt:
|
11/08/2004
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
SELECTABLE SIDEBAND TRANSMISSION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
10984115
|
Filing Dt:
|
11/08/2004
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
METHOD OF ASSOCIATING TIMING VIOLATIONS WITH CRITICAL STRUCTURES IN AN INTEGRATED CIRCUIT DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
10985289
|
Filing Dt:
|
11/10/2004
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
DELAY LOCKED LOOP HAVING INTERNAL TEST PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/2009
|
Application #:
|
10986732
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
DUAL PORT SERIAL ADVANCED TECHNOLOGY ATTACHMENT (SATA) DISK DRIVE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2005
|
Application #:
|
10987240
|
Filing Dt:
|
11/12/2004
|
Title:
|
METHOD AND APPARATUS FOR DYNAMICALLY BIASING SWITCHING ELEMENTS IN CURRENT-STEERING DAC
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10987356
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR SELF-ADJUSTING INPUT DELAY IN DDR-BASED MEMORY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10988071
|
Filing Dt:
|
11/13/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
TEMPERATURE COMPENSATED FET CONSTANT CURRENT SOURCE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10988081
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHOD AND SYSTEM OF GENERIC IMPLEMENTATION OF SHARING TEST PINS WITH I/O CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
10988083
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR SUPPRESSING CROSSTALK GLITCH IN DIGITAL CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
10988103
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
OVERVOLTAGE TOLERANT INPUT BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
10988122
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
USE OF A KNOWN COMMON-MODE VOLTAGE FOR INPUT OVERVOLTAGE PROTECTION IN PSEUDO-DIFFERENTIAL RECEIVERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10988156
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR SUMMING DC VOLTAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
10989698
|
Filing Dt:
|
11/16/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND/OR METHOD FOR IMPLEMENTING EFFICIENT TECHNIQUES FOR TESTING COMMON INFORMATION MODEL PROVIDERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
10990143
|
Filing Dt:
|
11/16/2004
|
Publication #:
|
|
Pub Dt:
|
07/28/2005
| | | | |
Title:
|
TRANSMISSION METHOD AND APPARATUS IN A MULTIPLE ANTENNA COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10990237
|
Filing Dt:
|
11/16/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
MEMORY TILING ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10990368
|
Filing Dt:
|
11/18/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
FREQUENCY SELECTION USING CAPACITANCE MULTIPLICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2009
|
Application #:
|
10990910
|
Filing Dt:
|
11/17/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
REDUCED-COMPLEXITY MULTIPLE-INPUT, MULTIPLE-OUTPUT DETECTION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10991002
|
Filing Dt:
|
11/17/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
System and method for interactive monitoring of satellite radio use
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
10991107
|
Filing Dt:
|
11/17/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR REDUCING INTER-LAYER CAPACITANCE IN INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2009
|
Application #:
|
10991844
|
Filing Dt:
|
11/18/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
TRANSMIT/RECEIVE DATA PATHS FOR VOICE-OVER-INTERNET (VOIP) COMMUNICATION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
10991903
|
Filing Dt:
|
11/18/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHODS AND STRUCTURE FOR BYPASSING MEMORY MANAGEMENT MAPPING AND TRANSLATION FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
10992316
|
Filing Dt:
|
11/18/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR TESTING A SERVO CIRCUIT OF A READ/WRITE HEAD SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10992389
|
Filing Dt:
|
11/17/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
METHOD AND TEST APPARATUS FOR TESTING INTEGRATED CIRCUITS USING BOTH VALID AND INVALID TEST DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10992941
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHOD OF SELECTING CELLS IN LOGIC RESTRUCTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10992999
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
MULTIPLE BUFFER INSERTION IN GLOBAL ROUTING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
10993283
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHODS AND STRUCTURES FOR EFFICIENT STORAGE OF TASK FILE INFORMATION IN SERIAL ATA ENVIRONMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
10993303
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
09/15/2005
| | | | |
Title:
|
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR OVER-THE-AIR DOWNLOAD TO SATELLITE RADIO
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
10993378
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
ADAPTIVE MODEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2009
|
Application #:
|
10993542
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHODS AND APPARATUS FOR INTERFACE BUFFER MANAGEMENT AND CLOCK COMPENSATION IN DATA TRANSFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10993603
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
07/14/2005
| | | | |
Title:
|
PROCESS AND APPARATUS FOR GENERATING A STRONG PHASE SHIFT OPTICAL PATTERN FOR USE IN AN OPTICAL DIRECT WRITE LITHOGRAPHY PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
10994114
|
Filing Dt:
|
11/19/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHOD OF ESTIMATING A TOTAL PATH DELAY IN AN INTEGRATED CIRCUIT DESIGN WITH STOCHASTICALLY WEIGHTED CONSERVATISM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
10995777
|
Filing Dt:
|
11/23/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
VIRTUAL DATA REPRESENTATION THROUGH SELECTIVE BIDIRECTIONAL TRANSLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10996074
|
Filing Dt:
|
11/23/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHOD TO SELECTIVELY IDENTIFY AT RISK DIE BASED ON LOCATION WITHIN THE RETICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
10997006
|
Filing Dt:
|
11/24/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
METHOD AND/OR APPARATUS FOR PARSING COMPRESSED VIDEO BITSTREAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10997630
|
Filing Dt:
|
11/24/2004
|
Publication #:
|
|
Pub Dt:
|
05/25/2006
| | | | |
Title:
|
LEADFRAME DESIGNS FOR INTEGRATED CIRCUIT PLASTIC PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
10998679
|
Filing Dt:
|
11/29/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
MULTILEVEL AMPLITUDE MODULATED SIGNALING IN FIBRE CHANNEL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10998686
|
Filing Dt:
|
11/29/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
FRAME MAPPING SCHEDULER WITH COMPRESSED MAPPING TABLE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10999162
|
Filing Dt:
|
11/29/2004
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR AUTOMATIC CHANGE OF AN OPERATING CHANNEL IN A WIRELESS COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2008
|
Application #:
|
10999468
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
VERIFICATION OF RRAM TILING NETLIST
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10999481
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
RRAM COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10999493
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
METHOD AND BIST ARCHITECTURE FOR FAST MEMORY TESTING IN PLATFORM-BASED INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
10999673
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
MULTI-INPUT GAIN CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
10999703
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR IMPROVED DATA CHANNEL TRANSMISSION IN A DIGITAL NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10999704
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING IMPROVED POWER DENSITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
10999705
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
DUAL-GATE METAL-OXIDE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
10999720
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
MASTER CONTROLLER ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
10999825
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
PARALLEL VIDEO ENCODER WITH WHOLE PICTURE DEBLOCKING AND/OR WHOLE PICTURE COMPRESSED AS A SINGLE SLICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10999889
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
VOLTAGE CONTROLLED DELAY LOOP WITH CENTRAL INTERPOLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2011
|
Application #:
|
10999900
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
VOLTAGE CONTROLLED DELAY LOOP AND METHOD WITH INJECTION POINT CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2008
|
Application #:
|
10999904
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
METHODS AND APPARATUS FOR PREVENTING A THIRD PARTY FROM OVERHEARING A TELEPHONE CONVERSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
11000104
|
Filing Dt:
|
11/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
RRAM MEMORY TIMING LEARNING TOOL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
11000772
|
Filing Dt:
|
12/01/2004
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
PROCESS INDEPENDENT ALIGNMENT MARKS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11002576
|
Filing Dt:
|
12/01/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
AUTOMATIC RECOGNITION OF GEOMETRIC POINTS IN A TARGET IC DESIGN FOR OPC MASK QUALITY CALCULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11002656
|
Filing Dt:
|
12/03/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
ADAPTIVE POWER MANAGEMENT IN PORTABLE ENTERTAINMENT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
11003309
|
Filing Dt:
|
12/03/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
POWER MESH FOR MULTIPLE FREQUENCY OPERATION OF SEMICONDUCTOR PRODUCTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
11004309
|
Filing Dt:
|
12/03/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
RAMPTIME PROPAGATION ON DESIGNS WITH CYCLES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2008
|
Application #:
|
11004415
|
Filing Dt:
|
12/03/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
ON-CHIP AUTOMATIC PROCESS VARIATION, SUPPLY VOLTAGE VARIATION, AND TEMPERATURE DEVIATION (PVT) COMPENSATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
11005690
|
Filing Dt:
|
12/07/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
INTERCONNECT INTEGRITY VERIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2007
|
Application #:
|
11005765
|
Filing Dt:
|
12/06/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
REDUCED CAPACITANCE RESISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11006349
|
Filing Dt:
|
12/06/2004
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
METHOD AND TIMING HARNESS FOR SYSTEM LEVEL STATIC TIMING ANALYSIS
|
|