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Reel/Frame:056927/0038   Pages: 40
Recorded: 07/20/2021
Attorney Dkt #:SPIN BULK ASSIGN TO CREDI
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 201
Page 1 of 3
Pages: 1 2 3
1
Patent #:
9263667
Issue Dt:
02/16/2016
Application #:
14341185
Filing Dt:
07/25/2014
Publication #:
US20160027999
Pub Dt:
01/28/2016
Title:
METHOD FOR MANUFACTURING MTJ MEMORY DEVICE
2
Patent #:
9337412
Issue Dt:
05/10/2016
Application #:
14492943
Filing Dt:
09/22/2014
Publication #:
US20160087193
Pub Dt:
03/24/2016
Title:
MAGNETIC TUNNEL JUNCTION STRUCTURE FOR MRAM DEVICE
3
Patent #:
9853206
Issue Dt:
12/26/2017
Application #:
14814036
Filing Dt:
07/30/2015
Publication #:
US20160372656
Pub Dt:
12/22/2016
Title:
PRECESSIONAL SPIN CURRENT STRUCTURE FOR MRAM
4
Patent #:
9728712
Issue Dt:
08/08/2017
Application #:
14866359
Filing Dt:
09/25/2015
Publication #:
US20160315249
Pub Dt:
10/27/2016
Title:
SPIN TRANSFER TORQUE STRUCTURE FOR MRAM DEVICES HAVING A SPIN CURRENT INJECTION CAPPING LAYER
5
Patent #:
9406876
Issue Dt:
08/02/2016
Application #:
15041325
Filing Dt:
02/11/2016
Publication #:
US20160163973
Pub Dt:
06/09/2016
Title:
METHOD FOR MANUFACTURING MTJ MEMORY DEVICE
6
Patent #:
10468590
Issue Dt:
11/05/2019
Application #:
15091853
Filing Dt:
04/06/2016
Publication #:
US20160315118
Pub Dt:
10/27/2016
Title:
HIGH ANNEALING TEMPERATURE PERPENDICULAR MAGNETIC ANISOTROPY STRUCTURE FOR MAGNETIC RANDOM ACCESS MEMORY
7
Patent #:
9773974
Issue Dt:
09/26/2017
Application #:
15097576
Filing Dt:
04/13/2016
Publication #:
US20170033283
Pub Dt:
02/02/2017
Title:
POLISHING STOP LAYER(S) FOR PROCESSING ARRAYS OF SEMICONDUCTOR ELEMENTS
8
Patent #:
10115446
Issue Dt:
10/30/2018
Application #:
15132544
Filing Dt:
04/19/2016
Title:
SPIN TRANSFER TORQUE MRAM DEVICE WITH ERROR BUFFER
9
Patent #:
9741926
Issue Dt:
08/22/2017
Application #:
15157783
Filing Dt:
05/18/2016
Publication #:
US20170222132
Pub Dt:
08/03/2017
Title:
MEMORY CELL HAVING MAGNETIC TUNNEL JUNCTION AND THERMAL STABILITY ENHANCEMENT LAYER
10
Patent #:
10163479
Issue Dt:
12/25/2018
Application #:
15174482
Filing Dt:
06/06/2016
Publication #:
US20170047107
Pub Dt:
02/16/2017
Title:
METHOD AND APPARATUS FOR BIPOLAR MEMORY WRITE-VERIFY
11
Patent #:
10366774
Issue Dt:
07/30/2019
Application #:
15277799
Filing Dt:
09/27/2016
Publication #:
US20180090226
Pub Dt:
03/29/2018
Title:
DEVICE WITH DYNAMIC REDUNDANCY REGISTERS
12
Patent #:
10672976
Issue Dt:
06/02/2020
Application #:
15445260
Filing Dt:
02/28/2017
Publication #:
US20180248113
Pub Dt:
08/30/2018
Title:
PRECESSIONAL SPIN CURRENT STRUCTURE WITH HIGH IN-PLANE MAGNETIZATION FOR MRAM
13
Patent #:
10665777
Issue Dt:
05/26/2020
Application #:
15445362
Filing Dt:
02/28/2017
Publication #:
US20180248110
Pub Dt:
08/30/2018
Title:
PRECESSIONAL SPIN CURRENT STRUCTURE WITH NON-MAGNETIC INSERTION LAYER FOR MRAM
14
Patent #:
10032978
Issue Dt:
07/24/2018
Application #:
15634629
Filing Dt:
06/27/2017
Title:
MRAM WITH REDUCED STRAY MAGNETIC FIELDS
15
Patent #:
10381553
Issue Dt:
08/13/2019
Application #:
15656398
Filing Dt:
07/21/2017
Publication #:
US20170324029
Pub Dt:
11/09/2017
Title:
MEMORY CELL HAVING MAGNETIC TUNNEL JUNCTION AND THERMAL STABILITY ENHANCEMENT LAYER
16
Patent #:
10147872
Issue Dt:
12/04/2018
Application #:
15657498
Filing Dt:
07/24/2017
Publication #:
US20170331033
Pub Dt:
11/16/2017
Title:
SPIN TRANSFER TORQUE STRUCTURE FOR MRAM DEVICES HAVING A SPIN CURRENT INJECTION CAPPING LAYER
17
Patent #:
10777736
Issue Dt:
09/15/2020
Application #:
15674620
Filing Dt:
08/11/2017
Publication #:
US20170346002
Pub Dt:
11/30/2017
Title:
POLISHING STOP LAYER(S) FOR PROCESSING ARRAYS OF SEMICONDUCTOR ELEMENTS
18
Patent #:
10347314
Issue Dt:
07/09/2019
Application #:
15691577
Filing Dt:
08/30/2017
Publication #:
US20170365317
Pub Dt:
12/21/2017
Title:
METHOD AND APPARATUS FOR BIPOLAR MEMORY WRITE-VERIFY
19
Patent #:
10529439
Issue Dt:
01/07/2020
Application #:
15792672
Filing Dt:
10/24/2017
Publication #:
US20190122746
Pub Dt:
04/25/2019
Title:
ON-THE-FLY BIT FAILURE DETECTION AND BIT REDUNDANCY REMAPPING TECHNIQUES TO CORRECT FOR FIXED BIT DEFECTS
20
Patent #:
10026892
Issue Dt:
07/17/2018
Application #:
15794871
Filing Dt:
10/26/2017
Publication #:
US20180047894
Pub Dt:
02/15/2018
Title:
PRECESSIONAL SPIN CURRENT STRUCTURE FOR MRAM
21
Patent #:
10424393
Issue Dt:
09/24/2019
Application #:
15849404
Filing Dt:
12/20/2017
Publication #:
US20180114589
Pub Dt:
04/26/2018
Title:
METHOD OF READING DATA FROM A MEMORY DEVICE USING MULTIPLE LEVELS OF DYNAMIC REDUNDANCY REGISTERS
22
Patent #:
10366775
Issue Dt:
07/30/2019
Application #:
15849457
Filing Dt:
12/20/2017
Publication #:
US20180114590
Pub Dt:
04/26/2018
Title:
A MEMORY DEVICE USING LEVELS OF DYNAMIC REDUNDANCY REGISTERS FOR WRITING A DATA WORD THAT FAILED A WRITE OPERATION
23
Patent #:
10236075
Issue Dt:
03/19/2019
Application #:
15851593
Filing Dt:
12/21/2017
Title:
PREDICTING TUNNEL BARRIER ENDURANCE USING REDUNDANT MEMORY STRUCTURES
24
Patent #:
10437491
Issue Dt:
10/08/2019
Application #:
15855263
Filing Dt:
12/27/2017
Publication #:
US20180121117
Pub Dt:
05/03/2018
Title:
A METHOD OF PROCESSING INCOMPLETE MEMORY OPERATIONS IN A MEMORY DEVICE DURING A POWER UP SEQUENCE AND A POWER DOWN SEQUENCE USING A DYNAMIC REDUNDANCY REGISTER
25
Patent #:
10437723
Issue Dt:
10/08/2019
Application #:
15855431
Filing Dt:
12/27/2017
Publication #:
US20180121355
Pub Dt:
05/03/2018
Title:
METHOD OF FLUSHING THE CONTENTS OF A DYNAMIC REDUNDANCY REGISTER TO A SECURE STORAGE AREA DURING A POWER DOWN IN A MEMORY DEVICE
26
Patent #:
10360964
Issue Dt:
07/23/2019
Application #:
15855589
Filing Dt:
12/27/2017
Publication #:
US20180122447
Pub Dt:
05/03/2018
Title:
METHOD OF WRITING CONTENTS IN MEMORY DURING A POWER UP SEQUENCE USING A DYNAMIC REDUNDANCY REGISTER IN A MEMORY DEVICE
27
Patent #:
10679685
Issue Dt:
06/09/2020
Application #:
15855660
Filing Dt:
12/27/2017
Publication #:
US20190198078
Pub Dt:
06/27/2019
Title:
SHARED BIT LINE ARRAY ARCHITECTURE FOR MAGNETORESISTIVE MEMORY
28
Patent #:
10446210
Issue Dt:
10/15/2019
Application #:
15855707
Filing Dt:
12/27/2017
Publication #:
US20180122448
Pub Dt:
05/03/2018
Title:
MEMORY INSTRUCTION PIPELINE WITH A PRE-READ STAGE FOR A WRITE OPERATION FOR REDUCING POWER CONSUMPTION IN A MEMORY DEVICE THAT USES DYNAMIC REDUNDANCY REGISTERS
29
Patent #:
10684310
Issue Dt:
06/16/2020
Application #:
15855757
Filing Dt:
12/27/2017
Publication #:
US20190195914
Pub Dt:
06/27/2019
Title:
Magnetic Field Transducer Mounting Apparatus for MTJ Device Testers
30
Patent #:
10962590
Issue Dt:
03/30/2021
Application #:
15855799
Filing Dt:
12/27/2017
Publication #:
US20190195944
Pub Dt:
06/27/2019
Title:
Magnet Mounting Apparatus for MTJ Device Testers
31
Patent #:
10192601
Issue Dt:
01/29/2019
Application #:
15855811
Filing Dt:
12/27/2017
Publication #:
US20180122449
Pub Dt:
05/03/2018
Title:
MEMORY INSTRUCTION PIPELINE WITH AN ADDITIONAL WRITE STAGE IN A MEMORY DEVICE THAT USES DYNAMIC REDUNDANCY REGISTERS
32
Patent #:
10192602
Issue Dt:
01/29/2019
Application #:
15855855
Filing Dt:
12/27/2017
Publication #:
US20180122450
Pub Dt:
05/03/2018
Title:
SMART CACHE DESIGN TO PREVENT OVERFLOW FOR A MEMORY DEVICE WITH A DYNAMIC REDUNDANCY REGISTER
33
Patent #:
10481976
Issue Dt:
11/19/2019
Application #:
15855866
Filing Dt:
12/27/2017
Publication #:
US20190121692
Pub Dt:
04/25/2019
Title:
FORCING BITS AS BAD TO WIDEN THE WINDOW BETWEEN THE DISTRIBUTIONS OF ACCEPTABLE HIGH AND LOW RESISTIVE BITS THEREBY LOWERING THE MARGIN AND INCREASING THE SPEED OF THE SENSE AMPLIFIERS
34
Patent #:
10489245
Issue Dt:
11/26/2019
Application #:
15855886
Filing Dt:
12/27/2017
Publication #:
US20190121693
Pub Dt:
04/25/2019
Title:
FORCING STUCK BITS, WATERFALL BITS, SHUNT BITS AND LOW TMR BITS TO SHORT DURING TESTING AND USING ON-THE-FLY BIT FAILURE DETECTION AND BIT REDUNDANCY REMAPPING TECHNIQUES TO CORRECT THEM
35
Patent #:
10628316
Issue Dt:
04/21/2020
Application #:
15855907
Filing Dt:
12/27/2017
Publication #:
US20180121361
Pub Dt:
05/03/2018
Title:
MEMORY DEVICE WITH A PLURALITY OF MEMORY BANKS WHERE EACH MEMORY BANK IS ASSOCIATED WITH A CORRESPONDING MEMORY INSTRUCTION PIPELINE AND A DYNAMIC REDUNDANCY REGISTER
36
Patent #:
10656994
Issue Dt:
05/19/2020
Application #:
15855910
Filing Dt:
12/27/2017
Publication #:
US20190121694
Pub Dt:
04/25/2019
Title:
OVER-VOLTAGE WRITE OPERATION OF TUNNEL MAGNET-RESISTANCE ("TMR") MEMORY DEVICE AND CORRECTING FAILURE BITS THEREFROM BY USING ON-THE-FLY BIT FAILURE DETECTION AND BIT REDUNDANCY REMAPPING TECHNIQUES
37
Patent #:
10460781
Issue Dt:
10/29/2019
Application #:
15855948
Filing Dt:
12/27/2017
Publication #:
US20180122446
Pub Dt:
05/03/2018
Title:
MEMORY DEVICE WITH A DUAL Y-MULTIPLEXER STRUCTURE FOR PERFORMING TWO SIMULTANEOUS OPERATIONS ON THE SAME ROW OF A MEMORY BANK
38
Patent #:
10243021
Issue Dt:
03/26/2019
Application #:
15855953
Filing Dt:
12/27/2017
Title:
STEEP SLOPE FIELD-EFFECT TRANSISTOR (FET) FOR A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ)
39
Patent #:
10395711
Issue Dt:
08/27/2019
Application #:
15857220
Filing Dt:
12/28/2017
Publication #:
US20190206470
Pub Dt:
07/04/2019
Title:
PERPENDICULAR SOURCE AND BIT LINES FOR AN MRAM ARRAY
40
Patent #:
10891997
Issue Dt:
01/12/2021
Application #:
15857241
Filing Dt:
12/28/2017
Publication #:
US20190206471
Pub Dt:
07/04/2019
Title:
MEMORY ARRAY WITH HORIZONTAL SOURCE LINE AND A VIRTUAL SOURCE LINE
41
Patent #:
10395712
Issue Dt:
08/27/2019
Application #:
15857264
Filing Dt:
12/28/2017
Publication #:
US20190206473
Pub Dt:
07/04/2019
Title:
MEMORY ARRAY WITH HORIZONTAL SOURCE LINE AND SACRIFICIAL BITLINE PER VIRTUAL SOURCE
42
Patent #:
10360962
Issue Dt:
07/23/2019
Application #:
15857296
Filing Dt:
12/28/2017
Publication #:
US20190206467
Pub Dt:
07/04/2019
Title:
MEMORY ARRAY WITH INDIVIDUALLY TRIMMABLE SENSE AMPLIFIERS
43
Patent #:
10424726
Issue Dt:
09/24/2019
Application #:
15857318
Filing Dt:
12/28/2017
Publication #:
US20190207100
Pub Dt:
07/04/2019
Title:
PROCESS FOR IMPROVING PHOTORESIST PILLAR ADHESION DURING MRAM FABRICATION
44
Patent #:
10811594
Issue Dt:
10/20/2020
Application #:
15857351
Filing Dt:
12/28/2017
Publication #:
US20190207080
Pub Dt:
07/04/2019
Title:
PROCESS FOR HARD MASK DEVELOPMENT FOR MRAM PILLAR FORMATION USING PHOTOLITHOGRAPHY
45
Patent #:
10347822
Issue Dt:
07/09/2019
Application #:
15857358
Filing Dt:
12/28/2017
Publication #:
US20190207081
Pub Dt:
07/04/2019
Title:
FABRICATION METHODS OF FORMING CYLINDRICAL VERTICAL SI ETCHED CHANNEL 3D SWITCHING DEVICES
46
Patent #:
10516094
Issue Dt:
12/24/2019
Application #:
15857382
Filing Dt:
12/28/2017
Publication #:
US20190207082
Pub Dt:
07/04/2019
Title:
PROCESS FOR CREATING DENSE PILLARS USING MULTIPLE EXPOSURES FOR MRAM FABRICATION
47
Patent #:
10468293
Issue Dt:
11/05/2019
Application #:
15857387
Filing Dt:
12/28/2017
Publication #:
US20190206716
Pub Dt:
07/04/2019
Title:
METHODS OF FORMING PERPENDICULAR MAGNETIC TUNNEL JUNCTION MEMORY CELLS HAVING VERTICAL CHANNELS
48
Patent #:
10347311
Issue Dt:
07/09/2019
Application #:
15857430
Filing Dt:
12/28/2017
Publication #:
US20190206461
Pub Dt:
07/04/2019
Title:
CYLINDRICAL VERTICAL SI ETCHED CHANNEL 3D SWITCHING DEVICES
49
Patent #:
10541268
Issue Dt:
01/21/2020
Application #:
15857574
Filing Dt:
12/28/2017
Publication #:
US20190206931
Pub Dt:
07/04/2019
Title:
Three-Dimensional Magnetic Memory Devices
50
Patent #:
10546624
Issue Dt:
01/28/2020
Application #:
15858398
Filing Dt:
12/29/2017
Publication #:
US20190206468
Pub Dt:
07/04/2019
Title:
MULTI-PORT RANDOM ACCESS MEMORY
51
Patent #:
10797233
Issue Dt:
10/06/2020
Application #:
15858765
Filing Dt:
12/29/2017
Publication #:
US20190207102
Pub Dt:
07/04/2019
Title:
Methods of Fabricating Three-Dimensional Magnetic Memory Devices
52
Patent #:
10326073
Issue Dt:
06/18/2019
Application #:
15858808
Filing Dt:
12/29/2017
Publication #:
US20190207084
Pub Dt:
07/04/2019
Title:
Spin Hall Effect (SHE) Assisted Three-Dimensional Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM)
53
Patent #:
10360961
Issue Dt:
07/23/2019
Application #:
15858950
Filing Dt:
12/29/2017
Publication #:
US20190206462
Pub Dt:
07/04/2019
Title:
AC CURRENT PRE-CHARGE WRITE-ASSIST IN ORTHOGONAL STT-MRAM
54
Patent #:
10270027
Issue Dt:
04/23/2019
Application #:
15858988
Filing Dt:
12/29/2017
Title:
SELF-GENERATING AC CURRENT ASSIST IN ORTHOGONAL STT-MRAM
55
Patent #:
10236047
Issue Dt:
03/19/2019
Application #:
15859015
Filing Dt:
12/29/2017
Title:
SHARED OSCILLATOR (STNO) FOR MRAM ARRAY WRITE-ASSIST IN ORTHOGONAL STT-MRAM
56
Patent #:
10236048
Issue Dt:
03/19/2019
Application #:
15859030
Filing Dt:
12/29/2017
Title:
AC CURRENT WRITE-ASSIST IN ORTHOGONAL STT-MRAM
57
Patent #:
10460778
Issue Dt:
10/29/2019
Application #:
15859040
Filing Dt:
12/29/2017
Publication #:
US20190206463
Pub Dt:
07/04/2019
Title:
PERPENDICULAR MAGNETIC TUNNEL JUNCTION MEMORY CELLS HAVING SHARED SOURCE CONTACTS
58
Patent #:
10199083
Issue Dt:
02/05/2019
Application #:
15859047
Filing Dt:
12/29/2017
Title:
THREE-TERMINAL MRAM WITH AC WRITE-ASSIST FOR LOW READ DISTURB
59
Patent #:
10629649
Issue Dt:
04/21/2020
Application #:
15859070
Filing Dt:
12/29/2017
Publication #:
US20190206932
Pub Dt:
07/04/2019
Title:
METHOD OF MAKING A THREE DIMENSIONAL PERPENDICULAR MAGNETIC TUNNEL JUNCTION WITH THIN-FILM TRANSISTOR
60
Patent #:
10790333
Issue Dt:
09/29/2020
Application #:
15859074
Filing Dt:
12/29/2017
Publication #:
US20190206933
Pub Dt:
07/04/2019
Title:
FLEXIBLE SUBSTRATE FOR USE WITH A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ)
61
Patent #:
10355045
Issue Dt:
07/16/2019
Application #:
15859114
Filing Dt:
12/29/2017
Publication #:
US20190206934
Pub Dt:
07/04/2019
Title:
THREE DIMENSIONAL PERPENDICULAR MAGNETIC JUNCTION WITH THIN-FILM TRANSISTOR
62
Patent #:
10840439
Issue Dt:
11/17/2020
Application #:
15859133
Filing Dt:
12/29/2017
Publication #:
US20190207103
Pub Dt:
07/04/2019
Title:
MAGNETIC TUNNEL JUNCTION (MTJ) FABRICATION METHODS AND SYSTEMS
63
Patent #:
10355046
Issue Dt:
07/16/2019
Application #:
15859139
Filing Dt:
12/29/2017
Publication #:
US20190206935
Pub Dt:
07/04/2019
Title:
Vertical Steep-Slope Field-Effect Transistor (I-MOSFET) with Offset Gate Electrode for Driving a Perpendicular Magnetic Tunnel Junction (PMTJ)
64
Patent #:
10388853
Issue Dt:
08/20/2019
Application #:
15859141
Filing Dt:
12/29/2017
Publication #:
US20190207085
Pub Dt:
07/04/2019
Title:
Magnetic Memory having a Pinning Synthetic Antiferromagnetic Structure (SAF) with Cobalt over Platinum (Pt/Co) Bilayers
65
Patent #:
10886330
Issue Dt:
01/05/2021
Application #:
15859150
Filing Dt:
12/29/2017
Publication #:
US20190206936
Pub Dt:
07/04/2019
Title:
Memory Device having Overlapping Magnetic Tunnel Junctions in Compliance with a Reference Pitch
66
Patent #:
10424357
Issue Dt:
09/24/2019
Application #:
15859157
Filing Dt:
12/29/2017
Publication #:
US20190206464
Pub Dt:
07/04/2019
Title:
MAGNETIC TUNNEL JUNCTION (MTJ) MEMORY DEVICE HAVING A COMPOSITE FREE MAGNETIC LAYER
67
Patent #:
10367136
Issue Dt:
07/30/2019
Application #:
15859162
Filing Dt:
12/29/2017
Publication #:
US20190207086
Pub Dt:
07/04/2019
Title:
Methods for Manufacturing a Perpendicular Magnetic Tunnel Junction (p-MTJ) MRAM having a Precessional Spin Current Injection (PSC) Structure
68
Patent #:
10374153
Issue Dt:
08/06/2019
Application #:
15859171
Filing Dt:
12/29/2017
Publication #:
US20190207104
Pub Dt:
07/04/2019
Title:
Method for Manufacturing a Magnetic Memory Device by Pre-Patterning a Bottom Electrode prior to Patterning a Magnetic Material
69
Patent #:
10840436
Issue Dt:
11/17/2020
Application #:
15859195
Filing Dt:
12/29/2017
Publication #:
US20190207095
Pub Dt:
07/04/2019
Title:
PERPENDICULAR MAGNETIC ANISOTROPY INTERFACE TUNNEL JUNCTION DEVICES AND METHODS OF MANUFACTURE
70
Patent #:
10355047
Issue Dt:
07/16/2019
Application #:
15859222
Filing Dt:
12/29/2017
Publication #:
US20190206937
Pub Dt:
07/04/2019
Title:
FABRICATION METHODS OF FORMING ANNULAR VERTICAL SI ETCHED CHANNEL MOS DEVICES
71
Patent #:
10651370
Issue Dt:
05/12/2020
Application #:
15859224
Filing Dt:
12/29/2017
Publication #:
US20190207096
Pub Dt:
07/04/2019
Title:
PERPENDICULAR MAGNETIC TUNNEL JUNCTION RETENTION AND ENDURANCE IMPROVEMENT
72
Patent #:
10367139
Issue Dt:
07/30/2019
Application #:
15859230
Filing Dt:
12/29/2017
Publication #:
US20190207105
Pub Dt:
07/04/2019
Title:
METHODS OF MANUFACTURING MAGNETIC TUNNEL JUNCTION DEVICES
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10784439
Issue Dt:
09/22/2020
Application #:
15859243
Filing Dt:
12/29/2017
Publication #:
US20190207097
Pub Dt:
07/04/2019
Title:
PRECESSIONAL SPIN CURRENT MAGNETIC TUNNEL JUNCTION DEVICES AND METHODS OF MANUFACTURE
74
Patent #:
10438999
Issue Dt:
10/08/2019
Application #:
15859245
Filing Dt:
12/29/2017
Publication #:
US20190206938
Pub Dt:
07/04/2019
Title:
ANNULAR VERTICAL SI ETCHED CHANNEL MOS DEVICES
75
Patent #:
10424723
Issue Dt:
09/24/2019
Application #:
15859249
Filing Dt:
12/29/2017
Publication #:
US20190207087
Pub Dt:
07/04/2019
Title:
MAGNETIC TUNNEL JUNCTION DEVICES INCLUDING AN OPTIMIZATION LAYER
76
Patent #:
10403343
Issue Dt:
09/03/2019
Application #:
15859250
Filing Dt:
12/29/2017
Publication #:
US20190206465
Pub Dt:
07/04/2019
Title:
Systems and Methods Utilizing Serial Configurations of Magnetic Memory Devices
77
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10803916
Issue Dt:
10/13/2020
Application #:
15859256
Filing Dt:
12/29/2017
Publication #:
US20190206472
Pub Dt:
07/04/2019
Title:
Methods and Systems for Writing to Magnetic Memory Devices Utilizing Alternating Current
78
Patent #:
10347308
Issue Dt:
07/09/2019
Application #:
15859259
Filing Dt:
12/29/2017
Publication #:
US20190206939
Pub Dt:
07/04/2019
Title:
Systems and Methods Utilizing Parallel Configurations of Magnetic Memory Devices
79
Patent #:
10236439
Issue Dt:
03/19/2019
Application #:
15859374
Filing Dt:
12/30/2017
Title:
SWITCHING AND STABILITY CONTROL FOR PERPENDICULAR MAGNETIC TUNNEL JUNCTION DEVICE
80
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10141499
Issue Dt:
11/27/2018
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15859379
Filing Dt:
12/30/2017
Title:
PERPENDICULAR MAGNETIC TUNNEL JUNCTION DEVICE WITH OFFSET PRECESSIONAL SPIN CURRENT LAYER
81
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10319900
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06/11/2019
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15859381
Filing Dt:
12/30/2017
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Pub Dt:
07/04/2019
Title:
PERPENDICULAR MAGNETIC TUNNEL JUNCTION DEVICE WITH PRECESSIONAL SPIN CURRENT LAYER HAVING A MODULATED MOMENT DENSITY
82
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10339993
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07/02/2019
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15859384
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12/30/2017
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US20190206466
Pub Dt:
07/04/2019
Title:
PERPENDICULAR MAGNETIC TUNNEL JUNCTION DEVICE WITH SKYRMIONIC ASSIST LAYERS FOR FREE LAYER SWITCHING
83
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10461242
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10/29/2019
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15859449
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12/30/2017
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US20190207089
Pub Dt:
07/04/2019
Title:
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84
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10211395
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02/19/2019
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15859451
Filing Dt:
12/30/2017
Title:
METHOD FOR COMBINING NVM CLASS AND SRAM CLASS MRAM ELEMENTS ON THE SAME CHIP
85
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10916582
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02/09/2021
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15859453
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12/30/2017
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Pub Dt:
07/04/2019
Title:
VERTICALLY-STRAINED SILICON DEVICE FOR USE WITH A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ)
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10361359
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07/23/2019
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15859455
Filing Dt:
12/30/2017
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Pub Dt:
07/04/2019
Title:
MAGNETIC RANDOM ACCESS MEMORY WITH REDUCED INTERNAL OPERATING TEMPERATURE RANGE
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11329099
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05/10/2022
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15859456
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12/30/2017
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07/04/2019
Title:
MAGNETIC MEMORY CHIP HAVING NVM CLASS AND SRAM CLASS MRAM ELEMENTS ON THE SAME CHIP
88
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11264557
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03/01/2022
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15859458
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12/30/2017
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US20190207091
Pub Dt:
07/04/2019
Title:
HIGH RETENTION STORAGE LAYER USING ULTRA-LOW RA MgO PROCESS IN PERPENDICULAR MAGNETIC TUNNEL JUNCTIONS FOR MRAM DEVICES
89
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10388860
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08/20/2019
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15859459
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12/30/2017
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07/04/2019
Title:
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10374147
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08/06/2019
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15859460
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07/04/2019
Title:
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10868236
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15859464
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07/04/2019
Title:
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03/31/2020
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15859465
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12/30/2017
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07/04/2019
Title:
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10720573
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15859467
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07/04/2019
Title:
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10255962
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04/09/2019
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15859514
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12/30/2017
Title:
MICROWAVE WRITE-ASSIST IN ORTHOGONAL STT-MRAM
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10229724
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03/12/2019
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15859517
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12/30/2017
Title:
MICROWAVE WRITE-ASSIST IN SERIES-INTERCONNECTED ORTHOGONAL STT-MRAM DEVICES
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10186308
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01/22/2019
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15862495
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01/04/2018
Title:
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10468588
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11/05/2019
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15862788
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01/05/2018
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07/11/2019
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10333063
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06/25/2019
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15865066
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01/08/2018
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07/11/2019
Title:
FABRICATION OF A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ) USING BLOCK COPOLYMERS
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10186551
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01/22/2019
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15865109
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01/08/2018
Title:
BURIED TAP FOR A VERTICAL TRANSISTOR USED WITH A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ)
100
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11342498
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05/24/2022
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15865118
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01/08/2018
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US20190214552
Pub Dt:
07/11/2019
Title:
HIGH DENSITY 3D MAGNETIC RANDOM ACCESS MEMORY (MRAM) CELL INTEGRATION USING WAFER CUT AND TRANSFER
Assignor
1
SPIN MEMORY, INC.
Exec Dt:
06/25/2021
Assignee
1
SPIN (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
3945 FREEDOM CIRCLE
SUITE 560
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
ZILKA-KOTAB PC
1155 N. 1ST ST.
SUITE 105
SAN JOSE, CA 95112

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