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Patent #:
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Issue Dt:
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01/13/1987
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Application #:
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06782689
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Filing Dt:
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10/01/1985
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Title:
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FRONT END OF AN OPERATIONAL AMPLIFIER
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Patent #:
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Issue Dt:
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01/13/1987
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Application #:
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06782690
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Filing Dt:
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10/01/1985
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Title:
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FRONT END STAGE OF AN OPERATIONAL AMPLIFIER
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Patent #:
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Issue Dt:
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03/17/1987
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Application #:
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06782691
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Filing Dt:
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10/01/1985
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Title:
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PROCESS USING TUNGSTEN FOR MULTILEVEL METALLIZATION
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Patent #:
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Issue Dt:
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04/14/1987
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Application #:
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06786701
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Filing Dt:
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10/09/1985
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Title:
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INTERNALLY SYNCHRONOUS MATRIX STRUCTURE FOR USE IN EXTERNALLY ASYNCHRONOUS PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
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05/12/1987
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Application #:
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06787927
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Filing Dt:
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10/16/1985
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Title:
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FABRICATION OF VERTICAL NPN AND PNP BIPOLAR TRANSISTORS IN MONOLITHIC SUBSTRATE
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Patent #:
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Issue Dt:
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03/29/1988
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Application #:
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06788585
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Filing Dt:
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10/17/1985
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Title:
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PROGRAMMING ARRANGEMENT FOR PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
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03/29/1988
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Application #:
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06790115
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Filing Dt:
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10/22/1985
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Title:
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AUXILIARY WORD LINE DRIVER FOR EFFECTIVELY CONTROLLING PROGRAMMABILITY OF FUSIBLE LINKS
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Patent #:
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Issue Dt:
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06/02/1987
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Application #:
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06792988
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Filing Dt:
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10/30/1985
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Title:
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VARIABLE WAVELENGTH OPTICAL ALIGNMENT SYSTEM
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Patent #:
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Issue Dt:
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07/21/1987
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Application #:
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06793316
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Filing Dt:
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10/31/1985
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Title:
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COMPARATOR INPUT STAGE FOR INTERFACE WITH SIGNAL CURRENT
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Patent #:
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Issue Dt:
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01/19/1988
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Application #:
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06798242
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Filing Dt:
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11/08/1985
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Title:
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DENSE, REDUCED LEAKAGE CMOS STRUCTURE
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Patent #:
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Issue Dt:
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11/03/1987
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Application #:
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06798668
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Filing Dt:
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11/15/1985
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Title:
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CONVEYOR FOR VAPOR PHASE REFLOW SYSTEM
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Patent #:
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Issue Dt:
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07/28/1987
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Application #:
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06813718
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Filing Dt:
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12/27/1985
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Title:
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TECHNIQUE FOR INCREASING GATE-DRAIN BREAKDOWN VOLTAGE OF ION-IMPLANTED JFET
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Patent #:
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Issue Dt:
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07/26/1988
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Application #:
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06824870
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Filing Dt:
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01/31/1986
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Title:
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ESD PROTECTION TRANSISTORS
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Patent #:
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Issue Dt:
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08/29/1989
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Application #:
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06827285
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Filing Dt:
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02/07/1986
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Title:
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NON-CONTACT I/O SIGNAL TRANSMISSION IN INTEGRATED CIRCUIT PACKAGING
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Patent #:
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Issue Dt:
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05/19/1987
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Application #:
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06828186
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Filing Dt:
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02/11/1986
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Title:
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VIA METALLIZATION USING METAL FILLETS
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Patent #:
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Issue Dt:
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04/18/1989
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Application #:
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06831384
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Filing Dt:
|
01/07/1986
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Title:
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HIGH VOLTAGE LATERAL MOS STRUCTURE WITH DEPLETED TOP GATE REGION
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Patent #:
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Issue Dt:
|
10/27/1987
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Application #:
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06841297
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Filing Dt:
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03/19/1986
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Title:
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TECHNIQUE FOR ELIMINATION OF POLYSILICON STRINGERS IN DIRECT MOAT FIELD OXIDE STRUCTURE
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|
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Patent #:
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|
Issue Dt:
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10/06/1987
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Application #:
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06842267
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Filing Dt:
|
03/21/1986
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Title:
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TEST CIRCUITRY FOR TESTING FUSE LINK PROGRAMMABLE MEMORY DEVICES
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Patent #:
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Issue Dt:
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03/22/1988
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Application #:
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06842272
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Filing Dt:
|
03/21/1986
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Title:
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TEST ENABLING CIRCUIT FOR ENABLING OVERHEAD TEST CIRCUITRY IN PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
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10/27/1987
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Application #:
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06874393
|
Filing Dt:
|
06/16/1986
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Title:
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MULTIPLE-LAYER, MULTIPLE-PHASE TITANIUM/NITROGEN ADHESION/DIFFUSION BARRIER LAYER STRUCTURE FOR GOLD-BASE MICROCIRCUIT INTERCONNECTION
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Patent #:
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|
Issue Dt:
|
03/01/1988
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Application #:
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06883279
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Filing Dt:
|
07/07/1986
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Title:
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HIGH VOLTAGE IC BIPOLAR TRANSISTORS OPERABLE TO BVCBO AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
|
07/05/1988
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Application #:
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06896097
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Filing Dt:
|
08/13/1986
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Title:
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LOW NOISE CURRENT SPECTRAL DENSITY INPUT BIAS CURRENT CANCELLATION SCHEME
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Patent #:
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|
Issue Dt:
|
10/20/1987
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Application #:
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06896103
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Filing Dt:
|
08/13/1986
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Title:
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LOW POWER SENSE AMPLIFIER
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Patent #:
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|
Issue Dt:
|
03/01/1988
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Application #:
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06901841
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Filing Dt:
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08/28/1986
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Title:
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LOGIC STATE TRANSITION DETECTION CIRCUIT FOR CMOS DEVICES
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Patent #:
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Issue Dt:
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07/12/1988
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Application #:
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06903785
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Filing Dt:
|
09/05/1986
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Title:
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THERMALLY COUPLED INFORMATION TRANSMISSION ACROSS ELECTRICAL ISOLATION BOUNDARIES
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Patent #:
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|
Issue Dt:
|
07/12/1988
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Application #:
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06914524
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Filing Dt:
|
10/03/1986
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Title:
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ESD PROTECTION NETWORK FOR IGFET CIRCUITS WITH SCR PREVENTION GUARD RINGS
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Patent #:
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Issue Dt:
|
11/08/1988
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Application #:
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06917441
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Filing Dt:
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10/07/1986
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Title:
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FRONT END STAGE OF AN OPERATIONAL AMPLIFIER
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Patent #:
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|
Issue Dt:
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11/24/1987
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Application #:
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06919465
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Filing Dt:
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10/16/1986
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Title:
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DIELECTRIC FOR LASER TRIMMING
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Patent #:
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|
Issue Dt:
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11/01/1988
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Application #:
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06936609
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Filing Dt:
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12/01/1986
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Title:
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METHOD OF ENHANCING SILICON ETCHING CAPABILITY OF ALKALI HYDROXIDE THROUGH THE ADDITION OF POSITIVE VALENCE IMPURITY IONS
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|
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Patent #:
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|
Issue Dt:
|
06/28/1988
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Application #:
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06944399
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Filing Dt:
|
12/19/1986
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Title:
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REGULATOR CIRCUIT FOR CONVENTING ALTERNATING INPUT TO A CONSTANT DIRECT OUTPUT
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|
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Patent #:
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|
Issue Dt:
|
11/22/1988
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Application #:
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06947749
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Filing Dt:
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12/30/1986
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Title:
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TECHNIQUE FOR FORMING ELECTRIC FIELD SHIELDING LAYER IN OXYGEN- IMPLANTED SILICON SUBSTRATE
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Patent #:
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|
Issue Dt:
|
01/05/1988
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Application #:
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07000377
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Filing Dt:
|
01/05/1987
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Title:
|
FABRICATION OF VERTICAL NPN AND PNP BIPOLAR TRANSISTORS IN MONOLITHIC SUBSTRATE
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|
|
Patent #:
|
|
Issue Dt:
|
12/06/1988
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Application #:
|
07000778
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Filing Dt:
|
01/06/1987
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Title:
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PROCESS FOR PERFORMING VARIABLE SELECTIVITY POLYSILICON ETCH
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Patent #:
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|
Issue Dt:
|
08/02/1988
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Application #:
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07013851
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Filing Dt:
|
02/12/1987
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH PROGRAMMABLE SIGNAL INHIBITION AND INVERSION MEANS
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Patent #:
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|
Issue Dt:
|
03/21/1989
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Application #:
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07019697
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Filing Dt:
|
02/27/1987
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Title:
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METHOD FOR FORMING PLANARIZED INTERCONNECT LEVEL USING SELECTIVE DEPOSITION AND ION IMPLANTATION
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Patent #:
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|
Issue Dt:
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11/19/1991
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Application #:
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07025435
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Filing Dt:
|
03/13/1987
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Title:
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DOUBLE LEVEL CONDUCTOR STRUCTURE
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|
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Patent #:
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|
Issue Dt:
|
07/25/1989
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Application #:
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07025539
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Filing Dt:
|
03/13/1987
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Title:
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PROCESS FOR THE FABRICATION OF A VERTICAL CONTACT
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|
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Patent #:
|
|
Issue Dt:
|
02/14/1989
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Application #:
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07027940
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Filing Dt:
|
03/19/1987
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Title:
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FAST VOLTAGE REFERENCE STABILIZATION CIRCUIT
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Patent #:
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Issue Dt:
|
03/14/1989
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Application #:
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07036508
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Filing Dt:
|
04/09/1987
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Title:
|
AREA FEATURE SORTING MECHANISM FOR NEIGHBORHOOD-BASED PROXIMITY CORRECTION IN LITHOGRAPHY PROCESSING OF INTEGRATED CIRCUIT PATTERNS
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Patent #:
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Issue Dt:
|
09/13/1988
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Application #:
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07042135
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Filing Dt:
|
04/24/1987
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Title:
|
USING A RAPID THERMAL PROCESS FOR MANUFACTURING A WAFER BONDED SOI SEMICONDUCTOR
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|
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Patent #:
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|
Issue Dt:
|
12/15/1987
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Application #:
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07045526
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Filing Dt:
|
05/04/1987
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Title:
|
METHOD OF ENSURING ADHESION OF CHEMICALLY VAPOR DEPOSITED OXIDE TO GOLD INTEGRATED CIRCUIT INTERCONNECT LINES
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|
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Patent #:
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|
Issue Dt:
|
10/25/1988
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Application #:
|
07046691
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Filing Dt:
|
05/07/1987
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Title:
|
LARGE SIGNAL OUTPUT CURRENT ENHANCEMENT FOR A DIFFERENTIAL PAIR
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|
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Patent #:
|
|
Issue Dt:
|
12/15/1987
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Application #:
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07048482
|
Filing Dt:
|
05/05/1987
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Title:
|
STRUCTURE FOR HIGH BREAKDOWN PN DIODE WITH RELATIVELY HIGH SURFACE DOPING
|
|
|
Patent #:
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|
Issue Dt:
|
08/08/1989
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Application #:
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07049637
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Filing Dt:
|
05/13/1987
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Title:
|
BONDING TECHNIQUE TO JOIN TWO OR MORE SILICON WAFERS
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|
|
Patent #:
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|
Issue Dt:
|
04/18/1989
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Application #:
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07051386
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Filing Dt:
|
05/19/1987
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Title:
|
PERFORMING BINARY MULTIPLICATION USING MINIMAL PATH ALGORITHM
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|
|
Patent #:
|
|
Issue Dt:
|
06/28/1988
|
Application #:
|
07055356
|
Filing Dt:
|
05/29/1987
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Title:
|
MULTIPLE LAYER, TUNGSTEN/TITANIUM/TITANIUM NITRIDE ADHESION/DIFFUSION BARRIER LAYER STRUCTURE FOR GOLD-BASE MICROCIRCUIT INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/1989
|
Application #:
|
07057398
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Filing Dt:
|
05/12/1987
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Title:
|
SELF-ALIGNED CONTACT FOR MOS PROCESSING
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|
|
Patent #:
|
|
Issue Dt:
|
06/21/1988
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Application #:
|
07062309
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Filing Dt:
|
06/15/1987
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Title:
|
SELF-ALIGNED CONTACTS FOR BIPOLAR PROCESS
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|
|
Patent #:
|
|
Issue Dt:
|
07/25/1989
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Application #:
|
07067838
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Filing Dt:
|
06/29/1987
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Title:
|
DIELECTRIC ISOLATION PROCESS USING DOUBLE WAFER BONDING
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|
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Patent #:
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|
Issue Dt:
|
04/04/1989
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Application #:
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07075641
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Filing Dt:
|
07/20/1987
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Title:
|
CONTROLLED SWITCHING CMOS OUTPUT BUFFER
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Patent #:
|
|
Issue Dt:
|
03/13/1990
|
Application #:
|
07084556
|
Filing Dt:
|
08/11/1987
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Title:
|
TECHNIQUE FOR ELIMINATION OF POLYSILICON STRINGERS IN DIRECT MOAT FIELD OXIDE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/1990
|
Application #:
|
07092975
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Filing Dt:
|
09/02/1987
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Title:
|
DOUBLE EPITAXIAL METHOD OF FABRICATING SEMICONDUCTOR DEVICES ON BONDED WAFERS
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|
|
Patent #:
|
|
Issue Dt:
|
01/31/1989
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Application #:
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07103620
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Filing Dt:
|
09/30/1987
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Title:
|
CHIP CARRIER SOLDERING PALLET
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Patent #:
|
|
Issue Dt:
|
11/21/1989
|
Application #:
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07106071
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Filing Dt:
|
10/07/1987
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Title:
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CELL BASED ALU WITH TREE STRUCTURED CARRY, INVERTING LOGIC AND BALANCED LOADING
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|
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Patent #:
|
|
Issue Dt:
|
10/10/1989
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Application #:
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07110775
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Filing Dt:
|
10/21/1987
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Title:
|
CONDUCTIVITY-MODULATED FET WITH IMPROVED PINCH OFF-RON PERFORMANCE
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Patent #:
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Issue Dt:
|
08/08/1989
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Application #:
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07118251
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Filing Dt:
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11/09/1987
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Title:
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OPERATIONAL AMPLIFIER HAVING LOW DC CURRENT INPUT CIRCUIT
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Patent #:
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|
Issue Dt:
|
09/10/1991
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Application #:
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07124807
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Filing Dt:
|
11/24/1987
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Title:
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CELL BASED ADDER WITH TREE STRUCTURED CARRY, INVERTING LOGIC AND BALANCED LOADING
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Patent #:
|
|
Issue Dt:
|
02/28/1989
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Application #:
|
07130521
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Filing Dt:
|
12/09/1987
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Title:
|
HIGH VOLTAGE IC BIPOLAR TRANSISTORS OPERABLE TO BVCBO AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/1989
|
Application #:
|
07132186
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Filing Dt:
|
12/14/1987
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Title:
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SPEED ENHANCEMENT FOR MULTIPLIERS USING MINIMAL PATH ALGORITHM
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|
|
Patent #:
|
|
Issue Dt:
|
07/04/1989
|
Application #:
|
07143328
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Filing Dt:
|
01/13/1988
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Title:
|
METHOD OF PACKAGING A NON-CONTACT I/O SIGNAL TRANSMISSION INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/1990
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Application #:
|
07151184
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Filing Dt:
|
02/01/1988
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Title:
|
ION IMPLANTED JFET WITH SELF-ALIGNED SOURCE AND DRAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/1990
|
Application #:
|
07164342
|
Filing Dt:
|
03/04/1988
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Title:
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ISOLATED GATE MESFET AND METHOD OF MAKING AND TRIMMING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/1990
|
Application #:
|
07181718
|
Filing Dt:
|
04/14/1988
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Title:
|
SELF-PLANARIZED GOLD INTERCONNECT LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1989
|
Application #:
|
07187268
|
Filing Dt:
|
04/28/1988
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Title:
|
METHOD OF ETCHING SILICON BY ENHANCING SILICON ETCHING CAPABILITY OF ALKALLI HYDROXIDE THROUGH THE ADDITION OF POSITIVE VALENCE IMPURITY IONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/1990
|
Application #:
|
07195265
|
Filing Dt:
|
05/18/1988
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Title:
|
METHOD AND APPARATUS FOR COMPUTING SQUARE ROOTS OF BINARY NUMBERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/1990
|
Application #:
|
07195273
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Filing Dt:
|
05/18/1988
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Title:
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INTEGRATED CIRCUITS INCLUDING PHOTO-OPTICAL DEVICES AND PRESSURE TRANSDUCERS AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/1989
|
Application #:
|
07213823
|
Filing Dt:
|
06/30/1988
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Title:
|
CURRENT COMPENSATED PRECHARGED BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/1989
|
Application #:
|
07224320
|
Filing Dt:
|
07/26/1988
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Title:
|
TECHNIQUE FOR FORMING PLANARIZED GATE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/1989
|
Application #:
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07224636
|
Filing Dt:
|
07/27/1988
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Title:
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COMPENSATED CURRENT SENSING CIRCUIT
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Patent #:
|
|
Issue Dt:
|
08/21/1990
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Application #:
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07235543
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Filing Dt:
|
08/24/1988
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Title:
|
TRENCH GATE VCMOS
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Patent #:
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Issue Dt:
|
12/04/1990
|
Application #:
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07253437
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Filing Dt:
|
10/05/1988
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Title:
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HIGH BREAKDOWN ACTIVE DEVICE STRUCTURE WITH LOW SERIES RESISTANCE
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Patent #:
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Issue Dt:
|
01/30/1990
|
Application #:
|
07257015
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Filing Dt:
|
10/13/1988
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Title:
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FAST LEVEL TRANSLATOR CIRCUIT
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Patent #:
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|
Issue Dt:
|
11/07/1989
|
Application #:
|
07263189
|
Filing Dt:
|
10/27/1988
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Title:
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HIGH ACCURACY CURRENT SOURCE AND HIGH ACCURACY TRANSCONDUCTANCE STAGE
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|
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Patent #:
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Issue Dt:
|
09/11/1990
|
Application #:
|
07266756
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Filing Dt:
|
11/03/1988
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Title:
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METHOD FOR FORMING COMPLEMENTARY PATTERNS IN A SEMICONDUCTOR MATERIAL WHILE USING A SINGLE MASKING STEP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/1990
|
Application #:
|
07266812
|
Filing Dt:
|
11/03/1988
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Title:
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FAST IMAGE PROCESSING ACCELERATOR FOR REAL TIME IMAGE PROCESSING APPLICATIONS
|
|
|
Patent #:
|
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Issue Dt:
|
01/09/1990
|
Application #:
|
07271656
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Filing Dt:
|
11/16/1988
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Title:
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TRANSIMPEDANCE FOCAL PLANE PROCESSOR
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Patent #:
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Issue Dt:
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11/07/1989
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Application #:
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07272908
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Filing Dt:
|
11/18/1988
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Title:
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HIGH ACCURACY, HIGH IMPEDANCE DIFFERENTIAL TO SINGLE-ENDED CURRENT CONVERTER
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Patent #:
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|
Issue Dt:
|
07/23/1991
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Application #:
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07274176
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Filing Dt:
|
11/21/1988
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Title:
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DIELECTRIC ISOLATION FOR SOI ISLAND SIDE WALL FOR REDUCING LEAKAGE CURRENT
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Patent #:
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|
Issue Dt:
|
02/13/1990
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Application #:
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07281546
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Filing Dt:
|
12/08/1988
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Title:
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METHOD OF FABRICATION OF ISOLATED ISLANDS FOR COMPLEMENTARY BIPOLAR DEVICES
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Patent #:
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|
Issue Dt:
|
11/06/1990
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Application #:
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07282064
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Filing Dt:
|
12/09/1988
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Title:
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METHOD OF FABRICATING BACK DIFFUSED BONDED OXIDE SUBSTRATES
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Patent #:
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|
Issue Dt:
|
01/02/1990
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Application #:
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07289747
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Filing Dt:
|
12/27/1988
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Title:
|
HIGH SPEED LOW INPUT CURRENT VOLTAGE FOLLOWER STAGE
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Patent #:
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|
Issue Dt:
|
12/19/1989
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Application #:
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07289748
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Filing Dt:
|
12/27/1988
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Title:
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MEMORY WITH CACHE REGISTER INTERFACE STRUCTURE
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Patent #:
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|
Issue Dt:
|
06/13/1989
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Application #:
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07296855
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Filing Dt:
|
01/13/1989
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Title:
|
DIELECTRIC FOR LASER TRIMMING
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|
|
Patent #:
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|
Issue Dt:
|
01/30/1990
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Application #:
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07298148
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Filing Dt:
|
01/18/1989
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Title:
|
METHOD OF MAKING SILICON-ON-INSULATOR ISLANDS
|
|
|
Patent #:
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|
Issue Dt:
|
07/31/1990
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Application #:
|
07301073
|
Filing Dt:
|
01/24/1989
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Title:
|
METHOD OF MAKING CMOS WITH SHALLOW SOURCE AND DRAIN JUNCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/1989
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Application #:
|
07301835
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Filing Dt:
|
01/26/1989
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Title:
|
LOW TOP GATE RESISTANCE JFET STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/1990
|
Application #:
|
07301926
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Filing Dt:
|
01/26/1989
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Title:
|
VOLTAGE LIMITER APPARATUS WITH INHERENT LEVEL SHIFTING EMPLOYING MOSFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/1990
|
Application #:
|
07302386
|
Filing Dt:
|
02/27/1989
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Title:
|
HIGH VOLTAGE MOS STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/1991
|
Application #:
|
07306356
|
Filing Dt:
|
02/06/1989
|
Title:
|
METHOD OF EDGE DOPING SOI ISLANDS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/1990
|
Application #:
|
07307944
|
Filing Dt:
|
02/09/1989
|
Title:
|
PHOTOCURRENT COMPENSATION USING ACTIVE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/1990
|
Application #:
|
07311812
|
Filing Dt:
|
02/17/1989
|
Title:
|
IC WHICH ELIMINATES SUPPORT BIAS INFLUENCE ON DIELECTRICALLY ISOLATED COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/1990
|
Application #:
|
07313435
|
Filing Dt:
|
02/22/1989
|
Title:
|
VOLTAGE REGULATOR HAVING STAGGERED POLE-ZERO COMPENSATION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/1990
|
Application #:
|
07334148
|
Filing Dt:
|
04/06/1989
|
Title:
|
VERTICAL CONTACT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/1991
|
Application #:
|
07336632
|
Filing Dt:
|
04/10/1989
|
Title:
|
FORTH SPECIFIC LANGUAGE MICROPROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/1991
|
Application #:
|
07340705
|
Filing Dt:
|
04/20/1989
|
Title:
|
BACK-SAMPLING CHARGE REDISTRIBUTION ANALOG TO DIGITAL CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/1991
|
Application #:
|
07347574
|
Filing Dt:
|
05/05/1989
|
Title:
|
PROGRAMMABLE DELAY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/1991
|
Application #:
|
07356084
|
Filing Dt:
|
05/24/1989
|
Title:
|
ANALOG-TO-DIGITAL CONVERTER AND METHOD OF USE VITILIZIN CHARGE REDISTREBUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/1991
|
Application #:
|
07356086
|
Filing Dt:
|
05/24/1989
|
Title:
|
SEMICONDUCTOR TRANSMISSION GATE WITH CAPACITANCE COMPENSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/1990
|
Application #:
|
07356311
|
Filing Dt:
|
05/24/1989
|
Title:
|
UNITY-GAIN CMOS/SOS ZERO-OFFSET BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/1990
|
Application #:
|
07357898
|
Filing Dt:
|
05/26/1989
|
Title:
|
THIN FILM RESISTORS AND METHOD OF TRIMMING
|
|