skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:010247/0043   Pages: 14
Recorded: 09/27/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 612
Page 1 of 7
Pages: 1 2 3 4 5 6 7
1
Patent #:
Issue Dt:
11/14/1989
Application #:
05973822
Filing Dt:
12/27/1978
Title:
RADIATION HARD, HIGH EMITTER-BASE BREAKDOWN BIPOLAR TRANSISTOR
2
Patent #:
Issue Dt:
08/11/1981
Application #:
06077234
Filing Dt:
09/19/1979
Title:
METHOD OF FABRICATING LATERAL PNP TRANSISTORS ULIZING SELECTIVE DIFFUSION AND COUNTER DOPING
3
Patent #:
Issue Dt:
01/19/1982
Application #:
06081978
Filing Dt:
10/04/1979
Title:
VERTICAL FUSE AND METHOD OF FABRICATION
4
Patent #:
Issue Dt:
11/17/1981
Application #:
06082185
Filing Dt:
10/05/1979
Title:
COMPLEMENTARY IGFET BUFFER WITH IMPROVED BIPOLAR OUTPUT
5
Patent #:
Issue Dt:
11/25/1980
Application #:
06082505
Filing Dt:
10/09/1979
Title:
PROGRAMMABLE THRESHOLD SWITCHABLES RESISTIVE MEMORY CELL ARRAY
6
Patent #:
Issue Dt:
06/09/1981
Application #:
06082506
Filing Dt:
10/09/1979
Title:
TWO SWITCHABLE RESISTIVE ELEMENT PER CELL MEMORY ARRAY
7
Patent #:
Issue Dt:
09/15/1981
Application #:
06106127
Filing Dt:
12/21/1979
Title:
METHOD FOR QUALIFYING BIASED INTEGRATED CIRCUITS ON A WAFER LEVEL
8
Patent #:
Issue Dt:
04/07/1981
Application #:
06106128
Filing Dt:
12/21/1979
Title:
METHOD OF MAKING SCHOTTKY BARRIER DIODE BY IONIMPLANTATION AND IMPURITY DIFFUSION
9
Patent #:
Issue Dt:
08/04/1981
Application #:
06106339
Filing Dt:
12/21/1979
Title:
METHOD FOR QUALIFYING BIASED BURN-IN INTEGRATED CIRCUITS ON A WAFER LEVEL
10
Patent #:
Issue Dt:
03/09/1982
Application #:
06112618
Filing Dt:
01/16/1980
Title:
LOW THERMAL COEFFICIENT SEMICONDUCTOR DEVICE
11
Patent #:
Issue Dt:
12/08/1981
Application #:
06113430
Filing Dt:
01/18/1980
Title:
SYSTEM FOR SHORT CIRCUIT PROTECTION USING ELECTRONIC LOGIC IN A FEED BACK ARRANGEMENT
12
Patent #:
Issue Dt:
11/10/1981
Application #:
06124201
Filing Dt:
02/25/1980
Title:
FABRICATION OF COMPLEMENTARY BIPOLAR TRANSISTORS AND CMOS DEVICES WITH POLY GATES
13
Patent #:
Issue Dt:
10/06/1981
Application #:
06129913
Filing Dt:
03/12/1980
Title:
METHOD OF FABRICATING MESA BIPOLAR MEMORY CELL UTILIZING EPITAXIAL DEPOSITION, SUBSTRATE REMOVAL AND SPECIAL METALLIZATION
14
Patent #:
Issue Dt:
06/15/1982
Application #:
06141100
Filing Dt:
04/17/1980
Title:
METHOD OF SOLDER REFLOW ASSEMBLY
15
Patent #:
Issue Dt:
09/22/1981
Application #:
06141504
Filing Dt:
04/18/1980
Title:
METHOD OF FABRICATING SURFACE CONTACTS FOR BURIED LAYER INTO DIELECTRIC ISOLATED ISLANDS
16
Patent #:
Issue Dt:
10/11/1983
Application #:
06159750
Filing Dt:
06/16/1980
Title:
METHOD OF SERIALIZATION OF DICE
17
Patent #:
Issue Dt:
01/11/1983
Application #:
06170291
Filing Dt:
07/18/1980
Title:
DIFFERENTIAL LINEAR TO DIGITAL TRANSLATOR
18
Patent #:
Issue Dt:
08/30/1983
Application #:
06190515
Filing Dt:
09/25/1980
Title:
RADIATION HARDENED-SELF ALIGNED CMOS AND METHOD OF FABRICATION
19
Patent #:
Issue Dt:
06/02/1987
Application #:
06200386
Filing Dt:
10/24/1980
Title:
FABRICATION OF ISOLATED REGIONS FOR USE IN SELF - ALIGNING DEVICE PROCESS UTILIZING SELECTIVE OXIDATION
20
Patent #:
Issue Dt:
01/12/1982
Application #:
06212799
Filing Dt:
12/04/1980
Title:
MASK ALIGNMENT SCHEME FOR LATERALLY AND TOTALLY DIELECTRICALLY ISOLATED INTEGRATED CIRCUITS
21
Patent #:
Issue Dt:
09/11/1984
Application #:
06224931
Filing Dt:
01/14/1981
Title:
AMORPHOUS DEVICES AND INTERCONNECT SYSTEM AND METHOD OF FABRICATION
22
Patent #:
Issue Dt:
04/19/1983
Application #:
06231671
Filing Dt:
02/05/1981
Title:
TTL TO CMOS INTERFACE CIRCUIT
23
Patent #:
Issue Dt:
05/01/1984
Application #:
06231672
Filing Dt:
02/05/1981
Title:
CMOS AMPLIFIER
24
Patent #:
Issue Dt:
12/13/1983
Application #:
06232520
Filing Dt:
02/09/1981
Title:
REVERSIBLY PROGRAMMABLE POLYCRYSTALLINE SILICON MEMORY ELEMENT
25
Patent #:
Issue Dt:
08/30/1983
Application #:
06242658
Filing Dt:
03/11/1981
Title:
INTEGRATED RAM/EAROM MEMORY SYSTEM
26
Patent #:
Issue Dt:
06/21/1983
Application #:
06278990
Filing Dt:
06/30/1981
Title:
TIME-DIVISION MULTIPLEX SERIAL LOOP
27
Patent #:
Issue Dt:
07/24/1984
Application #:
06296191
Filing Dt:
08/25/1981
Title:
MINIATURE RESISTIVE TEMPERATURE DETECTOR AND METHOD OF FABRICATION
28
Patent #:
Issue Dt:
09/18/1984
Application #:
06296192
Filing Dt:
08/25/1981
Title:
TRANSISTOR CIRCUIT FOR REDUCING GATE LEAKAGE CURRENT IN A JFET
29
Patent #:
Issue Dt:
06/12/1984
Application #:
06300617
Filing Dt:
09/09/1981
Title:
POWER EFFICIENT TTL BUFFER FOR DRIVING LARGE CAPACITIVE LOADS
30
Patent #:
Issue Dt:
07/21/1987
Application #:
06301761
Filing Dt:
09/14/1981
Title:
CIRCUIT DESIGN TECHNIQUE TO PREVENT CURRENT HOGGING WHEN MINIMIZING INTERCONNECT STRIPES BY PARALLELING STL OR ISL GATE INPUTS
31
Patent #:
Issue Dt:
09/13/1983
Application #:
06306226
Filing Dt:
09/28/1981
Title:
VERTICAL FUSE AND METHOD OF FABRICATION
32
Patent #:
Issue Dt:
06/26/1984
Application #:
06309194
Filing Dt:
10/06/1981
Title:
ISOLATED GATE JFET STRUCTURE
33
Patent #:
Issue Dt:
08/09/1983
Application #:
06310035
Filing Dt:
10/09/1981
Title:
KELVIN-CONNECTED BURIED ZENER VOLTAGE REFERENCE CIRCUIT
34
Patent #:
Issue Dt:
08/07/1984
Application #:
06326345
Filing Dt:
12/01/1981
Title:
CIRCUIT FOR TRIMMING FET DIFFERENTIAL PAIR OFFSET VOLTAGE WITHOUT INCREASING THE OFFSET VOLTAGE TEMPERATURE COEFFICIENT
35
Patent #:
Issue Dt:
09/11/1984
Application #:
06351442
Filing Dt:
02/23/1982
Title:
HIGH TEMPERATURE BIAS LINE STABILIZED CURRENT SOURCES
36
Patent #:
Issue Dt:
05/22/1984
Application #:
06351443
Filing Dt:
02/23/1982
Title:
HIGH TEMPERATURE CURRENT MIRROR AMPLIFIER
37
Patent #:
Issue Dt:
07/17/1984
Application #:
06353604
Filing Dt:
03/01/1982
Title:
ROM/PLA STRUCTURE AND METHOD OF TESTING
38
Patent #:
Issue Dt:
04/30/1985
Application #:
06363815
Filing Dt:
03/31/1982
Title:
INTEGRATED PROGRAM COUNTER MEMORY MANAGEMENT REGISTER AND INCREMENTER
39
Patent #:
Issue Dt:
10/30/1984
Application #:
06372812
Filing Dt:
04/28/1982
Title:
PHASE-TO-VOLTAGE CONVERTER
40
Patent #:
Issue Dt:
07/09/1985
Application #:
06382603
Filing Dt:
05/27/1982
Title:
PULSED LINEAR INTEGRATED CIRCUIT TESTER
41
Patent #:
Issue Dt:
06/18/1985
Application #:
06396072
Filing Dt:
07/07/1982
Title:
SLIC II - COMMON MODE CURRENT REJECTION
42
Patent #:
Issue Dt:
07/30/1985
Application #:
06406333
Filing Dt:
08/09/1982
Title:
METHOD OF FABRICATION BIPOLAR TRANSISTOR WITH IMPROVED BASE COLLECTOR BREAKDOWN VOLTAGE AND COLLECTOR SERIES RESISTANCE
43
Patent #:
Issue Dt:
07/09/1985
Application #:
06414862
Filing Dt:
09/03/1982
Title:
INTEGRATED CIRCUIT SWITCH USING STACKED SCRS
44
Patent #:
Issue Dt:
01/28/1986
Application #:
06416034
Filing Dt:
09/08/1982
Title:
CACHE MEMORY FLUSH SCHEME
45
Patent #:
Issue Dt:
08/30/1983
Application #:
06431229
Filing Dt:
09/30/1982
Title:
VOLTAGE EQUALIZER BRIDGE
46
Patent #:
Issue Dt:
08/21/1984
Application #:
06435221
Filing Dt:
10/19/1982
Title:
METHOD FOR PROVIDING POLYSILICON THIN FILMS OF IMPROVED UNIFORMITY
47
Patent #:
Issue Dt:
10/15/1985
Application #:
06447946
Filing Dt:
12/08/1982
Title:
I2L STRUCTURE AND FABRICATION PROCESS COMPATIBLE WITH HIGH VOLTAGE BIPOLAR TRANSISTORS
48
Patent #:
Issue Dt:
04/29/1986
Application #:
06447947
Filing Dt:
12/08/1982
Title:
FORMANT-BASED SPEECH SYNTHESIZER
49
Patent #:
Issue Dt:
03/05/1985
Application #:
06454533
Filing Dt:
12/30/1982
Title:
A. C. TESTING OF LOGIC ARRAYS
50
Patent #:
Issue Dt:
07/09/1985
Application #:
06460020
Filing Dt:
01/21/1983
Title:
INTEGRATED CIRCUIT SWITCH USING STACKED SCRS
51
Patent #:
Issue Dt:
12/17/1985
Application #:
06460061
Filing Dt:
01/21/1983
Title:
ARITHMETIC LOGIC UNIT
52
Patent #:
Issue Dt:
08/14/1984
Application #:
06467295
Filing Dt:
02/17/1983
Title:
PROCESS FOR FABRICATION OF HIGH-SPEED RADIATION HARD BIPOLAR SEMICONDUCTOR DEVICES
53
Patent #:
Issue Dt:
04/08/1986
Application #:
06475618
Filing Dt:
03/15/1983
Title:
ADDRESS DECODER
54
Patent #:
Issue Dt:
01/22/1985
Application #:
06493234
Filing Dt:
05/10/1983
Title:
CONTROLLED CURRENT LIMITER
55
Patent #:
Issue Dt:
04/01/1986
Application #:
06500910
Filing Dt:
06/03/1983
Title:
BINARILY WEIGHTED D TO A CONVERTER LADDER WITH INHERENTLY REDUCED LADDER SWITCHING NOISE
56
Patent #:
Issue Dt:
07/30/1985
Application #:
06504312
Filing Dt:
06/14/1983
Title:
HIGH VOLTAGE CURRENT MIRROR
57
Patent #:
Issue Dt:
04/22/1986
Application #:
06506793
Filing Dt:
06/22/1983
Title:
REDUCTION OF SERIES PROPAGATION DELAY AND IMPEDANCE
58
Patent #:
Issue Dt:
01/28/1986
Application #:
06506794
Filing Dt:
06/22/1983
Title:
POWER SWITCHED LOGIC GATES
59
Patent #:
Issue Dt:
05/27/1986
Application #:
06518598
Filing Dt:
07/29/1983
Title:
METHOD OF FABRICATING LOW NOISE REFERENCE DIODES AND TRANSISTORS
60
Patent #:
Issue Dt:
08/28/1984
Application #:
06518725
Filing Dt:
07/29/1983
Title:
DIELECTRIC ISOLATION FABRICATION FOR LASER TRIMMING
61
Patent #:
Issue Dt:
10/27/1987
Application #:
06526065
Filing Dt:
08/24/1983
Title:
SPEECH DATA ECONDING SCHEME
62
Patent #:
Issue Dt:
01/28/1986
Application #:
06526066
Filing Dt:
08/24/1983
Title:
METHOD OF DETERMINING POSITION ON A WAFER
63
Patent #:
Issue Dt:
06/24/1986
Application #:
06566400
Filing Dt:
12/28/1983
Title:
PROCESS FOR MINIMIZING BORON DEPLETION IN N-CHANNEL FET AT THE SILICON-SILICON OXIDE INTERFACE
64
Patent #:
Issue Dt:
12/23/1986
Application #:
06593516
Filing Dt:
03/26/1984
Title:
HIGH DENSITY PACKAGING TECHNIQUE FOR ELECTRONIC SYSTEMS
65
Patent #:
Issue Dt:
09/23/1986
Application #:
06598985
Filing Dt:
04/11/1984
Title:
CURRENT COMPENSATION FOR LOGIC GATES
66
Patent #:
Issue Dt:
01/29/1985
Application #:
06599817
Filing Dt:
04/13/1984
Title:
METHOD OF FABRICATING AN ISOLATED GATE JFET
67
Patent #:
Issue Dt:
06/10/1986
Application #:
06610583
Filing Dt:
05/15/1984
Title:
LASER TRIMMING OF RESISTORS OVER DIELECTRICALLY ISOLATED ISLANDS
68
Patent #:
Issue Dt:
08/20/1985
Application #:
06612877
Filing Dt:
05/22/1984
Title:
POLYSILICON THIN FILMS OF IMPROVED ELECTRICAL UNIFORMITY
69
Patent #:
Issue Dt:
05/27/1986
Application #:
06620728
Filing Dt:
06/14/1984
Title:
GREY CODE DAC LADDER
70
Patent #:
Issue Dt:
07/15/1986
Application #:
06620835
Filing Dt:
06/15/1984
Title:
A PROCESS OF MAKING TWIN WILL VLSI CMOS
71
Patent #:
Issue Dt:
05/12/1987
Application #:
06625222
Filing Dt:
06/27/1984
Title:
CURRENT TO VOLTAGE INTERFACE
72
Patent #:
Issue Dt:
12/24/1985
Application #:
06630280
Filing Dt:
07/12/1984
Title:
CIRCUIT FOR INCREASING VOLTAGE GAIN
73
Patent #:
Issue Dt:
04/01/1986
Application #:
06643362
Filing Dt:
08/22/1984
Title:
IMPLANT MASK REVERSAL PROCESS
74
Patent #:
Issue Dt:
01/27/1987
Application #:
06668864
Filing Dt:
11/06/1984
Title:
DIFFERENTIAL INPUT STAGE FOR THE REALIZATION OF LOW NOISE AND HIGH PRECISION BIPOLAR TRANSISTOR AMPLIFIERS
75
Patent #:
Issue Dt:
06/17/1986
Application #:
06669787
Filing Dt:
11/09/1984
Title:
METHOD FOR SELECTIVE DEPOSITION OF TUNGSTEN ON SILICON
76
Patent #:
Issue Dt:
08/26/1986
Application #:
06669788
Filing Dt:
11/09/1984
Title:
PROGRAMMABLE CURRENT MIRROR
77
Patent #:
Issue Dt:
12/30/1986
Application #:
06673386
Filing Dt:
11/20/1984
Title:
CMOS POWER-UP RESET CIRCUIT FOR GATE ARRAYS AND STANDARD CELLS
78
Patent #:
Issue Dt:
10/21/1986
Application #:
06675222
Filing Dt:
11/27/1984
Title:
MONOLITHIC TRANSIENT PROTECTOR
79
Patent #:
Issue Dt:
01/27/1987
Application #:
06676846
Filing Dt:
11/30/1984
Title:
REDUNDANT ROW DECODING FOR PROGRAMMABLE DEVICES
80
Patent #:
Issue Dt:
11/19/1985
Application #:
06678075
Filing Dt:
12/04/1984
Title:
ELECTROCHEMICAL DIELECTRIC ISOLATION TECHNIQUE
81
Patent #:
Issue Dt:
12/30/1986
Application #:
06694096
Filing Dt:
01/23/1985
Title:
ALIGNMENT TARGET IMAGE ENHANCEMENT FOR MICROLITHOGRAPHY PROCESS
82
Patent #:
Issue Dt:
09/15/1987
Application #:
06702601
Filing Dt:
02/19/1985
Title:
CONDUCTIVITY MODULATED SEMICONDUCTOR STRUCTURE
83
Patent #:
Issue Dt:
02/17/1987
Application #:
06720679
Filing Dt:
04/08/1985
Title:
SUBCOLLECTOR FOR OXIDE AND JUNCTION ISOLATED IC'S
84
Patent #:
Issue Dt:
11/10/1987
Application #:
06723238
Filing Dt:
04/15/1985
Title:
SIMULTANEOUS PLASMA SCULPTURING AND DUAL TAPERED APERTURE ETCH
85
Patent #:
Issue Dt:
11/10/1987
Application #:
06723239
Filing Dt:
04/15/1985
Title:
PHOTORESIST TAPERING PROCESS
86
Patent #:
Issue Dt:
08/19/1986
Application #:
06723581
Filing Dt:
04/12/1985
Title:
STRESS FREE DIELECTRIC ISOLATION TECHNOLOGY
87
Patent #:
Issue Dt:
01/05/1988
Application #:
06728271
Filing Dt:
04/29/1985
Title:
TTL COMPATIBLE CMOS INPUT BUFFER
88
Patent #:
Issue Dt:
01/12/1988
Application #:
06739843
Filing Dt:
05/31/1985
Title:
BIT ADDRESSABLE PROGRAMMING ARRANGEMENT
89
Patent #:
Issue Dt:
10/07/1986
Application #:
06744336
Filing Dt:
06/13/1985
Title:
PULSED LINEAR INTEGRATED CIRCUIT TESTER
90
Patent #:
Issue Dt:
06/23/1987
Application #:
06754711
Filing Dt:
07/15/1985
Title:
DIRECT COUPLED SWITHCING POWER SUPPLY WITH GTO SCR SWITCHING ELEMENT
91
Patent #:
Issue Dt:
08/11/1987
Application #:
06763861
Filing Dt:
08/09/1985
Title:
FUSE PROGRAMMABLE DC LEVEL GENERATOR
92
Patent #:
Issue Dt:
12/29/1987
Application #:
06768326
Filing Dt:
08/22/1985
Title:
METHOD OF ENSURING ADHESION OF CHEMICALLY VAPOR DEPOSITED OXIDE TO GOLD INTEGRATED CIRCUIT INTERCONNECT LINES
93
Patent #:
Issue Dt:
10/28/1986
Application #:
06771160
Filing Dt:
08/30/1985
Title:
METHOD FOR SUCCESSIVE APPROXIMATION A/D CONVERSION
94
Patent #:
Issue Dt:
11/25/1986
Application #:
06771712
Filing Dt:
09/03/1985
Title:
ELECTRODEPOSITION OF SUBMICROMETER METALLIC INTERCONNECT FOR INTEGRATED CIRCUITS
95
Patent #:
Issue Dt:
08/04/1987
Application #:
06771846
Filing Dt:
09/09/1985
Title:
METHOD OF SELECTIVELY SOLDERING THE UNDERSIDE OF A SUBSTRATE HAVING LEADS
96
Patent #:
Issue Dt:
06/30/1987
Application #:
06774474
Filing Dt:
09/10/1985
Title:
TTL COMPATIBLE INPUT BUFFER
97
Patent #:
Issue Dt:
02/21/1989
Application #:
06777269
Filing Dt:
09/18/1985
Title:
IC WHICH ELIMINATES SUPPORT BIAS INFLUENCE ON DIELECTRICALLY ISOLATED COMPONENTS
98
Patent #:
Issue Dt:
02/17/1987
Application #:
06777685
Filing Dt:
09/19/1985
Title:
PROGRAMMABLE ARRAY LOGIC WITH SHARED PRODUCT TERMS
99
Patent #:
Issue Dt:
02/17/1987
Application #:
06777686
Filing Dt:
09/19/1985
Title:
PROGRAMMABLE ARRAY LOGIC WITH SHARED PRODUCT TERMS AND J-K REGISTERED OUTPUTS
100
Patent #:
Issue Dt:
03/24/1987
Application #:
06782192
Filing Dt:
09/30/1985
Title:
ZENER STRUCTURES WITH CONNECTIONS TO BURIED LAYER
Assignor
1
Exec Dt:
08/13/1999
Assignee
1
2401 PALM BAY ROAD, N.E.
PALM BAY, FLORIDA 32905
Correspondence name and address
FISH & RICHARDSON P.C.
TIMOTHY A. FRENCH
225 FRANKLIN STREET
BOSTON, MA 02110-2804

Search Results as of: 05/24/2024 11:04 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT