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Reel/Frame:044209/0047   Pages: 69
Recorded: 09/21/2017
Attorney Dkt #:FSL NXP CORRECTIVE ASSGN
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME.
Total properties: 1087
Page 4 of 11
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1
Patent #:
Issue Dt:
03/06/2012
Application #:
12130570
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
12/03/2009
Title:
UTILIZATION OF A STORE BUFFER FOR ERROR RECOVERY ON A STORE ALLOCATION CACHE MISS
2
Patent #:
Issue Dt:
09/25/2012
Application #:
12130579
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
12/03/2009
Title:
HIGH FREQUENCY INTERCONNECT PAD STRUCTURE
3
Patent #:
Issue Dt:
10/19/2010
Application #:
12130918
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
04/02/2009
Title:
SEMICONDUCTOR ARRAY INCLUDING A MATRIX OF CELLS AND A METHOD OF MAKING A SEMICONDUCTOR ARRAY HAVING A MATRIX OF CELLS
4
Patent #:
Issue Dt:
08/30/2011
Application #:
12139106
Filing Dt:
06/13/2008
Publication #:
Pub Dt:
12/17/2009
Title:
METHOD AND CIRCUIT FOR EFUSE PROTECTION
5
Patent #:
Issue Dt:
04/19/2011
Application #:
12142115
Filing Dt:
06/19/2008
Publication #:
Pub Dt:
12/24/2009
Title:
ADJUSTABLE BIPOLAR TRANSISTORS FORMED USING A CMOS PROCESS
6
Patent #:
Issue Dt:
04/20/2010
Application #:
12144332
Filing Dt:
06/23/2008
Publication #:
Pub Dt:
12/24/2009
Title:
MEMORY WITH HIGH SPEED SENSING
7
Patent #:
Issue Dt:
10/19/2010
Application #:
12147230
Filing Dt:
06/26/2008
Publication #:
Pub Dt:
12/31/2009
Title:
DIELECTRIC LEDGE FOR HIGH FREQUENCY DEVICES
8
Patent #:
Issue Dt:
09/28/2010
Application #:
12147236
Filing Dt:
06/26/2008
Publication #:
Pub Dt:
12/31/2009
Title:
SILICIDED BASE STRUCTURE FOR HIGH FREQUENCY TRANSISTORS
9
Patent #:
Issue Dt:
10/04/2011
Application #:
12147313
Filing Dt:
06/26/2008
Publication #:
Pub Dt:
12/31/2009
Title:
SEMICONDUCTOR PACKAGE WITH REDUCED INDUCTIVE COUPLING BETWEEN ADJACENT BONDWIRE ARRAYS
10
Patent #:
Issue Dt:
12/06/2011
Application #:
12163633
Filing Dt:
06/27/2008
Publication #:
Pub Dt:
12/31/2009
Title:
SYSTEM AND METHOD FOR EVALUATING A DYNAMIC POWER CONSUMPTION OF A BLOCK
11
Patent #:
Issue Dt:
05/01/2012
Application #:
12163638
Filing Dt:
06/27/2008
Publication #:
Pub Dt:
12/31/2009
Title:
DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING
12
Patent #:
Issue Dt:
10/29/2013
Application #:
12164444
Filing Dt:
06/30/2008
Publication #:
Pub Dt:
12/31/2009
Title:
METHOD FOR IMPLEMENTING A BIT-REVERSED INCREMENT IN A DATA PROCESSING SYSTEM
13
Patent #:
Issue Dt:
03/30/2010
Application #:
12164622
Filing Dt:
06/30/2008
Publication #:
Pub Dt:
12/31/2009
Title:
INTEGRATED CIRCUIT AND A METHOD FOR MEASURING A QUIESCENT CURRENT OF A MODULE
14
Patent #:
Issue Dt:
12/14/2010
Application #:
12164755
Filing Dt:
06/30/2008
Publication #:
Pub Dt:
12/31/2009
Title:
MEMORY OPERATION TESTING
15
Patent #:
Issue Dt:
10/18/2011
Application #:
12164760
Filing Dt:
06/30/2008
Publication #:
Pub Dt:
12/31/2009
Title:
CIRCUIT AND METHOD FOR AVOIDING SOFT ERRORS IN STORAGE DEVICES
16
Patent #:
Issue Dt:
08/13/2013
Application #:
12169888
Filing Dt:
07/09/2008
Publication #:
Pub Dt:
01/14/2010
Title:
MULTI-EXPOSURE LITHOGRAPHY EMPLOYING A SINGLE ANTI-REFLECTIVE COATING LAYER
17
Patent #:
Issue Dt:
07/19/2011
Application #:
12169964
Filing Dt:
07/09/2008
Publication #:
Pub Dt:
01/14/2010
Title:
INTEGRATED CONFORMAL SHIELDING METHOD AND PROCESS USING REDISTRIBUTED CHIP PACKAGING
18
Patent #:
Issue Dt:
01/11/2011
Application #:
12176634
Filing Dt:
07/21/2008
Publication #:
Pub Dt:
01/21/2010
Title:
METHOD TO REDUCE THRESHOLD VOLTAGE (VT) IN SILICON GERMANIUM (SIGE), HIGH-K DIELECTRIC-METAL GATE, P-TYPE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS
19
Patent #:
Issue Dt:
02/01/2011
Application #:
12177986
Filing Dt:
07/23/2008
Publication #:
Pub Dt:
01/28/2010
Title:
SEMICONDUCTOR RESISTOR FORMED IN METAL GATE STACK
20
Patent #:
Issue Dt:
05/25/2010
Application #:
12178800
Filing Dt:
07/24/2008
Publication #:
Pub Dt:
01/28/2010
Title:
BURIED ASYMMETRIC JUNCTION ESD PROTECTION DEVICE
21
Patent #:
Issue Dt:
09/20/2011
Application #:
12179629
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
DYNAMIC ADDRESS-TYPE SELECTION CONTROL IN A DATA PROCESSING SYSTEM
22
Patent #:
Issue Dt:
06/07/2011
Application #:
12179631
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
DEBUG TRACE MESSAGING WITH ONE OR MORE CHARACTERISTIC INDICATORS
23
Patent #:
Issue Dt:
03/19/2013
Application #:
12179632
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
DEBUG MESSAGE GENERATION USING A SELECTED ADDRESS TYPE
24
Patent #:
Issue Dt:
12/11/2012
Application #:
12179791
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR EXECUTING A HIGH LEVEL PROGRAMMING LANGUAGE CONDITIONAL STATEMENT
25
Patent #:
Issue Dt:
02/07/2012
Application #:
12179792
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
SYSTEM AND METHOD FOR PROVIDING A BLENDED PICTURE
26
Patent #:
Issue Dt:
11/23/2010
Application #:
12179828
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD
27
Patent #:
Issue Dt:
12/06/2011
Application #:
12179839
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
DEVICE AND METHOD FOR EVALUATING A TEMPERATURE
28
Patent #:
Issue Dt:
01/10/2012
Application #:
12180166
Filing Dt:
07/25/2008
Publication #:
Pub Dt:
01/28/2010
Title:
PHASE-LOCKED LOOP SYSTEM WITH A PHASE-ERROR SPREADING CIRCUIT
29
Patent #:
Issue Dt:
10/18/2011
Application #:
12181701
Filing Dt:
07/29/2008
Publication #:
Pub Dt:
02/04/2010
Title:
SYSTEM AND METHOD FOR FETCHING INFORMATION TO A CACHE MODULE USING A WRITE BACK ALLOCATE ALGORITHM
30
Patent #:
Issue Dt:
03/08/2011
Application #:
12181766
Filing Dt:
07/29/2008
Publication #:
Pub Dt:
02/04/2010
Title:
SELF-ALIGNED IN-LAID SPLIT GATE MEMORY AND METHOD OF MAKING
31
Patent #:
Issue Dt:
01/31/2012
Application #:
12182349
Filing Dt:
07/30/2008
Publication #:
Pub Dt:
02/04/2010
Title:
METHOD FOR FORMING AN INSULATED GATE FIELD EFFECT DEVICE
32
Patent #:
Issue Dt:
11/22/2011
Application #:
12182421
Filing Dt:
07/30/2008
Publication #:
Pub Dt:
02/04/2010
Title:
SEMICONDUCTOR DEVICES WITH EXTENDED ACTIVE REGIONS
33
Patent #:
Issue Dt:
07/27/2010
Application #:
12183550
Filing Dt:
07/31/2008
Publication #:
Pub Dt:
02/04/2010
Title:
SQUARE TO PSEUDO-SINUSOIDAL CLOCK CONVERSION CIRCUIT AND METHOD
34
Patent #:
Issue Dt:
06/14/2011
Application #:
12183755
Filing Dt:
07/31/2008
Publication #:
Pub Dt:
02/04/2010
Title:
BALUN SIGNAL TRANSFORMER AND METHOD OF FORMING
35
Patent #:
Issue Dt:
09/11/2012
Application #:
12183767
Filing Dt:
07/31/2008
Publication #:
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT
36
Patent #:
Issue Dt:
08/07/2012
Application #:
12184377
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
PACKAGING AN INTEGRATED CIRCUIT DIE WITH BACKSIDE METALLIZATION
37
Patent #:
Issue Dt:
02/08/2011
Application #:
12184438
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
LITHOGRAPHY FOR PITCH REDUCTION
38
Patent #:
Issue Dt:
10/23/2012
Application #:
12188819
Filing Dt:
08/08/2008
Publication #:
Pub Dt:
02/11/2010
Title:
ECHO CANCELLER WITH HEAVY DOUBLE-TALK ESTIMATION
39
Patent #:
Issue Dt:
11/15/2011
Application #:
12192513
Filing Dt:
08/15/2008
Publication #:
Pub Dt:
02/18/2010
Title:
PROVISION OF EXTENDED ADDRESSING MODES IN A SINGLE INSTRUCTION MULTIPLE DATA (SIMD) DATA PROCESSOR
40
Patent #:
Issue Dt:
07/19/2011
Application #:
12194131
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
TRANSISTOR WITH GAIN VARIATION COMPENSATION
41
Patent #:
Issue Dt:
01/10/2012
Application #:
12194273
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
METHOD FOR ADDRESS COMPARISON AND A DEVICE HAVING ADDRESS COMPARISON CAPABILITIES
42
Patent #:
Issue Dt:
09/11/2012
Application #:
12194286
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
METHOD FOR EXECUTING AN INSTRUCTION LOOP AND A DEVICE HAVING INSTRUCTION LOOP EXECUTION CAPABILITIES
43
Patent #:
Issue Dt:
07/19/2016
Application #:
12195220
Filing Dt:
08/20/2008
Publication #:
Pub Dt:
02/25/2010
Title:
DEBUG INSTRUCTION FOR EXECUTION BY A FIRST THREAD TO GENERATE A DEBUG EVENT IN A SECOND THREAD TO CAUSE A HALTING OPERATION
44
Patent #:
Issue Dt:
02/28/2012
Application #:
12196730
Filing Dt:
08/22/2008
Publication #:
Pub Dt:
02/25/2010
Title:
DATA PROCESSING DEVICE DESIGN TOOL AND METHODS
45
Patent #:
Issue Dt:
12/28/2010
Application #:
12199093
Filing Dt:
08/27/2008
Publication #:
Pub Dt:
03/04/2010
Title:
MEMORY DEVICE AND METHOD THEREOF
46
Patent #:
Issue Dt:
03/06/2012
Application #:
12201216
Filing Dt:
08/29/2008
Publication #:
Pub Dt:
03/04/2010
Title:
CACHE SNOOP LIMITING WITHIN A MULTIPLE MASTER DATA PROCESSING SYSTEM
47
Patent #:
Issue Dt:
10/26/2010
Application #:
12201623
Filing Dt:
08/29/2008
Publication #:
Pub Dt:
03/04/2010
Title:
PACKAGE DEVICE HAVING CRACK ARREST FEATURE AND METHOD OF FORMING
48
Patent #:
Issue Dt:
10/26/2010
Application #:
12201932
Filing Dt:
08/29/2008
Publication #:
Pub Dt:
03/04/2010
Title:
SYSTEM AND METHOD FOR COOLING USING IMPINGING JET CONTROL
49
Patent #:
Issue Dt:
03/27/2012
Application #:
12205210
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/11/2010
Title:
ERROR DETECTION SCHEMES FOR A UNIFIED CACHE IN A DATA PROCESSING SYSTEM
50
Patent #:
Issue Dt:
05/17/2011
Application #:
12205438
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/11/2010
Title:
POWER MOSFET WITH A GATE STRUCTURE OF DIFFERENT MATERIAL
51
Patent #:
Issue Dt:
06/08/2010
Application #:
12206332
Filing Dt:
09/08/2008
Publication #:
Pub Dt:
03/11/2010
Title:
CIRCUIT AND METHOD FOR OPTIMIZING MEMORY SENSE AMPLIFIER TIMING
52
Patent #:
Issue Dt:
04/05/2011
Application #:
12207120
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/11/2010
Title:
METHODS FOR FORMING VARACTOR DIODES
53
Patent #:
Issue Dt:
10/26/2010
Application #:
12207127
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/11/2010
Title:
COUNTER-DOPED VARACTOR STRUCTURE AND METHOD
54
Patent #:
Issue Dt:
09/21/2010
Application #:
12233922
Filing Dt:
09/19/2008
Publication #:
Pub Dt:
03/25/2010
Title:
MEMORY HAVING SELF-TIMED BIT LINE BOOST CIRCUIT AND METHOD THEREFOR
55
Patent #:
Issue Dt:
06/29/2010
Application #:
12234709
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
03/25/2010
Title:
METHOD OF FORMING SEMICONDUCTOR PACKAGE
56
Patent #:
Issue Dt:
10/23/2012
Application #:
12237834
Filing Dt:
09/25/2008
Publication #:
Pub Dt:
03/25/2010
Title:
EFFECTIVE EFUSE STRUCTURE
57
Patent #:
Issue Dt:
10/26/2010
Application #:
12240513
Filing Dt:
09/29/2008
Publication #:
Pub Dt:
04/01/2010
Title:
METHOD OF FORMING A PACKAGE WITH EXPOSED COMPONENT SURFACES
58
Patent #:
Issue Dt:
07/19/2011
Application #:
12241139
Filing Dt:
09/30/2008
Publication #:
Pub Dt:
04/01/2010
Title:
METHOD OF FORMING A GATE DIELECTRIC BY IN-SITU PLASMA
59
Patent #:
Issue Dt:
10/11/2011
Application #:
12241786
Filing Dt:
09/30/2008
Publication #:
Pub Dt:
04/01/2010
Title:
SPLIT-GATE NON-VOLATILE MEMORY CELL AND METHOD
60
Patent #:
Issue Dt:
10/26/2010
Application #:
12243639
Filing Dt:
10/01/2008
Publication #:
Pub Dt:
04/01/2010
Title:
EFFICIENT BODY CONTACT FIELD EFFECT TRANSISTOR WITH REDUCED BODY RESISTANCE
61
Patent #:
Issue Dt:
05/08/2012
Application #:
12254331
Filing Dt:
10/20/2008
Publication #:
Pub Dt:
04/22/2010
Title:
METHOD OF MAKING A SPLIT GATE MEMORY CELL
62
Patent #:
Issue Dt:
03/19/2013
Application #:
12260727
Filing Dt:
10/29/2008
Publication #:
Pub Dt:
04/29/2010
Title:
MEMORY SYSTEM WITH ERROR CORRECTION AND METHOD OF OPERATION
63
Patent #:
Issue Dt:
01/03/2012
Application #:
12261599
Filing Dt:
10/30/2008
Publication #:
Pub Dt:
05/06/2010
Title:
INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD
64
Patent #:
Issue Dt:
02/22/2011
Application #:
12262922
Filing Dt:
10/31/2008
Publication #:
Pub Dt:
05/06/2010
Title:
CMOS LATCH-UP IMMUNITY
65
Patent #:
Issue Dt:
06/07/2011
Application #:
12269058
Filing Dt:
11/12/2008
Publication #:
Pub Dt:
05/13/2010
Title:
MOLD AND SUBSTRATE FOR USE WITH MOLD
66
Patent #:
Issue Dt:
04/13/2010
Application #:
12275222
Filing Dt:
11/21/2008
Title:
CARRIER TAPE FOR ELECTRONIC COMPONENTS
67
Patent #:
Issue Dt:
03/08/2011
Application #:
12275622
Filing Dt:
11/21/2008
Publication #:
Pub Dt:
05/27/2010
Title:
INTEGRATED CIRCUIT HAVING MEMORY WITH CONFIGURABLE READ/WRITE OPERATIONS AND METHOD THEREFOR
68
Patent #:
Issue Dt:
07/05/2011
Application #:
12275659
Filing Dt:
11/21/2008
Publication #:
Pub Dt:
05/27/2010
Title:
METHOD OF FORMING A SEMICONDUCTOR LAYER
69
Patent #:
Issue Dt:
06/21/2011
Application #:
12277408
Filing Dt:
11/25/2008
Publication #:
Pub Dt:
05/27/2010
Title:
MULTILAYERED THROUGH VIA
70
Patent #:
Issue Dt:
04/12/2011
Application #:
12277458
Filing Dt:
11/25/2008
Publication #:
Pub Dt:
05/27/2010
Title:
THROUGH-VIA AND METHOD OF FORMING
71
Patent #:
Issue Dt:
05/07/2013
Application #:
12282489
Filing Dt:
09/10/2008
Publication #:
Pub Dt:
01/29/2009
Title:
TASK SCHEDULING METHOD AND APPARATUS
72
Patent #:
Issue Dt:
02/05/2013
Application #:
12295467
Filing Dt:
09/30/2008
Publication #:
Pub Dt:
02/17/2011
Title:
DISCHARGE PROTECTION APPARATUS AND METHOD OF PROTECTING AN ELECTRONIC DEVICE
73
Patent #:
Issue Dt:
11/22/2011
Application #:
12299305
Filing Dt:
10/31/2008
Publication #:
Pub Dt:
12/24/2009
Title:
VERY LOW POWER ANALOG COMPENSATION CIRCUIT
74
Patent #:
Issue Dt:
10/04/2011
Application #:
12301554
Filing Dt:
11/19/2008
Publication #:
Pub Dt:
08/06/2009
Title:
DEVICE AND METHOD FOR TESTING INTEGRATED CIRCUITS
75
Patent #:
Issue Dt:
08/07/2012
Application #:
12302227
Filing Dt:
11/24/2008
Publication #:
Pub Dt:
11/05/2009
Title:
METHOD FOR TRANSMITTING DATA AND A DEVICE HAVING DATA TRANSMISSION CAPABILITIES
76
Patent #:
Issue Dt:
07/28/2015
Application #:
12304193
Filing Dt:
02/23/2011
Publication #:
Pub Dt:
06/23/2011
Title:
METHOD AND DEVICE FOR PROVIDING A SECURITY BREACH INDICATIVE AUDIO ALERT
77
Patent #:
Issue Dt:
08/10/2010
Application #:
12323780
Filing Dt:
11/26/2008
Publication #:
Pub Dt:
05/27/2010
Title:
INTEGRATED CIRCUIT MODULE AND METHOD OF PACKAGING SAME
78
Patent #:
Issue Dt:
02/03/2015
Application #:
12328135
Filing Dt:
12/04/2008
Publication #:
Pub Dt:
06/10/2010
Title:
MEMORY INTERFACE DEVICE AND METHODS THEREOF
79
Patent #:
Issue Dt:
05/17/2011
Application #:
12335400
Filing Dt:
12/15/2008
Publication #:
Pub Dt:
06/17/2010
Title:
STREAM BASED STIMULUS DEFINITION AND DELIVERY VIA INTERWORKING
80
Patent #:
Issue Dt:
01/10/2012
Application #:
12335589
Filing Dt:
12/16/2008
Publication #:
Pub Dt:
06/17/2010
Title:
PACKAGING MILLIMETER WAVE MODULES
81
Patent #:
Issue Dt:
02/12/2013
Application #:
12345507
Filing Dt:
12/29/2008
Publication #:
Pub Dt:
07/01/2010
Title:
DISTRIBUTION OF ELECTROSTATIC DISCHARGE (ESD) CIRCUITRY WITHIN AN INTEGRATED CIRCUIT
82
Patent #:
Issue Dt:
07/27/2010
Application #:
12349974
Filing Dt:
01/07/2009
Publication #:
Pub Dt:
07/08/2010
Title:
METHOD FOR PFET ENHANCEMENT
83
Patent #:
Issue Dt:
05/15/2012
Application #:
12355218
Filing Dt:
01/16/2009
Publication #:
Pub Dt:
07/22/2010
Title:
METHOD FOR CONTROLLING A FREQUENCY OF A CLOCK SIGNAL TO CONTROL POWER CONSUMPTION AND A DEVICE HAVING POWER CONSUMPTION CAPABILITIES
84
Patent #:
Issue Dt:
09/13/2011
Application #:
12357057
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
07/22/2010
Title:
DUAL HIGH-K OXIDES WITH SIGE CHANNEL
85
Patent #:
Issue Dt:
11/02/2010
Application #:
12357163
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
07/22/2010
Title:
METHOD OF FORMING AN INTEGRATED CIRCUIT
86
Patent #:
Issue Dt:
03/29/2011
Application #:
12359845
Filing Dt:
01/26/2009
Publication #:
Pub Dt:
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Title:
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Assignor
1
Exec Dt:
11/07/2016
Assignee
1
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TEXAS 78735
Correspondence name and address
NXP USA, INC.
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TX 78735

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