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Reel/Frame:011493/0049   Pages: 2
Recorded: 02/02/2001
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
09/04/2001
Application #:
09688466
Filing Dt:
10/16/2000
Title:
Method for fabricating an soi wafer for low-impedance high-voltage semiconductor components
Assignor
1
Exec Dt:
10/25/2000
Assignee
1
ZT GG VF POSTFACH 22 16 34
MUNCHEN, GERMANY 80506
Correspondence name and address
LERNER AND GREENBERG
RALPH E. LOCHER
P.O. BOX 2480
HOLLYWOOD, FL 33022

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