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Reel/Frame:026916/0054   Pages: 7
Recorded: 09/14/2011
Attorney Dkt #:TESSERA 5-2-027
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 39
1
Patent #:
Issue Dt:
03/25/2014
Application #:
12456349
Filing Dt:
06/15/2009
Publication #:
Pub Dt:
12/24/2009
Title:
WAFER LEVEL EDGE STACKING
2
Patent #:
NONE
Issue Dt:
Application #:
12644476
Filing Dt:
12/22/2009
Publication #:
Pub Dt:
06/23/2011
Title:
MICROELECTRONIC ASSEMBLY WITH BOND ELEMENTS HAVING LOWERED INDUCTANCE
3
Patent #:
Issue Dt:
04/12/2011
Application #:
12722784
Filing Dt:
03/12/2010
Publication #:
Pub Dt:
09/16/2010
Title:
MICROELECTRONIC ASSEMBLY WITH IMPEDANCE CONTROLLED WIREBOND AND CONDUCTIVE REFERENCE ELEMENT
4
Patent #:
Issue Dt:
08/28/2012
Application #:
12722799
Filing Dt:
03/12/2010
Publication #:
Pub Dt:
09/16/2010
Title:
MICROELECTRONIC ASSEMBLY WITH IMPEDANCE CONTROLLED WIREBOND AND REFERENCE WIREBOND
5
Patent #:
Issue Dt:
08/30/2011
Application #:
12793824
Filing Dt:
06/04/2010
Publication #:
Pub Dt:
06/23/2011
Title:
MICROELECTRONIC ASSEMBLY WITH JOINED BOND ELEMENTS HAVING LOWERED INDUCTANCE
6
Patent #:
Issue Dt:
10/13/2015
Application #:
12839038
Filing Dt:
07/19/2010
Publication #:
Pub Dt:
01/19/2012
Title:
STACKABLE MOLDED MICROELECTRONIC PACKAGES WITH AREA ARRAY UNIT CONNECTORS
7
Patent #:
Issue Dt:
09/30/2014
Application #:
12842587
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
MICROELECTRONIC ELEMENTS WITH POST-ASSEMBLY PLANARIZATION
8
Patent #:
Issue Dt:
05/02/2017
Application #:
12842612
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
METHODS OF FORMING SEMICONDUCTOR ELEMENTS USING MICRO-ABRASIVE PARTICLE STREAM
9
Patent #:
Issue Dt:
08/05/2014
Application #:
12842651
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
MICROELECTRONIC ELEMENTS WITH REAR CONTACTS CONNECTED WITH VIA FIRST OR VIA MIDDLE STRUCTURES
10
Patent #:
Issue Dt:
04/15/2014
Application #:
12842669
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
NON-LITHOGRAPHIC FORMATION OF THREE-DIMENSIONAL CONDUCTIVE ELEMENTS
11
Patent #:
Issue Dt:
12/03/2013
Application #:
12842692
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
ACTIVE CHIP ON CARRIER OR LAMINATED CHIP HAVING MICROELECTRONIC ELEMENT EMBEDDED THEREIN
12
Patent #:
Issue Dt:
07/29/2014
Application #:
12842717
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
01/26/2012
Title:
MICROELECTRONIC ELEMENTS HAVING METALLIC PADS OVERLYING VIAS
13
Patent #:
Issue Dt:
11/12/2013
Application #:
12844463
Filing Dt:
07/27/2010
Publication #:
Pub Dt:
02/02/2012
Title:
MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING
14
Patent #:
Issue Dt:
04/01/2014
Application #:
12883421
Filing Dt:
09/16/2010
Publication #:
Pub Dt:
03/22/2012
Title:
CHIP ASSEMBLY HAVING VIA INTERCONNECTS JOINED BY PLATING
15
Patent #:
Issue Dt:
04/01/2014
Application #:
12883431
Filing Dt:
09/16/2010
Publication #:
Pub Dt:
03/22/2012
Title:
STACKED CHIP ASSEMBLY HAVING VERTICAL VIAS
16
Patent #:
Issue Dt:
11/12/2013
Application #:
12883556
Filing Dt:
09/16/2010
Publication #:
Pub Dt:
03/22/2012
Title:
TSOP WITH IMPEDANCE CONTROL
17
Patent #:
Issue Dt:
07/17/2012
Application #:
12883811
Filing Dt:
09/16/2010
Publication #:
Pub Dt:
03/22/2012
Title:
METAL CAN IMPEDANCE CONTROL STRUCTURE
18
Patent #:
Issue Dt:
07/22/2014
Application #:
12883821
Filing Dt:
09/16/2010
Publication #:
Pub Dt:
03/22/2012
Title:
IMPEDANCE CONTROLLED PACKAGES WITH METAL SHEET OR 2-LAYER RDL
19
Patent #:
Issue Dt:
09/30/2014
Application #:
12884649
Filing Dt:
09/17/2010
Publication #:
Pub Dt:
03/22/2012
Title:
STAGED VIA FORMATION FROM BOTH SIDES OF CHIP
20
Patent #:
Issue Dt:
12/17/2013
Application #:
12884695
Filing Dt:
09/17/2010
Publication #:
Pub Dt:
03/22/2012
Title:
MULTI-FUNCTION AND SHIELDED 3D INTERCONNECTS
21
Patent #:
Issue Dt:
10/08/2013
Application #:
12907522
Filing Dt:
10/19/2010
Publication #:
Pub Dt:
04/19/2012
Title:
ENHANCED STACKED MICROELECTRONIC ASSEMBLIES WITH CENTRAL CONTACTS AND IMPROVED THERMAL CHARACTERISTICS
22
Patent #:
Issue Dt:
04/15/2014
Application #:
12938068
Filing Dt:
11/02/2010
Publication #:
Pub Dt:
05/03/2012
Title:
FLOW UNDERFILL FOR MICROELECTRONIC PACKAGE
23
Patent #:
Issue Dt:
02/19/2013
Application #:
12953994
Filing Dt:
11/24/2010
Publication #:
Pub Dt:
05/24/2012
Title:
ENHANCED STACKED MICROELECTRONIC ASSEMBLIES WITH CENTRAL CONTACTS AND VIAS CONNECTED TO THE CENTRAL CONTACTS
24
Patent #:
Issue Dt:
01/28/2014
Application #:
12958866
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
STACKED MICROELECTRONIC ASSEMBLY HAVING INTERPOSER CONNECTING ACTIVE CHIPS
25
Patent #:
Issue Dt:
12/17/2013
Application #:
12962806
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
COMPLIANT INTERCONNECTS IN WAFERS
26
Patent #:
Issue Dt:
04/30/2013
Application #:
12963938
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
05/17/2012
Title:
CONDUCTIVE PADS DEFINED BY EMBEDDED TRACES
27
Patent #:
Issue Dt:
08/06/2013
Application #:
12964049
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS
28
Patent #:
Issue Dt:
10/07/2014
Application #:
12965192
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
06/14/2012
Title:
INTERCONNECT STRUCTURE
29
Patent #:
NONE
Issue Dt:
Application #:
12966225
Filing Dt:
12/13/2010
Publication #:
Pub Dt:
06/14/2012
Title:
PIN ATTACHMENT
30
Patent #:
Issue Dt:
11/05/2013
Application #:
12986556
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
04/28/2011
Title:
MICROELECTRONIC ASSEMBLY WITH IMPEDANCE CONTROLLED WIREBOND AND CONDUCTIVE REFERENCE ELEMENT
31
Patent #:
Issue Dt:
09/18/2012
Application #:
12986601
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/05/2011
Title:
MICROELECTRONIC ASSEMBLY WITH IMPEDANCE CONTROLLED WIREBOND AND CONDUCTIVE REFERENCE ELEMENT
32
Patent #:
Issue Dt:
11/19/2013
Application #:
13051414
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
06/07/2012
Title:
STACKED MICROELECTRONIC ASSEMBLY WITH TSVS FORMED IN STAGES WITH PLURAL ACTIVE CHIPS
33
Patent #:
Issue Dt:
05/27/2014
Application #:
13051424
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
06/07/2012
Title:
STACKED MICROELECTRONIC ASSEMBY WITH TSVS FORMED IN STAGES AND CARRIER ABOVE CHIP
34
Patent #:
Issue Dt:
07/16/2013
Application #:
13076969
Filing Dt:
03/31/2011
Publication #:
Pub Dt:
06/21/2012
Title:
SIMULTANEOUS WAFER BONDING AND INTERCONNECT JOINING
35
Patent #:
Issue Dt:
07/22/2014
Application #:
13080876
Filing Dt:
04/06/2011
Publication #:
Pub Dt:
06/21/2012
Title:
ENHANCED STACKED MICROELECTRONIC ASSEMBLIES WITH CENTRAL CONTACTS
36
Patent #:
Issue Dt:
04/29/2014
Application #:
13091800
Filing Dt:
04/21/2011
Publication #:
Pub Dt:
10/25/2012
Title:
INTERPOSER HAVING MOLDED LOW CTE DIELECTRIC
37
Patent #:
Issue Dt:
09/23/2014
Application #:
13092376
Filing Dt:
04/22/2011
Publication #:
Pub Dt:
10/25/2012
Title:
MULTI-CHIP MODULE WITH STACKED FACE-DOWN CONNECTED DIES
38
Patent #:
Issue Dt:
03/10/2015
Application #:
13092495
Filing Dt:
04/22/2011
Publication #:
Pub Dt:
10/25/2012
Title:
VIAS IN POROUS SUBSTRATES
39
Patent #:
Issue Dt:
04/02/2013
Application #:
13196192
Filing Dt:
08/02/2011
Publication #:
Pub Dt:
11/24/2011
Title:
MICROELECTRONIC ASSEMBLY WITH JOINED BOND ELEMENTS HAVING LOWERED INDUCTANCE
Assignor
1
Exec Dt:
09/08/2011
Assignee
1
3025 ORCHARD PARKWAY
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
DARYL K. NEFF
LERNER, DAVID, LITTENBERG, KRUMHOLZ &
MENTLIK, LLP
600 SOUTH AVENUE WEST
WESTFIELD, NJ 07090

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