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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036033/0060   Pages: 152
Recorded: 06/29/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 25
1
Patent #:
6417539
Issue Dt:
07/09/2002
Application #:
09128864
Filing Dt:
08/04/1998
Publication #:
US20010020716
Pub Dt:
09/13/2001
Title:
HIGH DENSITY MEMORY CELL ASSEMBLY AND METHODS
2
Patent #:
6433383
Issue Dt:
08/13/2002
Application #:
09357333
Filing Dt:
07/20/1999
Title:
METHODS AND ARRANGEMENTS FOR FORMING A SINGLE INTERPOLY DIELECTRIC LAYER IN A SEMICONDUCTOR DEVICE
3
Patent #:
6411069
Issue Dt:
06/25/2002
Application #:
09387018
Filing Dt:
08/31/1999
Title:
CONTINOUS CAPACITOR DIVIDER SAMPLED REGULATION SCHEME
4
Patent #:
6418054
Issue Dt:
07/09/2002
Application #:
09387421
Filing Dt:
08/31/1999
Title:
EMBEDDED METHODOLOGY TO PROGRAM/ERASE REFERENCE CELLS USED IN SENSING FLASH CELLS
5
Patent #:
6436766
Issue Dt:
08/20/2002
Application #:
09430493
Filing Dt:
10/29/1999
Title:
PROCESS FOR FABRICATING HIGH DENSITY MEMORY CELLS USING A POLYSILICON HARD MASK
6
Patent #:
6410956
Issue Dt:
06/25/2002
Application #:
09478864
Filing Dt:
01/07/2000
Title:
METHOD AND SYSTEM FOR USING A SPACER TO OFFSET IMPLANT DAMAGE AND REDUCE LATERAL DIFFUSION IN FLASH MEMORY DEVICES
7
Patent #:
6420752
Issue Dt:
07/16/2002
Application #:
09502163
Filing Dt:
02/11/2000
Title:
SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACTS USING A LINER OXIDE LAYER
8
Patent #:
6410443
Issue Dt:
06/25/2002
Application #:
09507810
Filing Dt:
02/22/2000
Title:
METHOD FOR REMOVING SEMICONDUCTOR ARC USING ARC CMP BUFFING
9
Patent #:
6429479
Issue Dt:
08/06/2002
Application #:
09522247
Filing Dt:
03/09/2000
Title:
NAND FLASH MEMORY WITH SPECIFIED GATE OXIDE THICKNESS
10
Patent #:
6432618
Issue Dt:
08/13/2002
Application #:
09535255
Filing Dt:
03/23/2000
Title:
METHOD FOR FORMING HIGH QUALITY MULTIPLE THICKNESS OXIDE LAYERS BY REDUCING DESCUM INDUCED DEFECTS
11
Patent #:
6430087
Issue Dt:
08/06/2002
Application #:
09547660
Filing Dt:
04/12/2000
Title:
TRIMMING METHOD AND SYSTEM FOR WORDLINE BOOSTER TO MINIMIZE PROCESS VARIATION OF BOOSTED WORDLINE VOLTAGE
12
Patent #:
6410388
Issue Dt:
06/25/2002
Application #:
09620480
Filing Dt:
07/20/2000
Title:
PROCESS FOR OPTIMIZING POCKET IMPLANT PROFILE BY RTA IMPLANT ANNEALING FOR A NON-VOLATILE SEMICONDUCTOR DEVICE
13
Patent #:
6417082
Issue Dt:
07/09/2002
Application #:
09651684
Filing Dt:
08/30/2000
Title:
Semiconductor structure
14
Patent #:
6436850
Issue Dt:
08/20/2002
Application #:
09652132
Filing Dt:
08/31/2000
Title:
METHOD OF DEGASSING LOW K DIELECTRIC FOR METAL DEPOSITION
15
Patent #:
6429108
Issue Dt:
08/06/2002
Application #:
09652136
Filing Dt:
08/31/2000
Title:
NON-VOLATILE MEMORY DEVICE WITH ENCAPSULATED TUNGSTEN GATE AND METHOD OF MAKING SAME
16
Patent #:
6438031
Issue Dt:
08/20/2002
Application #:
09697815
Filing Dt:
10/26/2000
Title:
METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL USING A SUBSTRATE BIAS
17
Patent #:
6417081
Issue Dt:
07/09/2002
Application #:
09721066
Filing Dt:
11/22/2000
Title:
PROCESS FOR REDUCTION OF CAPACITANCE OF A BITLINE FOR A NON-VOLATILE MEMORY CELL
18
Patent #:
6413820
Issue Dt:
07/02/2002
Application #:
09725843
Filing Dt:
11/30/2000
Publication #:
US20010015456
Pub Dt:
08/23/2001
Title:
METHOD OF FORMING A COMPOSITE INTERPOLY GATE DIELECTRIC
19
Patent #:
6410949
Issue Dt:
06/25/2002
Application #:
09774327
Filing Dt:
01/31/2001
Publication #:
US20010005633
Pub Dt:
06/28/2001
Title:
FLASH MEMORY DEVICE WITH MONITOR STRUCTURE FOR MONITORING SECOND GATE OVER-ETCH
20
Patent #:
6418053
Issue Dt:
07/09/2002
Application #:
09779225
Filing Dt:
02/08/2001
Title:
PIGGYBACK PROGRAMMING USING GRADUATED STEPS FOR MULTI-LEVEL CELL FLASH MEMORY DESIGNS
21
Patent #:
6424566
Issue Dt:
07/23/2002
Application #:
09779864
Filing Dt:
02/08/2001
Title:
PROGRAM RECONNAISSANCE TO ELIMINATE VARIATIONS IN VT DISTRIBUTIONS OF MULTI-LEVEL CELL FLASH MEMORY DESIGNS
22
Patent #:
6438037
Issue Dt:
08/20/2002
Application #:
09851773
Filing Dt:
05/09/2001
Title:
THRESHOLD VOLTAGE COMPACTING FOR NON-VOLATILE SEMICONDUCTOR MEMORY DESIGNS
23
Patent #:
6436778
Issue Dt:
08/20/2002
Application #:
09879738
Filing Dt:
06/12/2001
Title:
NOVEL RE-OXIDATION APPROACH TO IMPROVE PERIPHERAL GATE OXIDE INTEGRITY IN A TUNNEL NITRIDE OXIDATION PROCESS
24
Patent #:
6424570
Issue Dt:
07/23/2002
Application #:
09892189
Filing Dt:
06/26/2001
Title:
MODULATED CHARGE PUMP WHICH USES AN ANALOG TO DIGITAL CONVERTER TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS
25
Patent #:
6436768
Issue Dt:
08/20/2002
Application #:
09893279
Filing Dt:
06/27/2001
Title:
SOURCE DRAIN IMPLANT DURING ONO FORMATION FOR IMPROVED ISOLATION OF SONOS DEVICES
Assignor
1
SPANSION, LLC
Exec Dt:
06/01/2015
Assignee
1
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

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