Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 037577/0066 | |
| Pages: | 5 |
| | Recorded: | 01/25/2016 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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09078404
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Filing Dt:
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05/13/1998
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Title:
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CMOS LOW-VOLTAGE COMPARATOR
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09294576
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Filing Dt:
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04/20/1999
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Title:
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APPARATUS AND METHOD FOR PROVIDING A QUIET TIME BEFORE ANALOG SIGNAL SAMPLING IN A MIXED SIGNAL INTEGRATED CIRCUIT EMPLOYING SYNCHRONOUS AND ASYNCHRONOUS CLOCKING
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09378777
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Filing Dt:
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08/20/1999
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Title:
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CMOS I/O CIRCUIT WITH HIGH-VOLTAGE INPUT TOLERANCE
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10295684
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Filing Dt:
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11/15/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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EDGE SYNCHRONIZED PHASE-LOCKED LOOP CIRCUIT
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Assignee
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| 3112 SCOTT BOULEVARD |
| SANTA CLARA, CALIFORNIA 95054 |
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Correspondence name and address
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QUALCOMM INCORPORATED
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5775 MOREHOUSE DRIVE
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SAN DIEGO, CA 92121
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