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Reel/Frame:054850/0070   Pages: 5
Recorded: 01/07/2021
Attorney Dkt #:HELIC TO ANSYS 12-31-20
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 15
1
Patent #:
Issue Dt:
08/21/2012
Application #:
12359131
Filing Dt:
01/23/2009
Publication #:
Pub Dt:
07/30/2009
Title:
BONDWIRE DESIGN
2
Patent #:
Issue Dt:
07/01/2014
Application #:
12575410
Filing Dt:
10/07/2009
Publication #:
Pub Dt:
04/08/2010
Title:
EXPERT SYSTEM-BASED INTEGRATED INDUCTOR SYNTHESIS AND OPTIMIZATION
3
Patent #:
Issue Dt:
08/20/2013
Application #:
12894102
Filing Dt:
09/29/2010
Publication #:
Pub Dt:
12/22/2011
Title:
SYSTEM AND METHOD FOR DETERMINING SIMULATED RESPONSE EXTREMA FOR INTEGRATED CIRCUIT POWER SUPPLY NETWORKS
4
Patent #:
Issue Dt:
05/12/2015
Application #:
14045305
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
SYSTEM AND METHOD FOR INTEGRATED TRANSFORMER SYNTHESIS AND OPTIMIZATION USING CONSTRAINED OPTIMIZATION PROBLEM
5
Patent #:
Issue Dt:
01/02/2018
Application #:
14056667
Filing Dt:
10/17/2013
Publication #:
Pub Dt:
04/24/2014
Title:
LARGE-SCALE POWER GRID ANALYSIS ON PARALLEL ARCHITECTURES
6
Patent #:
Issue Dt:
10/27/2015
Application #:
14276734
Filing Dt:
05/13/2014
Publication #:
Pub Dt:
09/04/2014
Title:
EXPERT SYSTEM-BASED INTEGRATED INDUCTOR SYNTHESIS AND OPTIMIZATION
7
Patent #:
Issue Dt:
12/29/2015
Application #:
14482296
Filing Dt:
09/10/2014
Title:
SYSTEMS, METHODS AND DEVICES FOR PROVIDING RLCK PARASITIC EXTRACTION BACK-ANNOTATION IN ELECTRONIC DESIGN AUTOMATION
8
Patent #:
Issue Dt:
11/21/2017
Application #:
14710320
Filing Dt:
05/12/2015
Publication #:
Pub Dt:
09/17/2015
Title:
TRANSFORMER SYNTHESIS AND OPTIMIZATION IN INTEGRATED CIRCUIT DESIGN
9
Patent #:
Issue Dt:
04/30/2019
Application #:
14715267
Filing Dt:
05/18/2015
Title:
PRE-COMPUTATION SYSTEM AND METHOD FOR TRANSITION DOMAIN CHARACTERIZATION WITHIN A FLOATING RANDOM WALK BASED MULTI-DIELECTRIC CAPACITANCE EXTRACTION METHODOLOGY
10
Patent #:
Issue Dt:
06/06/2017
Application #:
14754464
Filing Dt:
06/29/2015
Publication #:
Pub Dt:
12/29/2016
Title:
SYNTHESIS OF REDUCED NETLIST HAVING POSITIVE ELEMENTS AND NO CONTROLLED SOURCES
11
Patent #:
Issue Dt:
04/16/2019
Application #:
14754480
Filing Dt:
06/29/2015
Publication #:
Pub Dt:
12/29/2016
Title:
SYNTHESIS OF DC ACCURATE NOISE COMPATIBLE REDUCED NETLIST
12
Patent #:
Issue Dt:
08/22/2017
Application #:
14884651
Filing Dt:
10/15/2015
Publication #:
Pub Dt:
08/24/2017
Title:
EXPERT SYSTEM-BASED INTEGRATED INDUCTOR SYNTHESIS AND OPTIMIZATION
13
Patent #:
Issue Dt:
05/01/2018
Application #:
15145611
Filing Dt:
05/03/2016
Publication #:
Pub Dt:
11/10/2016
Title:
ITERATIVE SOLUTION USING COMPRESSED INDUCTIVE MATRIX FOR EFFICIENT SIMULATION OF VERY-LARGE SCALE CIRCUITS
14
Patent #:
Issue Dt:
07/03/2018
Application #:
15162254
Filing Dt:
05/23/2016
Publication #:
Pub Dt:
11/24/2016
Title:
METHOD OF EXTRACTING CAPACITANCES OF ARBITRARILY ORIENTED 3D INTERCONNECTS
15
Patent #:
Issue Dt:
06/02/2020
Application #:
15845145
Filing Dt:
12/18/2017
Publication #:
Pub Dt:
05/03/2018
Title:
LARGE-SCALE POWER GRID ANALYSIS ON PARALLEL ARCHITECTURES
Assignor
1
Exec Dt:
12/31/2020
Assignee
1
2600 ANSYS DRIVE
CANONSBURG, PENNSYLVANIA 15317
Correspondence name and address
ANSYS INC.
2600 ANSYS DRIVE
CANONSBURG, PA 15317

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