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Total properties:
15
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Patent #:
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Issue Dt:
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04/21/2015
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Application #:
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12835704
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Filing Dt:
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07/13/2010
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Publication #:
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Pub Dt:
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01/19/2012
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Title:
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TWO TERMINAL RESISTIVE SWITCHING DEVICE STRUCTURE AND METHOD OF FABRICATING
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13436714
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Filing Dt:
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03/30/2012
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Publication #:
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Pub Dt:
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07/26/2012
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Title:
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ON/OFF RATIO FOR NON-VOLATILE MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13465188
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Filing Dt:
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05/07/2012
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Publication #:
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Pub Dt:
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08/30/2012
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Title:
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PILLAR STRUCTURE FOR MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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09/08/2015
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Application #:
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13739283
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Filing Dt:
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01/11/2013
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Publication #:
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Pub Dt:
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05/16/2013
| | | | |
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Title:
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RESISTOR STRUCTURE FOR A NON-VOLATILE MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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08/18/2015
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Application #:
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13756518
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Filing Dt:
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01/31/2013
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Title:
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RECTIFIED SWITCHING OF TWO-TERMINAL MEMORY VIA REAL TIME FILAMENT FORMATION
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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14011577
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Filing Dt:
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08/27/2013
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Publication #:
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Pub Dt:
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05/08/2014
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Title:
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PILLAR STRUCTURE FOR MEMORY DEVICE AND METHOD
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Patent #:
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Issue Dt:
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06/20/2017
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Application #:
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14207430
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Filing Dt:
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03/12/2014
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Publication #:
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Pub Dt:
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07/10/2014
| | | | |
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Title:
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REDUCED DIFFUSION IN METAL ELECTRODE FOR TWO-TERMINAL MEMORY
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Patent #:
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Issue Dt:
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11/22/2016
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Application #:
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14341726
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Filing Dt:
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07/25/2014
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Title:
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MLC OTP OPERATION WITH DIODE BEHAVIOR IN ZNO RRAM DEVICES FOR 3D MEMORY
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Patent #:
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Issue Dt:
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05/15/2018
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Application #:
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14573817
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Filing Dt:
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12/17/2014
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Publication #:
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Pub Dt:
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06/04/2015
| | | | |
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Title:
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GUIDED PATH FOR FORMING A CONDUCTIVE FILAMENT IN RRAM
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Patent #:
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Issue Dt:
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02/14/2017
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Application #:
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14613299
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Filing Dt:
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02/03/2015
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Title:
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RESISTIVE RAM WITH PREFERENTAL FILAMENT FORMATION REGION AND METHODS
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Patent #:
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Issue Dt:
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10/18/2016
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Application #:
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14630143
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Filing Dt:
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02/24/2015
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Title:
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METHODS AND APPARATUS FOR BACK-ANNOTATING ERRORS IN A RRAM ARRAY
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Patent #:
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Issue Dt:
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06/11/2019
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Application #:
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14636363
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Filing Dt:
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03/03/2015
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Publication #:
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Pub Dt:
|
11/05/2015
| | | | |
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Title:
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INTEGRATIVE RESISTIVE MEMORY IN BACKEND METAL LAYERS
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|
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Patent #:
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|
Issue Dt:
|
08/28/2018
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Application #:
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15592982
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Filing Dt:
|
05/11/2017
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|
Title:
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FLATNESS OF MEMORY CELL SURFACES
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|
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Patent #:
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|
Issue Dt:
|
11/20/2018
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Application #:
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15637990
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Filing Dt:
|
06/29/2017
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|
Title:
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READ OPERATION WITH DATA LATCH AND SIGNAL TERMINATION FOR 1TNR MEMORY ARRAY
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|
|
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Patent #:
|
|
Issue Dt:
|
11/12/2019
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Application #:
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16193592
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Filing Dt:
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11/16/2018
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Title:
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READ OPERATION WITH DATA LATCH AND SIGNAL TERMINATION FOR 1TNR MEMORY ARRAY
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