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Patent #:
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Issue Dt:
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10/22/1985
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Application #:
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06492102
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Filing Dt:
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05/06/1983
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Title:
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MOS VOLTAGE COMPARATOR AND METHOD
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Patent #:
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Issue Dt:
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10/06/1987
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Application #:
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06831955
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Filing Dt:
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02/24/1986
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Title:
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PRODUCTION OF OXY-METALLO-ORGANIC POLYMER
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Patent #:
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Issue Dt:
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06/07/1988
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Application #:
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06837560
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Filing Dt:
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03/03/1986
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Title:
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DIFFUSED FIELD CMOS-BULK PROCESS
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Patent #:
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Issue Dt:
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10/06/1987
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Application #:
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06856302
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Filing Dt:
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04/28/1986
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Title:
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METHOD OF MAKING HARDENED NMOS SUB-MICRON FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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09/22/1987
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Application #:
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06856304
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Filing Dt:
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04/28/1986
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Title:
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METHOD OF MAKING HARDENED CMOS SUB-MICRON FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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06/30/1987
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Application #:
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06871655
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Filing Dt:
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06/06/1986
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Title:
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PLANARIZATION PROCESS FOR DOUBLE METAL MOS USING SPIN-ON GLASS AS A SACRIFICIAL LAYER
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Patent #:
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Issue Dt:
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08/27/1991
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Application #:
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07066593
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Filing Dt:
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06/24/1987
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Title:
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EXTREMELY SMALL AREA NPN LATERAL TRANSISTOR
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Patent #:
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Issue Dt:
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09/10/1991
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Application #:
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07066663
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Filing Dt:
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06/24/1987
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Title:
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PNP TYPE LATERAL TRANSISTOR WITH MINIMAL SUBSTRATE OPERATION INTERFERENCE
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Patent #:
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Issue Dt:
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08/07/1990
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Application #:
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07073591
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Filing Dt:
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07/15/1987
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Title:
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SUB-MICRON DEVICES WITH METHOD FOR FORMING SUB-MICRON CONTACTS
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Patent #:
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Issue Dt:
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11/07/1989
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Application #:
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07105413
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Filing Dt:
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10/07/1987
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Title:
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DIFFUSED FIELD CMOS-BULK PROCESS AND CMOS TRANSISTORS
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09002326
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Filing Dt:
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01/02/1998
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Title:
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DAMASCENE METALLIZTION PROCESS AND STRUCTURE
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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09070314
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Filing Dt:
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04/30/1998
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Title:
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PHYSICAL VAPOR DEPOSITION CHAMBER
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09070372
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Filing Dt:
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04/30/1998
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Title:
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APPARAUS FOR REDUCING COOL CHAMBER PARTICLES
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09149910
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Filing Dt:
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09/09/1998
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Title:
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DUAL-DAMASCENE INTERCONNECT STRUCTURES EMPLOYING LOW-K DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09158337
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Filing Dt:
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09/22/1998
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Title:
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INTERCONNECT WITH LOW DIELECTRIC CONSTANT INSULATORS FOR SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURING
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09160834
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Filing Dt:
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09/25/1998
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Title:
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METHOD FOR FABRICATING INTERPOLY DIELECTRICS IN NON-VOLATILE STACKED-GATE MEMORY STRUCTURES
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Patent #:
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Issue Dt:
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06/06/2000
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Application #:
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09161176
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Filing Dt:
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09/25/1998
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Title:
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METHODS FOR FORMING HIGH-PERFORMING DUAL-DAMASCENE INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09162185
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Filing Dt:
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09/28/1998
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Title:
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NITRIDE ETCH STOP FOR POISONED UNLANDED VIAS
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09162272
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Filing Dt:
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09/29/1998
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Title:
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ELEVATED CHANNEL MOSFET
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09163135
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Filing Dt:
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09/29/1998
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Title:
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IMPROVED METHODS FOR BARRIER LAYER FORMATION
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Patent #:
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Issue Dt:
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06/12/2001
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Application #:
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09163967
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Filing Dt:
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09/30/1998
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Title:
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IC INTERCONNECT STRUCTURES AND METHODS FOR MAKING SAME
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09193499
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Filing Dt:
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11/16/1998
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Title:
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INTERCONNECT STRUCTURE AND METHOD EMPLOYING AIR GAPS BETWEEN METAL LINES AND BETWEEN METAL LAYERS
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09224339
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Filing Dt:
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12/31/1998
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Title:
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DUAL-DAMASCENE INTERCONNECT STRUCTURES AND METHODS OF FABRICATING SAME
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09241728
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Filing Dt:
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02/02/1999
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Title:
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THIN-FILM CAPACITORS AND METHODS FOR FORMING THE SAME
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09247234
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Filing Dt:
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02/09/1999
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Title:
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METHODS AND APPARATUS FOR STRIPPING PHOTORESIST AND POLYMER LAYERS FROM A SEMICONDUCTOR STACK IN A NON-CORROSIVE ENVIRONMENT
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09275628
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Filing Dt:
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03/24/1999
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Title:
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METHOD AND APPARATUS FOR HIGH-RESOLUTION IN-SITU PLASMA ETCHING OF INORGANIC AND METAL FILMS
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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09317536
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Filing Dt:
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05/24/1999
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Title:
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INTERCONNECT WITH LOW DIELECTRIC CONSTANT INSULATORS FOR SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURING
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09329569
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Filing Dt:
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06/10/1999
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Title:
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METHOD FOR DUAL DAMASCENE PROCESS USING ELECTRON BEAM AND ION IMPLANTATION CURE METHODS FOR LOW DIELECTRIC CONSTANT MATERIALS
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09369982
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Filing Dt:
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08/06/1999
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Title:
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SEMICONDUCTOR DEVICE HAVING A PASSIVATION LAYER AND METHOD FOR ITS FABRICATION
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|
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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09370508
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Filing Dt:
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08/06/1999
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Title:
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ANTI-REFLECTIVE COATING AND PROCESS USING AN ANTI-REFLECTIVE COATING
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|
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Patent #:
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|
Issue Dt:
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05/01/2001
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Application #:
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09390445
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Filing Dt:
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09/07/1999
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Title:
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MICROELECTRONIC INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME
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|
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Patent #:
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|
Issue Dt:
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05/15/2001
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Application #:
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09418399
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Filing Dt:
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10/14/1999
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Title:
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METHOD AND APPARATUS FOR PRE-CONDITIONING FLASH MEMORY DEVICES
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|
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09427407
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Filing Dt:
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10/25/1999
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Title:
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METHOD OF FABRICATING SEMICONDUCTOR DEVICES USING SHALLOW TRENCH ISOLATION WITH REDUCED NARROW CHANNEL EFFECT
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09430729
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Filing Dt:
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10/29/1999
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Title:
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SEMICONDUCTOR DEVICE AND PROCESS
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09432046
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Filing Dt:
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11/01/1999
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Title:
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DIELECTRIC MATERIAL SUITABLE FOR MICROELECTRONIC CIRCUITS AND METHOD OF FORMING SAME
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|
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09465532
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Filing Dt:
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12/16/1999
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Title:
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BONDING PAD AND SUPPORT STRUCTURE AND METHOD FOR THEIR FABRICATION
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|
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Patent #:
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|
Issue Dt:
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08/05/2003
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Application #:
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09497360
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Filing Dt:
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02/03/2000
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Title:
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PRE-CLEAN CHAMBER
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09499244
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Filing Dt:
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02/07/2000
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Title:
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TRANSPARENT PHASE SHIFT MASK FOR FABRICATION OF SMALL FEATURE SIZES
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Patent #:
|
|
Issue Dt:
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12/11/2001
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Application #:
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09512396
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Filing Dt:
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02/24/2000
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Title:
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Method For Fabrication And Structure For High Aspect Ratio Vias
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|
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Patent #:
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|
Issue Dt:
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06/26/2001
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Application #:
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09512397
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Filing Dt:
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02/24/2000
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Title:
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Method for fabrication of ceramic tantalum nitride and improved structures based thereon
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|
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Patent #:
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|
Issue Dt:
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09/03/2002
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Application #:
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09559292
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Filing Dt:
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04/25/2000
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Title:
|
FABRICATION OF IMPROVED LOW-K DIELECTRIC STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
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Application #:
|
09569890
|
Filing Dt:
|
05/11/2000
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Title:
|
Method for fabrication of damascene interconnects and related structures
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
09578229
|
Filing Dt:
|
05/24/2000
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Title:
|
STRUCTURE AND METHOD FOR FABRICATION OF AN IMPROVED CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09583593
|
Filing Dt:
|
05/31/2000
|
Title:
|
METHOD AND APPARATUS FOR IMPROVING A DARK FIELD INSPECTION ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09606778
|
Filing Dt:
|
06/28/2000
|
Title:
|
Technique for reducing 1/F noise in mosfets
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09616233
|
Filing Dt:
|
07/14/2000
|
Title:
|
ELEVATED CHANNEL MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2001
|
Application #:
|
09627505
|
Filing Dt:
|
07/28/2000
|
Title:
|
METHOD FOR FABRICATION OF ON-CHIP INDUCTORS AND RELATED STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2002
|
Application #:
|
09649442
|
Filing Dt:
|
08/25/2000
|
Title:
|
METHOD FOR FABRICATION OF HIGH INDUCTANCE INDUCTORS AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
09653982
|
Filing Dt:
|
09/01/2000
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Title:
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BIPOLAR TRANSISTOR WITH REDUCED BASE RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
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Application #:
|
09658483
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Filing Dt:
|
09/08/2000
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Title:
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METHOD FOR FABRICATING ON-CHIP INDUCTORS AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09667274
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Filing Dt:
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09/22/2000
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Title:
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Method for independent control of polycrystalline silicon-germanium in a silicon-germanium HBT and related structure
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09667660
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Filing Dt:
|
09/22/2000
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Title:
|
Method for elimination of contaminants prior to epitaxy
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|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
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Application #:
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09668790
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Filing Dt:
|
09/22/2000
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Title:
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METHOD FOR INCREASING INDUCTANCE OF ON-CHIP INDUCTORS AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
09671928
|
Filing Dt:
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09/27/2000
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Title:
|
Apparatus for high-resolution in-situ plasma etching of inorganic and metal films
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09677707
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Filing Dt:
|
09/30/2000
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Title:
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STRUCTURE FOR REDUCTION OF BASE AND EMITTER RESISTANCE AND RELATED METHOD
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|
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Patent #:
|
|
Issue Dt:
|
09/03/2002
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Application #:
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09677708
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Filing Dt:
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09/30/2000
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Title:
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METHOD FOR REDUCING CONTAMINATION PRIOR TO EPITAXIAL GROWTH AND RELATED STRUCTURE
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|
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Patent #:
|
|
Issue Dt:
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05/25/2004
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Application #:
|
09716350
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Filing Dt:
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11/20/2000
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Title:
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STRUCTURE FOR BONDING PAD AND METHOD FOR ITS FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
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Application #:
|
09721128
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Filing Dt:
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11/17/2000
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Title:
|
METHOD FOR FABRICATING INTERFACIAL OXIDE IN A TRANSISTOR AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
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Application #:
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09721342
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Filing Dt:
|
11/22/2000
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Title:
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METHOD FOR FABRICATION OF AN MIM CAPACITOR AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
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Application #:
|
09721344
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Filing Dt:
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11/22/2000
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Title:
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METHOD FOR FABRICATING A SELF-ALIGNED EMITTER IN A BIPOLAR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
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Application #:
|
09721551
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Filing Dt:
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11/17/2000
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Title:
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METHOD FOR CONTROLLING CRITICAL DIMENSION IN A POLYCRYSTALLINE SILICON EMITTER AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2004
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Application #:
|
09761489
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Filing Dt:
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01/16/2001
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Publication #:
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|
Pub Dt:
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08/30/2001
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Title:
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METHOD FOR FABRICATION OF CERAMIC TANTALUM NITRIDE AND IMPOROVED STRUCTURES BASED THEREON
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2002
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Application #:
|
09772726
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Filing Dt:
|
01/30/2001
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Publication #:
|
|
Pub Dt:
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09/06/2001
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Title:
|
Thin-film capacitors and methods for forming the same
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
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Application #:
|
09811321
|
Filing Dt:
|
03/17/2001
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Publication #:
|
|
Pub Dt:
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09/19/2002
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Title:
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HIGH PERFORMANCE BIPOLAR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
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Application #:
|
09850028
|
Filing Dt:
|
05/07/2001
|
Title:
|
METHOD FOR REDUCING BASE TO COLLECTOR CAPACITANCE AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
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Application #:
|
09851228
|
Filing Dt:
|
05/08/2001
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Title:
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METHOD FOR OPENING A SEMICONDUCTOR REGION FOR FABRICATING AN HBT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
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Application #:
|
09852183
|
Filing Dt:
|
05/09/2001
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Title:
|
METHOD TO REDUCE EMITTER TO BASE CAPACITANCE AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
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Application #:
|
09853735
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Filing Dt:
|
05/10/2001
|
Title:
|
METHOD FOR FABRICATING LATERAL PNP HETEROJUNCTION BIPOLAR TRANSISTOR AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
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Application #:
|
09955677
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Filing Dt:
|
09/19/2001
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Publication #:
|
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Pub Dt:
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02/07/2002
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Title:
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METHOD AND APPARATUS FOR HIGH-RESOLUTION IN-SITU PLASMA ETCHING OF INORGANIC AND METAL FILMS
|
|
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09967115
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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02/07/2002
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Title:
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MICROELECTRONIC AIR-GAP STRUCTURES AND METHODS OF FORMING THE SAME
|
|
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Patent #:
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Issue Dt:
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11/25/2003
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Application #:
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10015411
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Filing Dt:
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12/11/2001
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Publication #:
|
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Pub Dt:
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08/15/2002
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Title:
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REDUCED 1/F NOISE IN MOSFETS
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|
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Patent #:
|
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Issue Dt:
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05/06/2003
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Application #:
|
10053980
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Filing Dt:
|
01/22/2002
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Publication #:
|
|
Pub Dt:
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05/23/2002
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Title:
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METHOD FOR INDEPENDENT CONTROL OF POLYCRYSTALLINE SILICON-GERMANIUM IN AN HBT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10066871
|
Filing Dt:
|
02/04/2002
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
Title:
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BAND GAP COMPENSATED HBT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10066872
|
Filing Dt:
|
02/04/2002
|
Publication #:
|
|
Pub Dt:
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08/07/2003
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Title:
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METHOD AND STRUCTURE FOR ELIMINATING COLLECTOR-BASE BAND GAP DISCONTINUITY IN AN HBT
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|
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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10067034
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Filing Dt:
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02/04/2002
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Title:
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STRUCTURE FOR A SELECTIVE EPITAXIAL HBT EMITTER
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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10067159
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Filing Dt:
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02/04/2002
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Title:
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METHOD FOR CONTROLLING CRITICAL DIMENSION IN AN HBT EMITTER AND RELATED STRUCTURE
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10073751
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Filing Dt:
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02/09/2002
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Publication #:
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Pub Dt:
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09/19/2002
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Title:
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METHOD FOR FABRICATING A METAL RESISTOR IN AN IC CHIP AND RELATED STRUCTURE
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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10075701
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Filing Dt:
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02/14/2002
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Title:
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METHOD FOR CONTROLLING AN EMITTER WINDOW OPENING IN AN HBT AND RELATED STRUCTURE
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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10114749
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Filing Dt:
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04/01/2002
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Title:
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ELIMINATION OF CONTAMINANTS PRIOR TO EPITAXY AND RELATED STRUCTURE
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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10133690
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Filing Dt:
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04/26/2002
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Publication #:
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Pub Dt:
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08/29/2002
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Title:
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METHOD FOR REDUCING BASE RESISTANCE IN A BIPOLAR TRANSISTOR
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|
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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10133697
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Filing Dt:
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04/26/2002
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Publication #:
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Pub Dt:
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08/29/2002
| | | | |
Title:
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REDUCED BASE RESISTANCE IN A BIPOLAR TRANSISTOR
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|
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Patent #:
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|
Issue Dt:
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07/01/2003
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Application #:
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10160979
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Filing Dt:
|
06/01/2002
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Title:
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METHOD FOR INTEGRATING A METASTABLE BASE INTO A HIGH-PERFORMANCE HBT AND RELATED STRUCTURE
|
|
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Patent #:
|
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Issue Dt:
|
01/27/2004
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Application #:
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10163386
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Filing Dt:
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06/04/2002
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Title:
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A BIPOLAR TRANSISTOR AND RELATED STRUCTURE
|
|
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Patent #:
|
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Issue Dt:
|
07/08/2003
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Application #:
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10163661
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Filing Dt:
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06/04/2002
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Title:
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METHOD AND SYSTEM FOR FABRICATING A BIPOLAR TRANSISTOR AND RELATED STRUCTURE
|
|
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Patent #:
|
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Issue Dt:
|
01/04/2005
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Application #:
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10190459
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Filing Dt:
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07/05/2002
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Title:
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DAMASCENE TRENCH CAPACITOR FOR MIXED-SIGNAL/RF IC APPLICATIONS
|
|
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Patent #:
|
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Issue Dt:
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07/22/2003
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Application #:
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10193056
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Filing Dt:
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07/10/2002
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Publication #:
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Pub Dt:
|
12/05/2002
| | | | |
Title:
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METHOD FOR REDUCING CONTAMINATION PRIOR TO EPITAXIAL GROWTH AND RELATED STRUCTURE
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|
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10193638
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Filing Dt:
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07/10/2002
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Publication #:
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Pub Dt:
|
12/26/2002
| | | | |
Title:
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A BIPOLAR TRANSISTOR WITH REDUCED EMITTER TO BASE CAPACITANCE
|
|
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Patent #:
|
|
Issue Dt:
|
08/09/2005
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Application #:
|
10199750
|
Filing Dt:
|
07/18/2002
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Title:
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ELECTROSTATIC DISCHARGE CLAMP
|
|
|
Patent #:
|
|
Issue Dt:
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08/31/2004
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Application #:
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10218527
|
Filing Dt:
|
08/13/2002
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Title:
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METHOD FOR FABRICATING A SELF-ALIGNED BIPOLAR TRANSISTOR AND RELATED STRUCTURE
|
|
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Patent #:
|
|
Issue Dt:
|
12/14/2004
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Application #:
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10262714
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Filing Dt:
|
10/02/2002
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Title:
|
METHOD FOR FORMING CMOS TRANSISTOR SPACERS IN A BICMOS PROCESS AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
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Application #:
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10265334
|
Filing Dt:
|
10/04/2002
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Title:
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AN HBT HAVING A CONTROLLED EMITTER WINDOW OPENING
|
|
|
Patent #:
|
|
Issue Dt:
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07/06/2004
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Application #:
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10272888
|
Filing Dt:
|
10/16/2002
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Title:
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TEMPERATURE INSENSITIVE RESISTOR IN AN IC CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
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Application #:
|
10289821
|
Filing Dt:
|
11/06/2002
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Title:
|
INTERFACIAL OXIDE IN A TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10290955
|
Filing Dt:
|
11/07/2002
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Title:
|
REDUCING EXTRINSIC BASE RESISTANCE AND IMPROVING MANUFACTURABILITY IN AN NPN TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
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Application #:
|
10290975
|
Filing Dt:
|
11/07/2002
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Publication #:
|
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Pub Dt:
|
05/13/2004
| | | | |
Title:
|
HIGH GAIN BIPOLAR TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2004
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Application #:
|
10290976
|
Filing Dt:
|
11/07/2002
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Title:
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METHOD FOR REDUCING EXTRINSIC BASE RESISTANCE AND IMPROVING MANUFACTURABILITY IN AN NPN TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
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Application #:
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10291116
|
Filing Dt:
|
11/08/2002
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Title:
|
TRANSPARENT PHASE SHIFT MASK FOR FABRICATION OF SMALL FEATURE SIZES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10301885
|
Filing Dt:
|
11/21/2002
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Title:
|
METHOD FOR ELIMINATING COLLECTOR-BASE BAND GAP IN AN HBT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2004
|
Application #:
|
10302308
|
Filing Dt:
|
11/22/2002
|
Title:
|
METHOD FOR FABRICATING A SELECTIVE EPITAXIAL HBT EMITTER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10308661
|
Filing Dt:
|
12/02/2002
|
Title:
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METHOD FOR FABRICATING A SELF-ALIGNED EMITTER IN A BIPOLAR TRANSISTOR
|
|