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Total properties:
24
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10688047
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Filing Dt:
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10/17/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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END OF RANGE (EOR) SECONDARY DEFECT ENGINEERING USING SUBSTITUTIONAL CARBON DOPING
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10689923
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Filing Dt:
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10/17/2003
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Publication #:
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Pub Dt:
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04/21/2005
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Title:
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INTEGRATED CIRCUIT WITH PROTECTED IMPLANTATION PROFILES AND METHOD FOR THE FORMATION THEREOF
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10690998
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Filing Dt:
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10/22/2003
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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METHOD TO FABRICATE ALIGNED DUAL DAMASCENE OPENINGS
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Patent #:
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Issue Dt:
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11/06/2007
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Application #:
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10778293
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Filing Dt:
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02/13/2004
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Publication #:
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Pub Dt:
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08/18/2005
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Title:
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METHOD TO FORM A CONTACT HOLE
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Patent #:
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Issue Dt:
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09/11/2007
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Application #:
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10913214
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Filing Dt:
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08/06/2004
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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METHODS FOR ELIMINATION OF ARSENIC BASED DEFECTS IN SEMICONDUCTOR DEVICES WITH ISOLATION REGIONS
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11029835
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Filing Dt:
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01/05/2005
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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HIGH DENSITY PLASMA AND BIAS RF POWER PROCESS TO MAKE STABLE FSG WITH LESS FREE F AND SIN WITH LESS H TO ENHANCE THE FSG/SIN INTEGRATION RELIABILITY
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11029881
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Filing Dt:
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01/05/2005
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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METHOD FOR CUO REDUCTION BY USING TWO STEP NITROGEN OXYGEN AND REDUCING PLASMA TREATMENT
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11034952
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Filing Dt:
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01/13/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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METHOD FOR REDUCING ARGON DIFFUSION FROM HIGH DENSITY PLASMA FILMS
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11039429
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Filing Dt:
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01/20/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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LASER ACTIVATION OF IMPLANTED CONTACT PLUG FOR MEMORY BITLINE FABRICATION
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11122667
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Filing Dt:
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05/04/2005
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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COMPOSITE STRESS SPACER
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11160624
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Filing Dt:
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06/30/2005
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Publication #:
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Pub Dt:
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01/04/2007
| | | | |
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Title:
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INTEGRATED CIRCUIT SYSTEM USING DUAL DAMASCENE PROCESS
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Patent #:
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Issue Dt:
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06/03/2008
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Application #:
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11161722
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Filing Dt:
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08/15/2005
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Publication #:
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Pub Dt:
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02/15/2007
| | | | |
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Title:
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A METHOD FOR USING A CU BEOL PROCESS TO FABRICATE AN INTEGRATED CIRCUIT (IC) ORIGINALLY HAVING AN AL DESIGN
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|
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11174805
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Filing Dt:
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07/05/2005
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Publication #:
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Pub Dt:
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01/05/2006
| | | | |
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Title:
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METHOD TO FABRICATE ALIGNED DUAL DAMACENE OPENINGS
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Patent #:
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Issue Dt:
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12/18/2007
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Application #:
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11299542
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Filing Dt:
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12/12/2005
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Publication #:
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Pub Dt:
|
06/14/2007
| | | | |
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Title:
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METHOD TO ENHANCE DEVICE PERFORMANCE WITH SELECTIVE STRESS RELIEF
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|
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11358934
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Filing Dt:
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02/22/2006
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Publication #:
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Pub Dt:
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08/23/2007
| | | | |
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Title:
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ENTIRE ENCAPSULATION OF CU INTERCONNECTS USING SELF-ALIGNED CUSIN FILM
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|
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Patent #:
|
|
Issue Dt:
|
03/10/2009
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Application #:
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11421047
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Filing Dt:
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05/30/2006
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Publication #:
|
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Pub Dt:
|
10/05/2006
| | | | |
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Title:
|
INTEGRATED CIRCUIT WITH PROTECTED IMPLANTATION PROFILES AND METHOD FOR THE FORMATION THEREOF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/15/2008
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Application #:
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11462846
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Filing Dt:
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08/07/2006
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Publication #:
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Pub Dt:
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11/30/2006
| | | | |
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Title:
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END OF RANGE (EOR) SECONDARY DEFECT ENGINEERING USING CHEMICAL VAPOR DEPOSITION (CVD) SUBSTITUTIONAL CARBON DOPING
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|
|
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Patent #:
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Issue Dt:
|
06/04/2013
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Application #:
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11465793
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING GATE SHIELD AND/OR GROUND SHIELD
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|
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11481213
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Filing Dt:
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07/05/2006
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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METHOD OF INTEGRATING TRIPLE GATE OXIDE THICKNESS
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|
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Patent #:
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Issue Dt:
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11/08/2011
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Application #:
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11614961
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Filing Dt:
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12/21/2006
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Publication #:
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Pub Dt:
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06/26/2008
| | | | |
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Title:
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METHOD OF MANUFACTURE OF AN INTEGRATED CIRCUIT SYSTEM WITH SELF-ALIGNED ISOLATION STRUCTURES
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|
|
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Patent #:
|
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Issue Dt:
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02/09/2010
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Application #:
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11930230
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Filing Dt:
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10/31/2007
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Publication #:
|
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Pub Dt:
|
02/28/2008
| | | | |
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Title:
|
METHOD TO ENHANCE DEVICE PERFORMANCE WITH SELECTIVE STRESS RELIEF
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/23/2011
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Application #:
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11972809
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Filing Dt:
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01/11/2008
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Publication #:
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Pub Dt:
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07/16/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING MULTIPLE EXPOSURE DUMMY PATTERNING TECHNOLOGY
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|
|
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Patent #:
|
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Issue Dt:
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12/25/2012
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Application #:
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12048994
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Filing Dt:
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03/14/2008
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Publication #:
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Pub Dt:
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07/24/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED SPACERS
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Patent #:
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Issue Dt:
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04/17/2012
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Application #:
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12247479
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Filing Dt:
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10/08/2008
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Publication #:
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Pub Dt:
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04/08/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELECTRICAL CONTACT FORMATION
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