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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	024278/0084			Pages:	8
		Recorded:	04/23/2010
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 11

Patent #:	6226715	Issue Dt:	05/01/2001	Application #:	09306069	Filing Dt:	05/06/1999
Title:	DATA PROCESSING CIRCUIT WITH CACHE MEMORY AND CACHE MANAGEMENT UNIT FOR ARRANGING SELECTED STORAGE LOCATION IN THE CACHE MEMORY FOR REUSE DEPENDENT ON A POS ITION OF PARTICULAR ADDRESS RELATIVE TO CURRENT ADDRESS

Patent #:	6457075	Issue Dt:	09/24/2002	Application #:	09313244	Filing Dt:	05/17/1999
Title:	SYNCHRONOUS MEMORY SYSTEM WITH AUTOMATIC BURST MODE SWITCHING AS A FUNCTION OF THE SELECTED BUS MASTER

Patent #:	6895518	Issue Dt:	05/17/2005	Application #:	09870918	Filing Dt:	05/31/2001
Publication #:	US20020184543	Pub Dt:	12/05/2002
Title:	POWER AND FREQUENCY ADJUSTABLE UART DEVICE

Patent #:	6611158	Issue Dt:	08/26/2003	Application #:	09912146	Filing Dt:	07/24/2001
Publication #:	US20030020524	Pub Dt:	01/30/2003
Title:	METHOD AND SYSTEM USING A COMMON RESET AND A SLOWER RESET CLOCK

Patent #:	6931524	Issue Dt:	08/16/2005	Application #:	09942129	Filing Dt:	08/29/2001
Publication #:	US20030046522	Pub Dt:	03/06/2003
Title:	SYSTEM FOR BUS MONITORING USING A RECONFIGURABLE BUS MONITOR WHICH IS ADAPTED TO REPORT BACK TO CPU IN RESPONSE TO DETECTING CERTAIN SELECTED EVENTS

Patent #:	7020807	Issue Dt:	03/28/2006	Application #:	09955704	Filing Dt:	09/19/2001
Publication #:	US20030056052	Pub Dt:	03/20/2003
Title:	DATA COMMUNICATION BUS TRAFFIC GENERATOR ARRANGEMENT

Patent #:	8063623	Issue Dt:	11/22/2011	Application #:	12299305	Filing Dt:	10/31/2008
Publication #:	US20090315532	Pub Dt:	12/24/2009
Title:	VERY LOW POWER ANALOG COMPENSATION CIRCUIT

Patent #:	8106705	Issue Dt:	01/31/2012	Application #:	12299726	Filing Dt:	11/05/2008
Publication #:	US20090189649	Pub Dt:	07/30/2009
Title:	CONTROL CIRCUIT FOR PVT CONDITIONS OF A MODULE

Patent #:	8325618	Issue Dt:	12/04/2012	Application #:	12307411	Filing Dt:	07/02/2009
Publication #:	US20100002589	Pub Dt:	01/07/2010
Title:	ELECTRONIC DEVICE, SYTEM ON CHIP AND METHOD FOR MONITORING A DATA FLOW

Patent #:	8330491	Issue Dt:	12/11/2012	Application #:	12532201	Filing Dt:	09/21/2009
Publication #:	US20100085080	Pub Dt:	04/08/2010
Title:	ELECTRONIC DEVICE WITH A HIGH VOLTAGE TOLERANT UNIT

Assignor

Exec Dt:

11/16/2009

Assignee

47100 BAYSIDE PARKWAY

FREMONT, CALIFORNIA 94538

Correspondence name and address
	JONES DAY - XI CHEN
	222 EAST 41ST STREET
	NEW YORK, NY 10017

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