Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 035760/0085 | |
| Pages: | 7 |
| | Recorded: | 05/24/2015 | | |
Conveyance: | CONFIRMATORY ASSIGNMENT |
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Total properties:
2
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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08859592
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Filing Dt:
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05/20/1997
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Title:
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METHOD FOR INSPECTING AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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09819287
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Filing Dt:
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03/28/2001
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Publication #:
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Pub Dt:
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08/16/2001
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Title:
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METHOD AND APPARATUS FOR INSPECTING AN INTEGRATED CIRCUIT BY MEASURING VOLTAGE ON A SIGNAL LINE
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Assignee
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100 EAST 42ND STREET |
NEW YORK, NEW YORK 10017 |
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Correspondence name and address
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DAVID L. SCHAEFFER
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411 EAST PLUMERIA DRIVE, MS41
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NXP SEMICONDUCTORS, IP&L
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SAN JOSE, CA 95134
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