Total properties:
30
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Patent #:
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Issue Dt:
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09/28/2010
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Application #:
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11779685
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Filing Dt:
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07/18/2007
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Publication #:
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Pub Dt:
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09/11/2008
| | | | |
Title:
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PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11829410
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Filing Dt:
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07/27/2007
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Publication #:
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Pub Dt:
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08/21/2008
| | | | |
Title:
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NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11840692
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Filing Dt:
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08/17/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM
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Patent #:
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Issue Dt:
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08/25/2015
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Application #:
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11873330
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Filing Dt:
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10/16/2007
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Publication #:
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Pub Dt:
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10/23/2008
| | | | |
Title:
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BALANCED PSEUDO-RANDOM BINARY SEQUENCE GENERATOR
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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12134451
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Filing Dt:
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06/06/2008
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Publication #:
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Pub Dt:
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12/11/2008
| | | | |
Title:
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DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
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Patent #:
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Issue Dt:
|
11/02/2010
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Application #:
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12275701
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Filing Dt:
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11/21/2008
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Publication #:
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Pub Dt:
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03/19/2009
| | | | |
Title:
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MEMORY WITH OUTPUT CONTROL
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12635280
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Filing Dt:
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12/10/2009
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Publication #:
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Pub Dt:
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07/08/2010
| | | | |
Title:
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NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
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Patent #:
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Issue Dt:
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09/23/2014
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Application #:
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12785099
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Filing Dt:
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05/21/2010
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Publication #:
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Pub Dt:
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09/09/2010
| | | | |
Title:
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PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
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|
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Patent #:
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Issue Dt:
|
06/12/2012
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Application #:
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12882931
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Filing Dt:
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09/15/2010
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Publication #:
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Pub Dt:
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01/06/2011
| | | | |
Title:
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MEMORY WITH OUTPUT CONTROL
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Patent #:
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Issue Dt:
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10/11/2011
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Application #:
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12915796
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Filing Dt:
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10/29/2010
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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13091479
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Filing Dt:
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04/21/2011
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Publication #:
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Pub Dt:
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08/11/2011
| | | | |
Title:
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SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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13239813
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Filing Dt:
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09/22/2011
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Publication #:
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Pub Dt:
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01/26/2012
| | | | |
Title:
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NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
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|
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Patent #:
|
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Issue Dt:
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09/30/2014
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Application #:
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13248330
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Filing Dt:
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09/29/2011
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Publication #:
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Pub Dt:
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01/26/2012
| | | | |
Title:
|
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
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Patent #:
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|
Issue Dt:
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09/23/2014
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Application #:
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13302413
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Filing Dt:
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11/22/2011
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Publication #:
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Pub Dt:
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03/15/2012
| | | | |
Title:
|
SYSTEM AND METHOD OF PAGE BUFFER OPERATION FOR MEMORY DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
09/17/2013
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Application #:
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13365913
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Filing Dt:
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02/03/2012
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Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME
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|
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Patent #:
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|
Issue Dt:
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04/23/2013
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Application #:
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13463339
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Filing Dt:
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05/03/2012
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Publication #:
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Pub Dt:
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08/23/2012
| | | | |
Title:
|
MEMORY WITH OUTPUT CONTROL
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|
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Patent #:
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|
Issue Dt:
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10/08/2013
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Application #:
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13757250
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Filing Dt:
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02/01/2013
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Publication #:
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Pub Dt:
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06/06/2013
| | | | |
Title:
|
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
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Patent #:
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Issue Dt:
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02/18/2014
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Application #:
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13867437
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Filing Dt:
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04/22/2013
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Publication #:
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|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
MEMORY WITH OUTPUT CONTROL
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|
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Patent #:
|
|
Issue Dt:
|
07/01/2014
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Application #:
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14022805
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Filing Dt:
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09/10/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
|
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
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|
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Patent #:
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Issue Dt:
|
02/09/2016
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Application #:
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14156047
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Filing Dt:
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01/15/2014
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Publication #:
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Pub Dt:
|
05/15/2014
| | | | |
Title:
|
MEMORY WITH OUTPUT CONTROL
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|
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Patent #:
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|
Issue Dt:
|
12/05/2017
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Application #:
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14457567
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Filing Dt:
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08/12/2014
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Publication #:
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Pub Dt:
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02/12/2015
| | | | |
Title:
|
SYSTEM AND METHOD OF PAGE BUFFER OPERATION FOR MEMORY DEVICES
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Patent #:
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|
Issue Dt:
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03/29/2016
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Application #:
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14499275
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Filing Dt:
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09/29/2014
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Publication #:
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Pub Dt:
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01/08/2015
| | | | |
Title:
|
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
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|
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Patent #:
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|
Issue Dt:
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12/20/2016
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Application #:
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14984303
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Filing Dt:
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12/30/2015
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Publication #:
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Pub Dt:
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07/21/2016
| | | | |
Title:
|
FLASH MEMORY SYSTEM
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|
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Patent #:
|
|
Issue Dt:
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10/03/2017
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Application #:
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15345552
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Filing Dt:
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11/08/2016
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Publication #:
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Pub Dt:
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03/16/2017
| | | | |
Title:
|
FLASH MEMORY SYSTEM
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|
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Patent #:
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|
Issue Dt:
|
03/31/2020
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Application #:
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15457680
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Filing Dt:
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03/13/2017
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Publication #:
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|
Pub Dt:
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12/20/2018
| | | | |
Title:
|
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
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|
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Patent #:
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|
Issue Dt:
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05/08/2018
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Application #:
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15692206
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Filing Dt:
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08/31/2017
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Publication #:
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|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
FLASH MEMORY DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
05/15/2018
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Application #:
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15868219
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Filing Dt:
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01/11/2018
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Publication #:
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Pub Dt:
|
05/17/2018
| | | | |
Title:
|
MEMORY WITH OUTPUT CONTROL
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|
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Patent #:
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|
Issue Dt:
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03/05/2019
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Application #:
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15937937
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Filing Dt:
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03/28/2018
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Publication #:
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Pub Dt:
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09/13/2018
| | | | |
Title:
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NON-VOLATILE MEMORY DEVICE
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|
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Patent #:
|
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Issue Dt:
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06/09/2020
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Application #:
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16249482
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Filing Dt:
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01/16/2019
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Publication #:
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Pub Dt:
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07/11/2019
| | | | |
Title:
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NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/20/2021
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Application #:
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16795786
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Filing Dt:
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02/20/2020
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Publication #:
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Pub Dt:
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08/20/2020
| | | | |
Title:
|
DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS
|
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