skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:050744/0097   Pages: 500
Recorded: 09/10/2019
Attorney Dkt #:039138-0001 SECUR RELEASE
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 5800
Page 17 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
Issue Dt:
08/10/2010
Application #:
11678327
Filing Dt:
02/23/2007
Publication #:
Pub Dt:
08/28/2008
Title:
FORMING SEMICONDUCTOR FINS USING A SACRIFICIAL FIN
2
Patent #:
Issue Dt:
04/28/2009
Application #:
11678330
Filing Dt:
02/23/2007
Publication #:
Pub Dt:
09/06/2007
Title:
RF POWER TRANSISTOR DEVICE WITH METAL ELECTROMIGRATION DESIGN AND METHOD THEREOF
3
Patent #:
Issue Dt:
04/20/2010
Application #:
11678962
Filing Dt:
02/26/2007
Publication #:
Pub Dt:
08/28/2008
Title:
COMPLEMENTARY ZENER TRIGGERED BIPOLAR ESD PROTECTION
4
Patent #:
Issue Dt:
03/09/2010
Application #:
11678971
Filing Dt:
02/26/2007
Publication #:
Pub Dt:
08/28/2008
Title:
ADAPTIVE THRESHOLD WAFER TESTING DEVICE AND METHOD THEREOF
5
Patent #:
Issue Dt:
06/22/2010
Application #:
11679512
Filing Dt:
02/27/2007
Publication #:
Pub Dt:
08/28/2008
Title:
CONDUCTIVE VIA FORMATION UTILIZING ELECTROPLATING
6
Patent #:
Issue Dt:
09/28/2010
Application #:
11679590
Filing Dt:
02/27/2007
Publication #:
Pub Dt:
08/28/2008
Title:
MULTIPLE ADDRESS AND ARITHMETIC BIT-MODE DATA PROCESSING DEVICE AND METHODS THEREOF
7
Patent #:
Issue Dt:
08/11/2009
Application #:
11680012
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
YIELD ANALYSIS AND IMPROVEMENT USING ELECTRICAL SENSITIVITY EXTRACTION
8
Patent #:
Issue Dt:
07/06/2010
Application #:
11680177
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
PACKAGED INTEGRATED CIRCUIT
9
Patent #:
Issue Dt:
09/14/2010
Application #:
11680219
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
FORMING A SEMICONDUCTOR DEVICE HAVING EPITAXIALLY GROWN SOURCE AND DRAIN REGIONS
10
Patent #:
Issue Dt:
11/16/2010
Application #:
11680430
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
08/28/2008
Title:
APPARATUS AND METHOD FOR REDUCING NOISE IN MIXED-SIGNAL CIRCUITS AND DIGITAL CIRCUITS
11
Patent #:
Issue Dt:
09/01/2009
Application #:
11681421
Filing Dt:
03/02/2007
Publication #:
Pub Dt:
09/04/2008
Title:
INTEGRATED CIRCUIT FUSE ARRAY
12
Patent #:
Issue Dt:
08/31/2010
Application #:
11683236
Filing Dt:
03/07/2007
Publication #:
Pub Dt:
09/11/2008
Title:
SEMICONDUCTOR DEVICE HAVING TILES FOR DUAL-TRENCH INTEGRATION AND METHOD THEREFOR
13
Patent #:
Issue Dt:
02/23/2010
Application #:
11683607
Filing Dt:
03/08/2007
Publication #:
Pub Dt:
09/11/2008
Title:
SYSTEM AND METHOD FOR TESTING AND PROVIDING AN INTEGRATED CIRCUIT HAVING MULTIPLE MODULES OR SUBMODULES
14
Patent #:
Issue Dt:
04/26/2011
Application #:
11683630
Filing Dt:
03/08/2007
Publication #:
Pub Dt:
09/11/2008
Title:
SUCCESSIVE INTERFERENCE CANCELLATION BASED ON THE NUMBER OF RETRANSMISSIONS
15
Patent #:
Issue Dt:
02/01/2011
Application #:
11683846
Filing Dt:
03/08/2007
Publication #:
Pub Dt:
09/11/2008
Title:
TRENCH FORMATION IN A SEMICONDUCTOR MATERIAL
16
Patent #:
Issue Dt:
07/19/2011
Application #:
11684529
Filing Dt:
03/09/2007
Publication #:
Pub Dt:
09/11/2008
Title:
PIPELINED TAG AND INFORMATION ARRAY ACCESS WITH SPECULATIVE RETRIEVAL OF TAG THAT CORRESPONDS TO INFORMATION ACCESS
17
Patent #:
Issue Dt:
03/23/2010
Application #:
11685027
Filing Dt:
03/12/2007
Publication #:
Pub Dt:
09/18/2008
Title:
SEMICONDUCTOR DEVICE HAVING A METAL CARBIDE GATE WITH AN ELECTROPOSITIVE ELEMENT AND A METHOD OF MAKING THE SAME
18
Patent #:
Issue Dt:
08/12/2014
Application #:
11685297
Filing Dt:
03/13/2007
Publication #:
Pub Dt:
09/18/2008
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A CONTROL GATE ELECTRODE, A SEMICONDUCTOR LAYER, AND A SELECT GATE ELECTRODE
19
Patent #:
Issue Dt:
11/13/2007
Application #:
11685419
Filing Dt:
03/13/2007
Publication #:
Pub Dt:
07/05/2007
Title:
TEMPERATURE BASED DRAM REFRESH
20
Patent #:
Issue Dt:
04/20/2010
Application #:
11686439
Filing Dt:
03/15/2007
Publication #:
Pub Dt:
09/18/2008
Title:
METHODS FOR FORMING CASCODE CURRENT MIRRORS
21
Patent #:
Issue Dt:
11/27/2007
Application #:
11689313
Filing Dt:
03/21/2007
Publication #:
Pub Dt:
07/12/2007
Title:
HIGH VOLTAGE FIELD EFFECT DEVICE AND METHOD
22
Patent #:
Issue Dt:
10/26/2010
Application #:
11689657
Filing Dt:
03/22/2007
Publication #:
Pub Dt:
09/25/2008
Title:
SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF MAKING
23
Patent #:
Issue Dt:
05/25/2010
Application #:
11690569
Filing Dt:
03/23/2007
Publication #:
Pub Dt:
09/25/2008
Title:
HIGH VOLTAGE PROTECTION FOR A THIN OXIDE CMOS DEVICE
24
Patent #:
Issue Dt:
12/08/2009
Application #:
11690596
Filing Dt:
03/23/2007
Publication #:
Pub Dt:
09/25/2008
Title:
LOAD INDEPENDENT VOLTAGE REGULATOR
25
Patent #:
Issue Dt:
02/03/2009
Application #:
11692332
Filing Dt:
03/28/2007
Publication #:
Pub Dt:
10/02/2008
Title:
METHOD AND DEVICE FOR PROGRAMMING ANTI-FUSES
26
Patent #:
Issue Dt:
09/22/2009
Application #:
11692722
Filing Dt:
03/28/2007
Publication #:
Pub Dt:
10/04/2007
Title:
ESD PROTECTION CIRCUIT WITH ISOLATED DIODE ELEMENT AND METHOD THEREOF
27
Patent #:
Issue Dt:
01/05/2010
Application #:
11693829
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS WITHIN A DIELECTRIC LAYER
28
Patent #:
Issue Dt:
06/07/2011
Application #:
11693897
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
SYSTEMS, APPARATUS AND METHOD FOR PERFORMING DIGITAL PRE-DISTORTION BASED ON LOOKUP TABLE GAIN VALUES
29
Patent #:
Issue Dt:
05/11/2010
Application #:
11694264
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE UTILIZING SPACER REMOVAL AND SEMICONDUCTOR STRUCTURE
30
Patent #:
Issue Dt:
08/24/2010
Application #:
11694273
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
STRUCTURE AND METHOD FOR STRAINED TRANSISTOR DIRECTLY ON INSULATOR
31
Patent #:
Issue Dt:
02/23/2010
Application #:
11695722
Filing Dt:
04/03/2007
Publication #:
Pub Dt:
10/09/2008
Title:
ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS OF USING THE SAME
32
Patent #:
Issue Dt:
02/14/2012
Application #:
11696610
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
VIDEO DE-INTERLACER USING PIXEL TRAJECTORY
33
Patent #:
Issue Dt:
05/07/2013
Application #:
11697106
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/09/2008
Title:
FIRST INTER-LAYER DIELECTRIC STACK FOR NON-VOLATILE MEMORY
34
Patent #:
Issue Dt:
08/10/2010
Application #:
11701651
Filing Dt:
02/02/2007
Publication #:
Pub Dt:
08/07/2008
Title:
DYNAMIC PAD SIZE TO REDUCE SOLDER FATIGUE
35
Patent #:
Issue Dt:
03/20/2012
Application #:
11711327
Filing Dt:
02/27/2007
Publication #:
Pub Dt:
08/28/2008
Title:
ESTIMATING DELAY OF AN ECHO PATH IN A COMMUNICATION SYSTEM
36
Patent #:
Issue Dt:
03/19/2013
Application #:
11719015
Filing Dt:
05/10/2007
Publication #:
Pub Dt:
08/07/2008
Title:
Apparatus and Method for Controlling Voltage and Frequency Using Multiple Reference Circuits
37
Patent #:
Issue Dt:
02/19/2013
Application #:
11719883
Filing Dt:
05/18/2009
Publication #:
Pub Dt:
12/03/2009
Title:
INTEGRATED CIRCUIT AND A METHOD FOR SECURE TESTING
38
Patent #:
Issue Dt:
06/17/2014
Application #:
11719924
Filing Dt:
09/18/2009
Publication #:
Pub Dt:
01/28/2010
Title:
INTEGRATED CIRCUIT AND A METHOD FOR TESTING A MULTI-TAP INTEGRATED CIRCUIT
39
Patent #:
Issue Dt:
06/08/2010
Application #:
11720127
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD AND SYSTEM FOR IMPROVING THE MANUFACTURABILITY OF INTEGRATED CIRCUITS
40
Patent #:
Issue Dt:
09/18/2012
Application #:
11722295
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
10/29/2009
Title:
BROADCASTING OF TEXTUAL AND MULTIMEDIA INFORMATION
41
Patent #:
Issue Dt:
04/13/2010
Application #:
11731028
Filing Dt:
03/31/2007
Publication #:
Pub Dt:
10/02/2008
Title:
ON-CHIP DECOUPLING CAPACITANCE AND POWER/GROUND NETWORK WIRE CO-OPTIMIZATION TO REDUCE DYNAMIC NOISE
42
Patent #:
Issue Dt:
11/09/2010
Application #:
11732594
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
NOVEL INTERCONNECT FOR CHIP LEVEL POWER DISTRIBUTION
43
Patent #:
Issue Dt:
05/03/2011
Application #:
11733063
Filing Dt:
04/09/2007
Publication #:
Pub Dt:
10/09/2008
Title:
INTEGRATED PASSIVE DEVICE WITH A HIGH RESISTIVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
44
Patent #:
Issue Dt:
05/26/2009
Application #:
11733079
Filing Dt:
04/09/2007
Publication #:
Pub Dt:
12/06/2007
Title:
SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
45
Patent #:
Issue Dt:
11/24/2015
Application #:
11733978
Filing Dt:
04/11/2007
Publication #:
Pub Dt:
10/16/2008
Title:
Techniques for Tracing Processes in a Multi-Threaded Processor
46
Patent #:
Issue Dt:
04/19/2011
Application #:
11734328
Filing Dt:
04/12/2007
Publication #:
Pub Dt:
10/16/2008
Title:
SOI SEMICONDUCTOR DEVICE WITH BODY CONTACT AND METHOD THEREOF
47
Patent #:
Issue Dt:
01/06/2009
Application #:
11736231
Filing Dt:
04/17/2007
Publication #:
Pub Dt:
09/13/2007
Title:
MEMORY WITH SERIAL INPUT-OUTPUT TERMINALS FOR ADDRESS AND DATA AND METHOD THEREFOR
48
Patent #:
Issue Dt:
12/08/2009
Application #:
11736272
Filing Dt:
04/17/2007
Publication #:
Pub Dt:
10/23/2008
Title:
SPACE AND PROCESS EFFICIENT MRAM AND METHOD
49
Patent #:
Issue Dt:
05/19/2009
Application #:
11737492
Filing Dt:
04/19/2007
Publication #:
Pub Dt:
10/23/2008
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH A STRESSOR
50
Patent #:
Issue Dt:
09/22/2009
Application #:
11737499
Filing Dt:
04/19/2007
Publication #:
Pub Dt:
10/23/2008
Title:
SEMICONDUCTOR DEVICE WITH HYDROGEN BARRIER AND METHOD THEREFOR
51
Patent #:
Issue Dt:
03/02/2010
Application #:
11737759
Filing Dt:
04/20/2007
Publication #:
Pub Dt:
11/01/2007
Title:
METHOD AND SYSTEM FOR INCORPORATING VIA REDUNDANCY IN TIMING ANALYSIS
52
Patent #:
Issue Dt:
07/28/2009
Application #:
11738514
Filing Dt:
04/22/2007
Publication #:
Pub Dt:
10/23/2008
Title:
METHOD OF MAKING SOLDER PAD
53
Patent #:
Issue Dt:
10/18/2011
Application #:
11738683
Filing Dt:
04/23/2007
Publication #:
Pub Dt:
10/23/2008
Title:
SEPARATE LAYER FORMATION IN A SEMICONDUCTOR DEVICE
54
Patent #:
Issue Dt:
09/08/2009
Application #:
11739933
Filing Dt:
04/25/2007
Publication #:
Pub Dt:
10/30/2008
Title:
CURRENT SENSOR DEVICE
55
Patent #:
Issue Dt:
04/06/2010
Application #:
11740331
Filing Dt:
04/26/2007
Publication #:
Pub Dt:
10/30/2008
Title:
NON-VOLATILE MEMORY HAVING A STATIC VERIFY-READ OUTPUT DATA PATH
56
Patent #:
Issue Dt:
06/15/2010
Application #:
11740697
Filing Dt:
04/26/2007
Publication #:
Pub Dt:
10/30/2008
Title:
INTEGRATED CIRCUIT WITH A PROGRAMMABLE DELAY AND A METHOD THEREOF
57
Patent #:
Issue Dt:
08/31/2010
Application #:
11741192
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
10/30/2008
Title:
LEVEL DETECT CIRCUIT
58
Patent #:
Issue Dt:
10/12/2010
Application #:
11741251
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
10/30/2008
Title:
CLOCK CONTROL MODULE SIMULATOR AND METHOD THEREOF
59
Patent #:
Issue Dt:
01/11/2011
Application #:
11741870
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
10/30/2008
Title:
SHIELDING STRUCTURES FOR SIGNAL PATHS IN ELECTRONIC DEVICES
60
Patent #:
Issue Dt:
08/18/2009
Application #:
11742081
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
10/30/2008
Title:
INVERSE SLOPE ISOLATION AND DUAL SURFACE ORIENTATION INTEGRATION
61
Patent #:
Issue Dt:
12/14/2010
Application #:
11742363
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
10/30/2008
Title:
MOSFET DEVICE INCLUDING A SOURCE WITH ALTERNATING P-TYPE AND N-TYPE REGIONS
62
Patent #:
Issue Dt:
09/07/2010
Application #:
11742778
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
11/06/2008
Title:
DUAL SUBSTRATE ORIENTATION OR BULK ON SOI INTEGRATIONS USING OXIDATION FOR SILICON EPITAXY SPACER FORMATION
63
Patent #:
Issue Dt:
01/26/2010
Application #:
11742942
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
11/06/2008
Title:
METHOD OF BLOCKING A VOID DURING CONTACT FORMATION
64
Patent #:
Issue Dt:
03/16/2010
Application #:
11744581
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH MULTIPLE TENSILE STRESSOR LAYERS
65
Patent #:
Issue Dt:
12/28/2010
Application #:
11744638
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
METHOD OF FORMING A TRANSISTOR HAVING MULTIPLE TYPES OF SCHOTTKY JUNCTIONS
66
Patent #:
Issue Dt:
04/24/2012
Application #:
11745875
Filing Dt:
05/08/2007
Publication #:
Pub Dt:
11/13/2008
Title:
CIRCUIT AND METHOD FOR GENERATING FIXED POINT VECTOR DOT PRODUCT AND MATRIX VECTOR VALUES
67
Patent #:
Issue Dt:
11/11/2008
Application #:
11746126
Filing Dt:
05/09/2007
Publication #:
Pub Dt:
11/13/2008
Title:
LOW VOLTAGE DATA PATH IN MEMORY ARRAY
68
Patent #:
Issue Dt:
09/09/2014
Application #:
11746998
Filing Dt:
05/10/2007
Publication #:
Pub Dt:
11/13/2008
Title:
THREAD DE-EMPHASIS INSTRUCTION FOR MULTITHREADED PROCESSOR
69
Patent #:
Issue Dt:
09/21/2010
Application #:
11747360
Filing Dt:
05/11/2007
Publication #:
Pub Dt:
11/13/2008
Title:
APPARATUS FOR OPTIMIZING DIODE CONDUCTION TIME DURING A DEADTIME INTERVAL
70
Patent #:
Issue Dt:
03/03/2015
Application #:
11748350
Filing Dt:
05/14/2007
Publication #:
Pub Dt:
11/20/2008
Title:
METHOD AND APPARATUS FOR CACHE TRANSACTIONS IN A DATA PROCESSING SYSTEM
71
Patent #:
Issue Dt:
12/01/2009
Application #:
11750048
Filing Dt:
05/17/2007
Publication #:
Pub Dt:
09/13/2007
Title:
METHOD AND APPARATUS FOR PROVIDING STRUCTURAL SUPPORT FOR INTERCONNECT PAD WHILE ALLOWING SIGNAL CONDUCTANCE
72
Patent #:
Issue Dt:
02/10/2009
Application #:
11752051
Filing Dt:
05/22/2007
Publication #:
Pub Dt:
11/27/2008
Title:
BITCELL WITH VARIABLE-CONDUCTANCE TRANSFER GATE AND METHOD THEREOF
73
Patent #:
Issue Dt:
09/07/2010
Application #:
11752938
Filing Dt:
05/24/2007
Publication #:
Pub Dt:
11/27/2008
Title:
METHOD AND SYSTEM FOR SIMULTANEOUS READS OF MULTIPLE ARRAYS
74
Patent #:
Issue Dt:
08/30/2011
Application #:
11753003
Filing Dt:
05/24/2007
Title:
TESTER AND A METHOD FOR TESTING AN INTEGRATED CIRCUIT
75
Patent #:
Issue Dt:
08/25/2009
Application #:
11753749
Filing Dt:
05/25/2007
Publication #:
Pub Dt:
11/27/2008
Title:
ANTENNA STRUCTURE FOR INTEGRATED CIRCUIT DIE USING BOND WIRE
76
Patent #:
Issue Dt:
03/09/2010
Application #:
11755448
Filing Dt:
05/30/2007
Publication #:
Pub Dt:
12/04/2008
Title:
INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL BLOCKS
77
Patent #:
Issue Dt:
11/29/2011
Application #:
11755960
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
SYSTEMS, APPARATUS, AND METHODS FOR PERFORMING DIGITAL PRE-DISTORTION WITH FEEDBACK SIGNAL ADJUSTMENT
78
Patent #:
Issue Dt:
08/25/2009
Application #:
11756187
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
METHOD FOR GENERATION, PLACEMENT, AND ROUTING OF TEST STRUCTURES IN TEST CHIPS
79
Patent #:
Issue Dt:
06/02/2009
Application #:
11756192
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
INTEGRATED CIRCUIT FEATURING A NON-VOLATILE MEMORY WITH CHARGE/DISCHARGE RAMP RATE CONTROL AND METHOD THEREFOR
80
Patent #:
Issue Dt:
06/14/2011
Application #:
11756231
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE FEATURING A GATE STRESSOR AND SEMICONDUCTOR DEVICE
81
Patent #:
Issue Dt:
08/11/2009
Application #:
11759028
Filing Dt:
06/06/2007
Publication #:
Pub Dt:
12/11/2008
Title:
ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT
82
Patent #:
Issue Dt:
05/05/2009
Application #:
11759593
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
SELF-ALIGNED SPLIT GATE MEMORY CELL AND METHOD OF FORMING
83
Patent #:
Issue Dt:
02/04/2014
Application #:
11759935
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
12/11/2008
Title:
HEAT SPREADER FOR CENTER GATE MOLDING
84
Patent #:
Issue Dt:
03/24/2009
Application #:
11759944
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
12/11/2008
Title:
METHOD AND CIRCUIT FOR REDUCING REGULATOR OUTPUT NOISE
85
Patent #:
Issue Dt:
03/24/2009
Application #:
11760775
Filing Dt:
06/10/2007
Publication #:
Pub Dt:
12/27/2007
Title:
RF POWER TRANSISTOR DEVICE WITH HIGH PERFORMANCE SHUNT CAPACITOR AND METHOD THEREOF
86
Patent #:
Issue Dt:
03/29/2011
Application #:
11763107
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
12/18/2008
Title:
OPTIMIZATION OF STORAGE DEVICE ACCESSES IN RAID SYSTEMS
87
Patent #:
Issue Dt:
05/25/2010
Application #:
11764810
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
RECORDING DEVICE CAPABLE OF DETERMINING THE MEDIA TYPE BASED ON DETECTING THE CAPACITANCE OF PAIR ELECTRODES.
88
Patent #:
Issue Dt:
11/09/2010
Application #:
11765891
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
12/25/2008
Title:
EXCEPTION-BASED TIMER CONTROL
89
Patent #:
Issue Dt:
01/10/2012
Application #:
11770295
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A PLURALITY OF SINGULATED DIE
90
Patent #:
Issue Dt:
02/23/2010
Application #:
11771721
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
METHOD FOR FORMING A DUAL METAL GATE STRUCTURE
91
Patent #:
Issue Dt:
08/18/2015
Application #:
11772655
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
02/04/2010
Title:
Asymmetric Cryptographic Device With Local Private Key Generation and Method Therefor
92
Patent #:
Issue Dt:
11/24/2009
Application #:
11775228
Filing Dt:
07/10/2007
Publication #:
Pub Dt:
01/10/2008
Title:
METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
93
Patent #:
Issue Dt:
10/28/2008
Application #:
11775230
Filing Dt:
07/10/2007
Publication #:
Pub Dt:
01/10/2008
Title:
OSCILLATOR CIRCUIT WITH A VOLTAGE RESTRICTION BLOCK
94
Patent #:
Issue Dt:
08/11/2009
Application #:
11775231
Filing Dt:
07/10/2007
Publication #:
Pub Dt:
02/28/2008
Title:
SERIES REGULATOR CIRCUIT
95
Patent #:
Issue Dt:
11/10/2009
Application #:
11777635
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
DYNAMIC VOLTAGE ADJUSTMENT FOR MEMORY
96
Patent #:
Issue Dt:
04/26/2011
Application #:
11777650
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
CIRCUIT AND METHOD FOR CORRELATED INPUTS TO A POPULATION COUNT CIRCUIT
97
Patent #:
Issue Dt:
06/07/2011
Application #:
11777664
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
POPULATION COUNT APPROXIMATION CIRCUIT AND METHOD THEREOF
98
Patent #:
Issue Dt:
06/02/2009
Application #:
11780251
Filing Dt:
07/19/2007
Publication #:
Pub Dt:
01/22/2009
Title:
PROGRAMMABLE BIAS FOR A MEMORY ARRAY
99
Patent #:
Issue Dt:
06/23/2015
Application #:
11780900
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING THE SAME
100
Patent #:
Issue Dt:
06/28/2011
Application #:
11781097
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
SYSTEMS AND METHODS FOR EFFICIENT GENERATION OF HASH VALUES OF VARYING BIT WIDTHS
Assignor
1
Exec Dt:
09/03/2019
Assignee
1
HIGH TECH CAMPUS 60
EINDHOVEN, NETHERLANDS NL-5656 AG
Correspondence name and address
INTELLECTUAL PROPERTY AND LICENSING NXP
411 EAST PLUMERIA DRIVE, MS41
SAN JOSE, CA 95134

Search Results as of: 06/16/2024 11:29 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT