|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09610786
|
Filing Dt:
|
07/06/2000
|
Title:
|
HIGH VOLTAGE PROTECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09614199
|
Filing Dt:
|
07/12/2000
|
Title:
|
METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICES ON A WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09614311
|
Filing Dt:
|
07/12/2000
|
Title:
|
LOW SUPPLY, CURRENT-CONTROLLED FET PI ATTENUATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09614324
|
Filing Dt:
|
07/12/2000
|
Title:
|
Dual fet differential voltage controlled attenuator
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09615865
|
Filing Dt:
|
07/13/2000
|
Title:
|
FLIP CHIP DEVICE AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
09616152
|
Filing Dt:
|
07/14/2000
|
Title:
|
Multi-layer registration control for photolithography processes
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2002
|
Application #:
|
09617903
|
Filing Dt:
|
07/17/2000
|
Title:
|
High-side, low-side configurable driver
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
09626679
|
Filing Dt:
|
07/27/2000
|
Title:
|
SYSTEM FOR INITIALIZING A DISTRIBUTED COMPUTER SYSTEM AND A METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09629611
|
Filing Dt:
|
07/31/2000
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT HAVING A FIXED ELECTRODE BETWEEN TWO FLEXIBLE DIAPHRAGMS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09630467
|
Filing Dt:
|
08/01/2000
|
Title:
|
TWO STEP WIRE BOND PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
09632890
|
Filing Dt:
|
08/07/2000
|
Title:
|
METHOD AND APPARATUS FOR DETECTING AND COMPENSATING DIGITAL LOSSES IN A COMMUNICATIONS NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2001
|
Application #:
|
09633948
|
Filing Dt:
|
08/08/2000
|
Title:
|
Multiple voltage compatible I/O buffer
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2001
|
Application #:
|
09633949
|
Filing Dt:
|
08/08/2000
|
Title:
|
Method for decoding a quadrature encoded signal
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
09636493
|
Filing Dt:
|
08/11/2000
|
Title:
|
Integrated circuit for handling buffer contention and method thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09638228
|
Filing Dt:
|
08/14/2000
|
Title:
|
MULTIPHASE DIELECTRIC COMPOSITION AND MULTILAYERED DEVICE INCORPORATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09641002
|
Filing Dt:
|
08/17/2000
|
Title:
|
Method of manufacturing a semiconductor component and semiconductor component thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09641143
|
Filing Dt:
|
08/17/2000
|
Title:
|
WAFER CONTAINER HAVING ELECTRICALLY CONDUCTIVE KINEMATIC COUPLING GROOVE, SUPPORT SURFACE WITH ELECTRICALLY CONDUCTIVE KINEMATIC COUPLING PIN, TRANSPORTATION SYSTEM, AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09641990
|
Filing Dt:
|
08/18/2000
|
Title:
|
SINGLE-TO-DIFFERENTIAL BUFFER AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
09642680
|
Filing Dt:
|
08/21/2000
|
Title:
|
METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING PASSIVE ELEMENTS INCLUDING FORMING CPACITOR ELECTRODE AND RESISTOR FROM SAME LAYER OF MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2001
|
Application #:
|
09652620
|
Filing Dt:
|
08/31/2000
|
Title:
|
Method of manufacturing components and component thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09653338
|
Filing Dt:
|
08/31/2000
|
Title:
|
SEMICONDUCTOR DEVICE, MEMORY CELL, AND PROCESSES FOR FORMING THEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09657393
|
Filing Dt:
|
09/08/2000
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR WAFER LEVEL PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
09659105
|
Filing Dt:
|
09/11/2000
|
Title:
|
Method of operating a semiconductor device
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
09660747
|
Filing Dt:
|
09/13/2000
|
Title:
|
Minimizing recovery time
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09662079
|
Filing Dt:
|
09/14/2000
|
Title:
|
METHOD OF FORMING AN ALTERNATIVE GROUND CONTACT FOR A SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2001
|
Application #:
|
09662390
|
Filing Dt:
|
09/14/2000
|
Title:
|
Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09663919
|
Filing Dt:
|
09/18/2000
|
Title:
|
SEMICONDUCTOR STRUCTURE AND PROCESS FOR FORMING A METAL OXY-NITRIDE DIELECTRIC LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09666037
|
Filing Dt:
|
09/20/2000
|
Title:
|
DIGITAL FILTER TUNE LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09677496
|
Filing Dt:
|
10/02/2000
|
Title:
|
SELECTIVE SIZING OF FEATURES TO COMPENSATE FOR RESIST THICKNESS VARIATIONS IN SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09677571
|
Filing Dt:
|
09/29/2000
|
Title:
|
SYSTEM FOR ADDRESS INITIALIZATION OF GENERIC NODES IN A DISTRIBUTED COMMAND AND CONTROL SYSTEM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09677697
|
Filing Dt:
|
09/28/2000
|
Title:
|
METHOD AND APPARATUS FOR COUPLING NOISE REDUCTION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09679861
|
Filing Dt:
|
10/05/2000
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09684576
|
Filing Dt:
|
10/06/2000
|
Title:
|
ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09690666
|
Filing Dt:
|
10/17/2000
|
Title:
|
METHOD AND DEVICE FOR PROVIDING SYMETRICAL MONITORING OF ESD TESTING OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09704025
|
Filing Dt:
|
11/01/2000
|
Title:
|
SELECTIVE OVER-RANGING IN FOLDING AND AVERAGING INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09706201
|
Filing Dt:
|
11/03/2000
|
Title:
|
WAFER PROCESSING EQUIPMENT AND METHOD FOR PROCESSING WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
09712749
|
Filing Dt:
|
11/14/2000
|
Title:
|
LOW PROFILE INTEGRATED MODULE INTERCONNECTS AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09733170
|
Filing Dt:
|
12/08/2000
|
Publication #:
|
|
Pub Dt:
|
06/13/2002
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A BALL GRID ARRAY AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09740249
|
Filing Dt:
|
12/19/2000
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
Title:
|
DEVICE STRUCTURE FOR STORING CHARGE AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09744410
|
Filing Dt:
|
07/06/2001
|
Title:
|
FAULT-TOLERANT ELECTRONIC BRAKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
09758856
|
Filing Dt:
|
01/11/2001
|
Publication #:
|
|
Pub Dt:
|
09/27/2001
| | | | |
Title:
|
MULTIPLE MEMORY COHERENCE GROUPS IN A SINGLE SYSTEM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09761085
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
Title:
|
CURRENT-MODE FILTER WITH COMPLEX ZEROS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
09765192
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
Title:
|
HUFFMAN DECODER WITH REDUCED MEMORY SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09769710
|
Filing Dt:
|
01/25/2001
|
Publication #:
|
|
Pub Dt:
|
07/19/2001
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND ALIGNMENT METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09772632
|
Filing Dt:
|
01/30/2001
|
Title:
|
SELECTIVE REMOVAL OF A METAL OXIDE DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
09772830
|
Filing Dt:
|
01/30/2001
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
Title:
|
MEMORY ACCESS WITH CONSECUTIVE ADDRESSES CORRESPONDING TO DIFFERENT ROWS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
09773806
|
Filing Dt:
|
02/01/2001
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR OPERATING A COMMUNICATION BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
09780720
|
Filing Dt:
|
02/12/2001
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
Title:
|
SCALEABLE ARBITRATION AND PRIORITIZATION OF MULTIPLE INTERRUPTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
09784279
|
Filing Dt:
|
02/16/2001
|
Title:
|
SIGNAL GENERATOR, AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09788815
|
Filing Dt:
|
02/21/2001
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
Title:
|
DATA PROCESSING SYSTEM WITH ON-CHIP FIFO FOR STORING DEBUG INFORMATION AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2002
|
Application #:
|
09809377
|
Filing Dt:
|
03/15/2001
|
Title:
|
DISTRIBUTED AMPLIFIER HAVING SEPARATELY BIASED SECTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09811656
|
Filing Dt:
|
03/20/2001
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
HIGH- K DIELECTRIC FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09819388
|
Filing Dt:
|
03/28/2001
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09819393
|
Filing Dt:
|
03/28/2001
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
MICROELECTRONIC ASSEMBLY WITH DIE SUPPORT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09834866
|
Filing Dt:
|
04/16/2001
|
Title:
|
METHOD FOR CONTROLLING SWITCHED RELUCTANCE MOTOR, AND CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09835276
|
Filing Dt:
|
04/16/2001
|
Publication #:
|
|
Pub Dt:
|
10/04/2001
| | | | |
Title:
|
METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
|
09835770
|
Filing Dt:
|
04/16/2001
|
Title:
|
METHOD FOR FORMING A HIGH DIELECTRIC CONSTANT MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2002
|
Application #:
|
09836668
|
Filing Dt:
|
04/16/2001
|
Title:
|
Method for making a hafnium-based insulating film
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
09839663
|
Filing Dt:
|
04/23/2001
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
Title:
|
INTEGRATED CIRCUIT STRUCTURE AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09842453
|
Filing Dt:
|
04/27/2001
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE AND METHOD FOR REDUCING CHARGE DAMAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09845059
|
Filing Dt:
|
04/27/2001
|
Title:
|
LOW POWER VOLTAGE REGULATOR WITH IMPROVED ON-CHIP NOISE ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
09846086
|
Filing Dt:
|
05/02/2001
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
Title:
|
OPTICAL DEVICE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09851206
|
Filing Dt:
|
05/08/2001
|
Title:
|
METHOD FOR MAKING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09858126
|
Filing Dt:
|
05/15/2001
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONTROLLING CURRENT DEMAND IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2002
|
Application #:
|
09859333
|
Filing Dt:
|
05/16/2001
|
Title:
|
Recording of result information in a built-in self-test circuit and method therefor
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09864098
|
Filing Dt:
|
05/23/2001
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
Title:
|
BONDING PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09865855
|
Filing Dt:
|
05/26/2001
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND A METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
09870205
|
Filing Dt:
|
05/29/2001
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
TEST ACCESS MECHANISM FOR SUPPORTING A CONFIGURABLE BUILT-IN SELF-TEST CIRCUIT AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2003
|
Application #:
|
09873810
|
Filing Dt:
|
06/04/2001
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
METHOD OF FORMING AN INTEGRATED CIRCUIT DEVICE USING DUMMY FEATURES AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09881332
|
Filing Dt:
|
06/15/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
INTEGRATION OF TWO MEMORY TYPES ON THE SAME INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
09884376
|
Filing Dt:
|
06/18/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR A CLOCK CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
09884377
|
Filing Dt:
|
06/18/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR A TRAFFIC SHAPER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
09885574
|
Filing Dt:
|
06/20/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
FIRST-IN, FIRST-OUT MEMORY SYSTEM HAVING BOTH SIMULTANEOUS AND ALTERNATING DATA ACCESS AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
09885575
|
Filing Dt:
|
06/20/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR FORMING A PATTERN ON AN INTEGRATED CIRCUIT USING DIFFERING EXPOSURE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
09901366
|
Filing Dt:
|
07/09/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
COMPONENT HAVING A FILTER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
09905756
|
Filing Dt:
|
07/14/2001
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09906874
|
Filing Dt:
|
07/17/2001
|
Publication #:
|
|
Pub Dt:
|
05/02/2002
| | | | |
Title:
|
METHOD FOR ADDING FEATURES TO A DESIGN LAYOUT AND PROCESS FOR DESIGNING A MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
09908888
|
Filing Dt:
|
07/20/2001
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
FABRICATION OF A WAVELENGTH LOCKER WITHIN A SEMICONDUCTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09908902
|
Filing Dt:
|
07/20/2001
|
Title:
|
USING SILICATE LAYERS FOR COMPOSITE SEMICONDUCTOR STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2002
|
Application #:
|
09910022
|
Filing Dt:
|
07/23/2001
|
Title:
|
MICROPROCESSOR STRUCTURE HAVING A COMPOUND SEMICONDUCTOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
09910753
|
Filing Dt:
|
07/24/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
STRUCTURE AND METHOD FOR FABRICATING CONFIGURABLE TRANSISTOR DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE FOR MATERIALS USED TO FORM THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09916023
|
Filing Dt:
|
07/26/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
SELECTIVE METAL OXIDE REMOVAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
09916148
|
Filing Dt:
|
07/25/2001
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
Title:
|
SYSTEM AND METHOD FOR TESTING AN EMBEDDED MICROPROCESSOR SYSTEM CONTAINING PHYSICAL AND/OR SIMULATED HARDWARE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09918015
|
Filing Dt:
|
07/30/2001
|
Title:
|
ACTIVE BIAS CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09918429
|
Filing Dt:
|
07/27/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
DIELECTRIC BETWEEN METAL STRUCTURES AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09921901
|
Filing Dt:
|
08/06/2001
|
Title:
|
INTEGRATED GALLIUM ARSENIDE COMMUNICATIONS SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2004
|
Application #:
|
09927123
|
Filing Dt:
|
08/10/2001
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
DATA PROCESSING SYSTEM HAVING AN ADAPTIVE PRIORITY CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
09928737
|
Filing Dt:
|
08/13/2001
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09934159
|
Filing Dt:
|
08/21/2001
|
Publication #:
|
|
Pub Dt:
|
02/21/2002
| | | | |
Title:
|
APPARATUS AND METHOD FOR MANAGING AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09940241
|
Filing Dt:
|
08/27/2001
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
Title:
|
METHOD OF FORMING A PATTERN ON A SEMICONDUCTOR WAFER USING AN ATTENUATED PHASE SHIFTING REFLECTIVE MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09941284
|
Filing Dt:
|
08/28/2001
|
Publication #:
|
|
Pub Dt:
|
04/18/2002
| | | | |
Title:
|
ELECTRONIC DEVICE FOR A LITHOGRAPHY MASK CONTAINER, SEMICONDUCTOR MANUFACTURING SYSTEM, AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09946030
|
Filing Dt:
|
09/04/2001
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
SINGLE ENDED INPUT, DIFFERENTIAL OUTPUT AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09949245
|
Filing Dt:
|
09/07/2001
|
Title:
|
LOW POWER CYCLIC A/D CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09949454
|
Filing Dt:
|
09/07/2001
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING CONDUCTIVE BUMPS WITHOUT USING GOLD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09952527
|
Filing Dt:
|
09/14/2001
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
METHOD OF FORMING A BOND PAD AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
09953665
|
Filing Dt:
|
09/13/2001
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
Title:
|
KEY STREAM CIPHER DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
09957780
|
Filing Dt:
|
09/21/2001
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
Title:
|
SYSTEM HAVING USER PROGRAMMABLE ADDRESSING MODES AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09966584
|
Filing Dt:
|
09/28/2001
|
Title:
|
PACKAGED SEMICONDUCTOR WITH MULTIPLE ROWS OF BOND PADS AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09968171
|
Filing Dt:
|
10/01/2001
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
Title:
|
MULTIPHASE VOLTAGE CONTROLLED OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2006
|
Application #:
|
09968178
|
Filing Dt:
|
10/01/2001
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
Title:
|
DUAL STEERED FREQUENCY SYNTHESIZER
|
|