Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 037335/0101 | |
| Pages: | 13 |
| | Recorded: | 12/19/2015 | | |
| Attorney Dkt #: | CNB-DIABLO (PATENTS) |
| Conveyance: | SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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09/13/2016
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Application #:
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14635960
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Filing Dt:
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03/02/2015
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Publication #:
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Pub Dt:
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10/29/2015
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Title:
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System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System
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Patent #:
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Issue Dt:
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09/20/2016
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Application #:
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14664580
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Filing Dt:
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03/20/2015
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Publication #:
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Pub Dt:
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10/15/2015
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Title:
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System and Method for Offsetting The Data Buffer Latency of a Device Implementing a JEDEC Standard DDR-4 LRDIMM Chipset
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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14691051
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Filing Dt:
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04/20/2015
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Publication #:
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Pub Dt:
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08/13/2015
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Title:
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LOAD REDUCTION DUAL IN-LINE MEMORY MODULE (LRDIMM) AND METHOD FOR PROGRAMMING THE SAME
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Assignee
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| 200 CLARENDON ST., 28TH FL |
| BOSTON, MASSACHUSETTS 02116 |
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Correspondence name and address
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DIANA SANCHEZ BENTZ
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VLP LAW GROUP LLP
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GILROY, CA 95020
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