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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	008535/0103			Pages:	6
		Recorded:	03/21/1997
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 139
Page 2 of 2
Pages: 1 2

Patent #:	5204554	Issue Dt:	04/20/1993	Application #:	07802747	Filing Dt:	12/06/1991
Title:	PARTIAL ISOLATION OF POWER RAILS FOR OUTPUT BUFFER CIRCUITS

Patent #:	5233237	Issue Dt:	08/03/1993	Application #:	07803466	Filing Dt:	12/06/1991
Title:	BICMOS OUTPUT BUFFER NOISE REDUCTION CIRCUIT

Patent #:	5184034	Issue Dt:	02/02/1993	Application #:	07804906	Filing Dt:	12/06/1991
Title:	STATE-DEPENDENT DISCHARGE PATH CIRCUIT

Patent #:	5346842	Issue Dt:	09/13/1994	Application #:	07830938	Filing Dt:	02/04/1992
Title:	METHOD OF MAKING ALTERNATE METAL/SOURCE VIRTUAL GROUND FLASH EPROM CELL ARRAY

Patent #:	5248520	Issue Dt:	09/28/1993	Application #:	07835208	Filing Dt:	02/13/1992
Title:	SOLDER FINISHING PLANAR LEADED FLAT PACKAGE INTEGRATED CIRCUIT LEADS

Patent #:	5256916	Issue Dt:	10/26/1993	Application #:	07838394	Filing Dt:	02/18/1992
Title:	TTL TO CMOS TRANSLATING INPUT BUFFER CIRCUIT WITH DUAL THRESHOLDS FOR HIGH DYNAMIC CURRENT AND LOW STATIC CURRENT

Patent #:	5239270	Issue Dt:	08/24/1993	Application #:	07840390	Filing Dt:	02/24/1992
Title:	WAFER LEVEL RELIABILITY CONTACT TEST STRUCTURE AND METHOD

Patent #:	5357471	Issue Dt:	10/18/1994	Application #:	07856004	Filing Dt:	03/20/1992
Title:	FAULT LOCATOR ARCHITECTURE AND METHOD FOR MEMORIES

Patent #:	5258665	Issue Dt:	11/02/1993	Application #:	07881540	Filing Dt:	05/12/1992
Title:	AC MILLER-KILLER CIRCUIT FOR L-Z TRANSITIONS

Patent #:	5367645	Issue Dt:	11/22/1994	Application #:	07897913	Filing Dt:	06/12/1992
Title:	MODIFIED INTERFACE FOR PARALLEL ACCESS EPROM

Patent #:	5289056	Issue Dt:	02/22/1994	Application #:	07898029	Filing Dt:	06/12/1992
Title:	BICMOS INPUT BUFFER CIRCUIT WITH INTEGRAL PASSGATE

Patent #:	5223745	Issue Dt:	06/29/1993	Application #:	07930471	Filing Dt:	08/14/1992
Title:	POWER DOWN MILLER KILLER CIRCUIT

Patent #:	5331224	Issue Dt:	07/19/1994	Application #:	07932354	Filing Dt:	08/19/1992
Title:	ICCT LEAKAGE CURRENT INTERRUPTER

Patent #:	5412238	Issue Dt:	05/02/1995	Application #:	07941745	Filing Dt:	09/08/1992
Title:	SOURCE-COUPLING, SPLIT-GATE, VIRTUAL GROUND FLASH EEPROM ARRAY

Patent #:	5379254	Issue Dt:	01/03/1995	Application #:	07963985	Filing Dt:	10/20/1992
Title:	ASYMMETRICAL ALTERNATE METAL VIRTUAL GROUND EPROM ARRAY

Patent #:	5323068	Issue Dt:	06/21/1994	Application #:	07977812	Filing Dt:	11/17/1992
Title:	LOW POWER LOW TEMPERATURE ECL OUTPUT DRIVER CIRCUIT

Patent #:	5371030	Issue Dt:	12/06/1994	Application #:	08009330	Filing Dt:	01/26/1993
Title:	METHOD OF FABRICATING FIELD OXIDE ISOLATION FOR A CONTACTLESS FLASH EPROM CELL ARRAY

Patent #:	5497475	Issue Dt:	03/05/1996	Application #:	08014311	Filing Dt:	02/05/1993
Title:	CONFIGURABLE INTEGRATED CIRCUIT HAVING TRUE AND SHADOW EPROM REGISTERS

Patent #:	5338978	Issue Dt:	08/16/1994	Application #:	08016009	Filing Dt:	02/10/1993
Title:	FULL SWING POWER DOWN BUFFER CIRCUIT WITH MULTIPLE POWER SUPPLY ISOLATION

Patent #:	5381061	Issue Dt:	01/10/1995	Application #:	08024942	Filing Dt:	03/02/1993
Title:	OVERVOLTAGE TOLERANT OUTPUT BUFFER CIRCUIT

Patent #:	5310055	Issue Dt:	05/10/1994	Application #:	08037516	Filing Dt:	03/24/1993
Title:	MAGAZINE AND SHIPPING TRAY FOR LEAD FRAMES

Patent #:	5359301	Issue Dt:	10/25/1994	Application #:	08037929	Filing Dt:	03/26/1993
Title:	PROCESS-, TEMPERATURE-, AND VOLTAGE-COMPENSATION FOR ECL DELAY CELLS

Patent #:	5379302	Issue Dt:	01/03/1995	Application #:	08042127	Filing Dt:	04/02/1993
Title:	ECL TEST ACCESS PORT WITH LOW POWER CONTROL

Patent #:	5408147	Issue Dt:	04/18/1995	Application #:	08116920	Filing Dt:	09/07/1993
Title:	VCC TRANSLATOR CIRCUIT

Patent #:	5455732	Issue Dt:	10/03/1995	Application #:	08122232	Filing Dt:	09/15/1993
Title:	BUFFER PROTECTION AGAINST OUTPUT-NODE VOLTAGE EXCURSIONS

Patent #:	5418474	Issue Dt:	05/23/1995	Application #:	08126914	Filing Dt:	09/24/1993
Title:	CIRCUIT FOR REDUCING TRANSIENT SIMULTANEOUS CONDUCTION

Patent #:	5397725	Issue Dt:	03/14/1995	Application #:	08144677	Filing Dt:	10/28/1993
Title:	METHOD OF CONTROLLING OXIDE THINNING IN AN EPROM OR FLASH MEMORY ARRAY

Patent #:	5489861	Issue Dt:	02/06/1996	Application #:	08170511	Filing Dt:	12/20/1993
Title:	HIGH POWER, EDGE CONTROLLED OUTPUT BUFFER

Patent #:	5365479	Issue Dt:	11/15/1994	Application #:	08206446	Filing Dt:	03/03/1994
Title:	NOVEL ROW DECODER AND DRIVER WITH SWITCHED-BIAS BULK REGIONS

Patent #:	5521789	Issue Dt:	05/28/1996	Application #:	08213661	Filing Dt:	03/15/1994
Title:	BICMOS ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

Patent #:	5482819	Issue Dt:	01/09/1996	Application #:	08223255	Filing Dt:	04/04/1994
Title:	PHOTOLITHOGRAPHIC PROCESS FOR REDUCING REPEATED DEFECTS

Patent #:	5463332	Issue Dt:	10/31/1995	Application #:	08279035	Filing Dt:	07/22/1994
Title:	MULTIPLE DIFFERENTIAL INPUT ECL OR/NOR GATE

Patent #:	5517453	Issue Dt:	05/14/1996	Application #:	08306454	Filing Dt:	09/15/1994
Title:	MEMORY WITH MULTIPLE ERASE MODES

Patent #:	5449633	Issue Dt:	09/12/1995	Application #:	08327319	Filing Dt:	10/21/1994
Title:	A METHOD FOR FABRICATING AN ULTRA-HIGH-DENSITY ALTERNATE METAL VIRTUAL GROUND ROM

Patent #:	5602775	Issue Dt:	02/11/1997	Application #:	08404510	Filing Dt:	03/15/1995
Title:	FLASH EEPROM MEMORY SYSTEM FOR LOW VOLTAGE OPERATION AND METHOD

Patent #:	5576988	Issue Dt:	11/19/1996	Application #:	08430017	Filing Dt:	04/27/1995
Title:	SECURE NON-VOLATILE MEMORY ARRAY

Patent #:	5646886	Issue Dt:	07/08/1997	Application #:	08449564	Filing Dt:	05/24/1995
Title:	FLASH MEMORY HAVING SEGMENTED ARRAY FOR IMPROVED OPERATION

Patent #:	5508642	Issue Dt:	04/16/1996	Application #:	08472071	Filing Dt:	06/05/1995
Title:	SERIES-GATED EMITTER-COUPLED LOGIC CIRCUIT PROVIDING CLOSELY SPACED OUTPUT VOLTAGES

Patent #:	5721739	Issue Dt:	02/24/1998	Application #:	08572070	Filing Dt:	12/14/1995
Title:	METHOD FOR DETECTING READ ERRORS, CORRECTING SINGLE-BIT READ ERRORS AND REPORTING MULTIPLE-BIT READ ERRORS

Assignor

NATIONAL SEMICONDUCTOR CORPORATION

Exec Dt:

03/11/1997

Assignee

FAIRCHILD SEMICONDUCTOR CORPORATION

333 WESTERN AVENUE

SOUTH PORTLAND, MAINE 04106

Correspondence name and address
	DECHERT PRICE & RHOADS
	TODD DICKINSON
	1717 ARCH STREET
	4000 BELL ATLANTIC TOWER
	PHILADELPHIA, PA 19103

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