Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 006468/0103 | |
| Pages: | 3 |
| | Recorded: | 02/24/1993 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST. |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
05/10/1994
|
Application #:
|
08021573
|
Filing Dt:
|
02/24/1993
|
Title:
|
PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT DEVICE BY FORMING A PLANARIZED POLYSILAZANE LAYER AND OXIDIZING TO FORM OXIDE LAYER
|
|
Assignees
|
|
|
1015, KAMIKODANAKA, NAKAHARA-KU, KAWASAKI-SHI |
KANAGAWA, 211, JAPAN |
|
|
|
5950, SOEDA, IRIKI-CHO, SATSUMA-GUN |
KAGOSHIMA 895-14, JAPAN |
|
Correspondence name and address
|
|
ALBERT TOCKMAN
|
|
ARMSTRONG, WESTERMAN, HATTORI, ET AL.
|
|
SUITE 1000
|
|
1725 K STREET, N.W.
|
|
WASHINGTON, D.C. 20006
|
Search Results as of:
09/22/2024 10:08 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|