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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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10992999
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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MULTIPLE BUFFER INSERTION IN GLOBAL ROUTING
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10993603
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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07/14/2005
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Title:
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PROCESS AND APPARATUS FOR GENERATING A STRONG PHASE SHIFT OPTICAL PATTERN FOR USE IN AN OPTICAL DIRECT WRITE LITHOGRAPHY PROCESS
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10994114
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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METHOD OF ESTIMATING A TOTAL PATH DELAY IN AN INTEGRATED CIRCUIT DESIGN WITH STOCHASTICALLY WEIGHTED CONSERVATISM
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Patent #:
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Issue Dt:
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10/07/2008
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Application #:
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10995777
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Filing Dt:
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11/23/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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VIRTUAL DATA REPRESENTATION THROUGH SELECTIVE BIDIRECTIONAL TRANSLATION
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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10996074
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Filing Dt:
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11/23/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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METHOD TO SELECTIVELY IDENTIFY AT RISK DIE BASED ON LOCATION WITHIN THE RETICLE
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Patent #:
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Issue Dt:
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01/01/2008
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Application #:
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10999468
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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VERIFICATION OF RRAM TILING NETLIST
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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10999493
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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METHOD AND BIST ARCHITECTURE FOR FAST MEMORY TESTING IN PLATFORM-BASED INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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11000104
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
| | | | |
Title:
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RRAM MEMORY TIMING LEARNING TOOL
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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11002576
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Filing Dt:
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12/01/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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AUTOMATIC RECOGNITION OF GEOMETRIC POINTS IN A TARGET IC DESIGN FOR OPC MASK QUALITY CALCULATION
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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11004309
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Filing Dt:
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12/03/2004
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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RAMPTIME PROPAGATION ON DESIGNS WITH CYCLES
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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11005690
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Filing Dt:
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12/07/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
Title:
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INTERCONNECT INTEGRITY VERIFICATION
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11006349
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Filing Dt:
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12/06/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
Title:
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METHOD AND TIMING HARNESS FOR SYSTEM LEVEL STATIC TIMING ANALYSIS
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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11007039
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Filing Dt:
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12/08/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
Title:
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DENSITY DRIVEN LAYOUT FOR RRAM CONFIGURATION MODULE
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11008854
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Filing Dt:
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12/09/2004
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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ACCELERATING PCB DEVELOPMENT AND DEBUG IN ADVANCE OF PLATFORM ASIC PROTOTYPE SAMPLES
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11010745
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Filing Dt:
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12/13/2004
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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CELL BUILDER FOR DIFFERENT LAYER STACKS
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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11011384
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Filing Dt:
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12/14/2004
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Publication #:
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Pub Dt:
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05/12/2005
| | | | |
Title:
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METHOD FOR POST-OPC MULTI LAYER OVERLAY QUALITY INSPECTION
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11012618
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Filing Dt:
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12/14/2004
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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OPC EDGE CORRECTION BASED ON A SMOOTHED MASK DESIGN
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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11012741
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Filing Dt:
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12/15/2004
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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FLOORPLAN VISUALIZATION METHOD USING GATE COUNT AND GATE DENSITY ESTIMATIONS
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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11013641
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Filing Dt:
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12/16/2004
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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SYSTEM AND METHOD FOR IMPLEMENTING POSTPONED QUASI-MASKING TEST OUTPUT COMPRESSION IN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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11015114
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Filing Dt:
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12/17/2004
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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METHOD OF PARASITIC EXTRACTION FROM A PREVIOUSLY CALCULATED CAPACITANCE SOLUTION
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11015123
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Filing Dt:
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12/17/2004
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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METHOD OF IMPLEMENTING AN ENGINEERING CHANGE ORDER IN AN INTEGRATED CIRCUIT DESIGN BY WINDOWS
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11016192
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Filing Dt:
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12/17/2004
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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SYSTEM FOR PERFORMING AUTOMATIC TEST PIN ASSIGNMENT FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11017015
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Filing Dt:
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12/20/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
Title:
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RULES AND DIRECTIVES FOR VALIDATING CORRECT DATA USED IN THE DESIGN OF SEMICONDUCTOR PRODUCTS
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Patent #:
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|
Issue Dt:
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07/22/2008
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Application #:
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11017017
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Filing Dt:
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12/20/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
Title:
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LANGUAGE AND TEMPLATES FOR USE IN THE DESIGN OF SEMICONDUCTOR PRODUCTS
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Patent #:
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|
Issue Dt:
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03/04/2008
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Application #:
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11019885
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Filing Dt:
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12/22/2004
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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INTEGRATED COMPUTER-AIDED CIRCUIT DESIGN KIT FACILITATING VERIFICATION OF DESIGNS ACROSS DIFFERENT PROCESS TECHNOLOGIES
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11027266
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Filing Dt:
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12/31/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
Title:
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GUIDED CAPTURE, CREATION, AND SEAMLESS INTEGRATION WITH SCALABLE COMPLEXITY OF A CLOCK SPECIFICATION INTO A DESIGN FLOW OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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11028403
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Filing Dt:
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01/03/2005
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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STATIC TIMING AND RISK ANALYSIS TOOL
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Patent #:
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|
Issue Dt:
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06/19/2007
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Application #:
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11032720
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Filing Dt:
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01/10/2005
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Publication #:
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Pub Dt:
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10/20/2005
| | | | |
Title:
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THREE-DIMENSIONAL INTERCONNECT RESISTANCE EXTRACTION USING VARIATIONAL METHOD
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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11036822
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Filing Dt:
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01/14/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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METHOD FOR ESTIMATING A FREQUENCY-BASED RAMPTIME LIMIT
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11037306
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Filing Dt:
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01/18/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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FREQUENCY DEPENDENT TIMING MARGIN
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11041489
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Filing Dt:
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01/24/2005
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Publication #:
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|
Pub Dt:
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08/24/2006
| | | | |
Title:
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METHOD OF BUFFER INSERTION TO ACHIEVE PIN SPECIFIC DELAYS
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Patent #:
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|
Issue Dt:
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06/06/2006
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Application #:
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11053505
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Filing Dt:
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02/08/2005
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Publication #:
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|
Pub Dt:
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07/07/2005
| | | | |
Title:
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MIXED LVR AND HVR RETICLE SET DESIGN FOR THE PROCESSING OF GATE ARRAYS, EMBEDDED ARRAYS AND RAPID CHIP PRODUCTS
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Patent #:
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|
Issue Dt:
|
04/11/2006
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Application #:
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11054460
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Filing Dt:
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02/09/2005
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Title:
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RRAM BACKEND FLOW
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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11054879
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Filing Dt:
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02/10/2005
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Publication #:
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|
Pub Dt:
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07/07/2005
| | | | |
Title:
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System and method for coevolutionary circuit design
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Patent #:
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|
Issue Dt:
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02/05/2008
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Application #:
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11055752
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Filing Dt:
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02/10/2005
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Publication #:
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|
Pub Dt:
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07/07/2005
| | | | |
Title:
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METHOD FOR EVALUATING LOGIC FUNCTIONS BY LOGIC CIRCUITS HAVING OPTIMIZED NUMBER OF AND/OR SWITCHES
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Patent #:
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|
Issue Dt:
|
02/24/2009
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Application #:
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11056838
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Filing Dt:
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02/11/2005
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Publication #:
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|
Pub Dt:
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08/17/2006
| | | | |
Title:
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METHOD AND SYSTEMS FOR UTILIZING SIMPLIFIED RESIST PROCESS MODELS TO PERFORM OPTICAL AND PROCESS CORRECTIONS
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|
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Patent #:
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|
Issue Dt:
|
04/10/2007
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Application #:
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11061292
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Filing Dt:
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02/18/2005
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Title:
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METHODS AND STRUCTURE FOR IMPROVED HIGH-SPEED TDF TESTING USING ON-CHIP PLL
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Patent #:
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|
Issue Dt:
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06/05/2007
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Application #:
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11061581
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Filing Dt:
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02/18/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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NEGATIVE BIAS TEMPERATURE INSTABILITY MODELING
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Patent #:
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Issue Dt:
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02/12/2008
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Application #:
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11071623
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Filing Dt:
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03/03/2005
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Publication #:
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Pub Dt:
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09/07/2006
| | | | |
Title:
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METHOD FOR DESCRIBING AND DEPLOYING DESIGN PLATFORM SETS
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Patent #:
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|
Issue Dt:
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11/20/2007
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Application #:
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11074173
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Filing Dt:
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03/07/2005
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Publication #:
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Pub Dt:
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09/07/2006
| | | | |
Title:
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METHOD FOR TRACING PATHS WITHIN A CIRCUIT
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Patent #:
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|
Issue Dt:
|
04/04/2006
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Application #:
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11075239
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Filing Dt:
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03/07/2005
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Title:
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DUAL SOURCE LITHOGRAPHY FOR DIRECT WRITE APPLICATION
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|
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Patent #:
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|
Issue Dt:
|
05/20/2008
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Application #:
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11079017
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Filing Dt:
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03/11/2005
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Publication #:
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|
Pub Dt:
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09/14/2006
| | | | |
Title:
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PROBABILISTIC NOISE ANALYSIS
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Patent #:
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|
Issue Dt:
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11/17/2009
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Application #:
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11079439
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Filing Dt:
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03/14/2005
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Publication #:
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|
Pub Dt:
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10/19/2006
| | | | |
Title:
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BASE PLATFORMS WITH COMBINED ASIC AND FPGA FEATURES AND PROCESS OF USING THE SAME
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Patent #:
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|
Issue Dt:
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08/28/2007
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Application #:
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11079998
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Filing Dt:
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03/15/2005
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Publication #:
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|
Pub Dt:
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09/28/2006
| | | | |
Title:
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METHOD OF IDENTIFYING FLOORPLAN PROBLEMS IN AN INTEGRATED CIRCUIT LAYOUT
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Patent #:
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|
Issue Dt:
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04/21/2009
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Application #:
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11092406
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Filing Dt:
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03/29/2005
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Publication #:
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|
Pub Dt:
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10/12/2006
| | | | |
Title:
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INTELLIGENT TIMING ANALYSIS AND CONSTRAINT GENERATION GUI
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Patent #:
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|
Issue Dt:
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04/17/2007
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Application #:
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11097936
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Filing Dt:
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03/31/2005
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Publication #:
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|
Pub Dt:
|
10/19/2006
| | | | |
Title:
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SEGMENTED ADDRESSABLE SCAN ARCHITECTURE AND METHOD FOR IMPLEMENTING SCAN-BASED TESTING OF INTEGRATED CIRCUITS
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Patent #:
|
|
Issue Dt:
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12/25/2007
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Application #:
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11099772
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Filing Dt:
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04/06/2005
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Publication #:
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|
Pub Dt:
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10/12/2006
| | | | |
Title:
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INTEGRATED CIRCUIT WITH RELOCATABLE PROCESSOR HARDMAC
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Patent #:
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|
Issue Dt:
|
07/08/2008
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Application #:
|
11100986
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Filing Dt:
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04/06/2005
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Publication #:
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|
Pub Dt:
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10/12/2006
| | | | |
Title:
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ADVANCED STANDARD CELL POWER CONNECTION
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Patent #:
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|
Issue Dt:
|
11/21/2006
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Application #:
|
11107585
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Filing Dt:
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04/14/2005
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Publication #:
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|
Pub Dt:
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09/15/2005
| | | | |
Title:
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AUTOMATIC METHOD AND SYSTEM FOR INSTANTIATING BUILT-IN-TEST (BIST) MODULES IN ASIC MEMORY DESIGNS
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|
Patent #:
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|
Issue Dt:
|
05/13/2008
|
Application #:
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11113615
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Filing Dt:
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04/25/2005
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Publication #:
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|
Pub Dt:
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10/26/2006
| | | | |
Title:
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DISTRIBUTED RELOCATABLE VOLTAGE REGULATOR
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Patent #:
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Issue Dt:
|
06/02/2009
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Application #:
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11115798
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Filing Dt:
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04/27/2005
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Publication #:
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|
Pub Dt:
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11/02/2006
| | | | |
Title:
|
I /O PLANNING WITH LOCK AND INSERTION FEATURES
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|
Patent #:
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|
Issue Dt:
|
07/03/2007
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Application #:
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11116616
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Filing Dt:
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04/28/2005
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Publication #:
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|
Pub Dt:
|
11/02/2006
| | | | |
Title:
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SCAN TEST EXPANSION MODULE
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Patent #:
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|
Issue Dt:
|
11/06/2007
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Application #:
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11120067
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Filing Dt:
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05/02/2005
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Publication #:
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Pub Dt:
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12/14/2006
| | | | |
Title:
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METHOD OF INTERCONNECT FOR MULTI-SLOT METAL-MASK PROGRAMMABLE RELOCATABLE FUNCTION PLACED IN AN I/O REGION
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11125307
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Filing Dt:
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05/09/2005
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Publication #:
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Pub Dt:
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11/09/2006
| | | | |
Title:
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RELOCATABLE MIXED-SIGNAL FUNCTIONS
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11126880
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Filing Dt:
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05/11/2005
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
Title:
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R-CELLS CONTAINING CDM CLAMPS
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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11129547
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Filing Dt:
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05/13/2005
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
Title:
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RELOCATABLE BUILT-IN SELF TEST (BIST) ELEMENTS FOR RELOCATABLE MIXED-SIGNAL ELEMENTS
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Patent #:
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Issue Dt:
|
02/05/2008
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Application #:
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11131990
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Filing Dt:
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05/18/2005
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Publication #:
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Pub Dt:
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12/14/2006
| | | | |
Title:
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METHODS FOR USING CHECKSUMS IN X-TOLERANT TEST RESPONSE COMPACTION IN SCAN-BASED TESTING OF INTEGRATED CIRCUITS
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Patent #:
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|
Issue Dt:
|
01/13/2009
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Application #:
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11133815
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Filing Dt:
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05/20/2005
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Publication #:
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Pub Dt:
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11/23/2006
| | | | |
Title:
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USE OF CONFIGURABLE MIXED-SIGNAL BUILDING BLOCK FUNCTIONS TO ACCOMPLISH CUSTOM FUNCTIONS
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Patent #:
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Issue Dt:
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04/15/2008
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Application #:
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11136180
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05/24/2005
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11/30/2006
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03/04/2008
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11140392
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05/27/2005
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11/30/2006
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05/27/2008
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11151043
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06/13/2005
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12/14/2006
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09/30/2008
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11156319
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06/18/2005
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10/27/2005
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02/13/2007
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11165778
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06/24/2005
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12/28/2006
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11/11/2008
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11176514
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07/07/2005
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01/11/2007
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11/02/2010
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07/15/2005
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01/18/2007
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07/15/2008
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11184401
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07/19/2005
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12/01/2005
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10/28/2008
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11187455
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07/22/2005
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01/25/2007
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08/21/2007
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11192526
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07/29/2005
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02/01/2007
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12/09/2008
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08/01/2005
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02/01/2007
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01/20/2009
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08/05/2005
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02/08/2007
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11/20/2007
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08/16/2005
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02/22/2007
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12/23/2008
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08/16/2005
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02/22/2007
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03/31/2009
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08/17/2005
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02/22/2007
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01/29/2008
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08/31/2005
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03/01/2007
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03/04/2008
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09/30/2005
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04/05/2007
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07/29/2008
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10/05/2005
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04/05/2007
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05/06/2008
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10/05/2005
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04/05/2007
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08/19/2008
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10/05/2005
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04/05/2007
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12/16/2008
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04/12/2007
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10/21/2008
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11247630
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10/11/2005
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04/12/2007
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06/15/2010
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11256830
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10/24/2005
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04/26/2007
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05/27/2008
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10/24/2005
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04/26/2007
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07/22/2008
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10/24/2005
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04/26/2007
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02/17/2009
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10/24/2005
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04/26/2007
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07/15/2008
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10/26/2005
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04/26/2007
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12/30/2008
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10/27/2005
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07/19/2007
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12/16/2008
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11/03/2005
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03/30/2006
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01/29/2008
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11/09/2005
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05/10/2007
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09/09/2008
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11280110
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11/16/2005
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05/17/2007
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06/17/2008
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11/16/2005
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05/17/2007
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11/28/2005
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05/31/2007
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02/24/2009
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11/30/2005
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05/31/2007
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07/29/2008
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12/06/2005
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06/07/2007
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09/01/2009
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12/09/2005
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06/14/2007
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07/29/2008
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12/16/2005
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06/21/2007
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08/19/2008
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12/19/2005
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06/21/2007
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06/09/2009
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12/19/2005
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06/21/2007
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05/18/2010
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12/21/2005
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06/21/2007
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01/20/2009
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12/29/2005
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07/05/2007
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10/07/2008
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12/29/2005
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07/05/2007
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