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Reel/Frame:023802/0124   Pages: 386
Recorded: 01/14/2010
Attorney Dkt #:609612800100
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 11
1
Patent #:
Issue Dt:
07/05/2005
Application #:
10728388
Filing Dt:
12/05/2003
Publication #:
Pub Dt:
06/17/2004
Title:
METHOD FOR FABRICATING SELF-ALIGNED CONTACT CONNECTIONS ON BURIED BIT LINES
2
Patent #:
Issue Dt:
07/11/2006
Application #:
10890803
Filing Dt:
07/14/2004
Publication #:
Pub Dt:
03/03/2005
Title:
SEMICONDUCTOR MEMORY HAVING CHARGE TRAPPING MEMORY CELLS
3
Patent #:
Issue Dt:
04/25/2006
Application #:
10911994
Filing Dt:
08/05/2004
Publication #:
Pub Dt:
03/24/2005
Title:
CAPACITORLESS 1-TRANSISTOR DRAM CELL AND FABRICATION METHOD
4
Patent #:
Issue Dt:
04/17/2007
Application #:
11006049
Filing Dt:
12/07/2004
Publication #:
Pub Dt:
04/21/2005
Title:
METHOD FOR FABRICATING NROM MEMORY CELLS WITH TRENCH TRANSISTORS
5
Patent #:
Issue Dt:
08/22/2006
Application #:
11023041
Filing Dt:
12/27/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHOD FOR FABRICATING AN NROM MEMORY CELL ARRAY
6
Patent #:
Issue Dt:
01/29/2008
Application #:
11072695
Filing Dt:
03/04/2005
Publication #:
Pub Dt:
09/08/2005
Title:
SONOS MEMORY CELLS AND ARRAYS AND METHOD OF FORMING THE SAME
7
Patent #:
Issue Dt:
08/21/2007
Application #:
11145520
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
12/07/2006
Title:
REFERENCE SCHEME FOR A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
8
Patent #:
Issue Dt:
02/27/2007
Application #:
11145541
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
12/29/2005
Title:
SEMICONDUCTOR MEMORY HAVING CHARGE TRAPPING MEMORY CELLS AND FABRICATION METHOD
9
Patent #:
Issue Dt:
03/13/2007
Application #:
11145551
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
12/07/2006
Title:
SENSING SCHEME FOR A NON-VOLATILE SEMICONDUCTOR MEMORY CELL
10
Patent #:
Issue Dt:
09/23/2008
Application #:
11170187
Filing Dt:
06/29/2005
Publication #:
Pub Dt:
01/04/2007
Title:
METHOD FOR PRODUCING CHARGE-TRAPPING MEMORY CELL ARRAYS
11
Patent #:
Issue Dt:
03/11/2008
Application #:
11367731
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
08/10/2006
Title:
CAPACITORLESS 1-TRANSISTOR DRAM CELL AND FABRICATION METHOD
Assignors
1
Exec Dt:
04/25/2006
2
Exec Dt:
04/25/2006
Assignee
1
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondence name and address
JONATHAN BOCKMAN
C/O MORRISON & FOERSTER LLP
1650 TYSONS BOULEVARD, SUITE 400
MCLEAN, VA 22102

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