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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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08372423
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Filing Dt:
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01/13/1995
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Title:
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SYSTEM MARGIN AND CORE TEMPERATURE MONITORING OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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08927479
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Filing Dt:
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09/11/1997
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Title:
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SELF-ALIGNED SILICIDATION STRUCTURE AND METHOD OF FORMATION THEREOF `
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08927831
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Filing Dt:
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09/11/1997
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Title:
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SWITCHED-MODE POWER SUPPLY
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08932310
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Filing Dt:
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09/17/1997
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Title:
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COUNTER BASED RINGER INTERFACE
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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08934831
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Filing Dt:
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09/22/1997
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Title:
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METHODS OF FORMING PAIRS OF TRANSISTORS, AND METHODS OF FORMING PAIRS OF TRANSISTORS HAVING DIFFERENT VOLTAGE TOLERANCES
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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08935592
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Filing Dt:
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09/23/1997
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Title:
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RECEIVER HAVING A COMMANDED TUNING LOOP AND A SELF-TUNING LOOP
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08939550
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Filing Dt:
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09/29/1997
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Title:
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CURRENT AND VOLTAGE-SENSING
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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08941898
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Filing Dt:
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09/30/1997
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Title:
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METHODS AND APPARATUS FOR DESIGN RULE CHECKING
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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08944463
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Filing Dt:
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10/06/1997
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Title:
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SHAPED ETCH-FRONT FOR SELF-ALIGNED CONTACT
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08951880
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Filing Dt:
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10/17/1997
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Title:
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METHOD AND SYSTEM FOR ASSESSING A MEASUREMENT PROCEDURE AND MEASUREMENT-INDUCED UNCERTAINTIES ON A BATCHWISE MANUFACTURING PROCESS OF DISCRETE PRODUCTS
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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08957671
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Filing Dt:
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10/24/1997
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Title:
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STANDARD CELL POWER-ON-RESET CIRCUIT
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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08959218
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Filing Dt:
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10/28/1997
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Title:
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SWITCHED-MODE POWER SUPPLY WITH STATE INFORMATION
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Patent #:
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Issue Dt:
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01/04/2000
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Application #:
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08959346
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Filing Dt:
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10/28/1997
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Title:
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LATERAL SILICON CARBIDE SEMICONDUCTOR DEVICE HAVING A DRIFT REGION WITH A VARYING DOPING LEVEL
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08962154
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Filing Dt:
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11/03/1997
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Title:
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BAND-GAP REFERENCE VOLTAGE SOURCE
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08962593
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Filing Dt:
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10/31/1997
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Title:
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SCALABLE N-PORT MEMORY STRUCTURES
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08966224
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Filing Dt:
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11/07/1997
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Title:
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PROTECTION METHOD AGAINST EEPROM-DIRECTED INTRUSION INTO A MOBILE COMMUNICATION DEVICE THAT HAS A PROCESSOR, AND A DEVICE HAVING SUCH PROTECTION MECHANISM
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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08968374
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Filing Dt:
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11/12/1997
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Title:
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DATA PROCESSING CIRCUIT WITH SELF-TIMED INSTRUCTION EXECUTION AND POWER REGULATION
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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08974043
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Filing Dt:
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11/19/1997
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Title:
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METHOD AND APPARATUS FOR DETECTING MISALIGNMENTS IN INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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09/14/1999
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Application #:
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08974203
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Filing Dt:
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11/19/1997
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Title:
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METHOD FOR ALIGNMENT USING MULTIPLE WAVELENGTHS OF LIGHT
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08976190
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Filing Dt:
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11/21/1997
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Title:
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HIGH-SPEED LOGIC EMBODIED DIFFERENTIAL DYNAMIC CMOS TRUE SINGLE PHASE CLOCK LATCHES AND FLIP-FLOPS WITH SINGLE TRANSISTOR CLOCK LATCHES
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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08984483
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Filing Dt:
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12/01/1997
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Title:
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VIA ALIGNMENT ETCH COMPLETION AND CRITICAL DIMENSION MEASUREMENT METHOD AND STRUCTURE
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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08988593
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Filing Dt:
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12/11/1997
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Title:
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CIRCUIT ARRANGEMENT FOR A MEMORY CELL OF A D/A CONVERTER
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08988711
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Filing Dt:
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12/11/1997
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Title:
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CLOCK MULTIPLEXER WITH SELECTION AND DESELECTION OF CLOCK MODULES
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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08993244
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Filing Dt:
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12/18/1997
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Title:
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LOW POWER CLOCK SOUARER WITH TIGHT DUTY CYCLE CONTROL
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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08995468
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Filing Dt:
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12/22/1997
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Title:
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SEMICONDUCTOR DEVICE HAVING INCREASED SAFE OPERATING RANGER
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Patent #:
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Issue Dt:
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03/23/1999
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Application #:
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08995469
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Filing Dt:
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12/22/1997
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Title:
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DEVICE COMPRISING AN INTEGRATEG COIL
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08995471
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Filing Dt:
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12/22/1997
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Title:
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A PHASE LOCKED LOOP LOCK CONDITION DETECTOR
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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08995651
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Filing Dt:
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12/22/1997
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Title:
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METHOD FOR MAKING RELIABLE INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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08995679
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Filing Dt:
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12/22/1997
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Title:
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METHOD FOR PREVENTING ELECTROCHEMICAL EROSION OF INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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08996672
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Filing Dt:
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12/23/1997
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Title:
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METHOD OF PROVIDING A GETTERING SCHEME IN THE MANUFACTURE OF SILICON-ON-INSULATOR (SOI) INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09007117
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Filing Dt:
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01/14/1998
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Title:
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METHOD OF SELECTIVELY APPLYING DOPANTS TO AN INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE WITHOUT USING A MASK
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09009747
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Filing Dt:
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01/20/1998
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Title:
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ACCESS CONTROL SYSTEM FOR CONTROLLING THE ACCESS TO AT LEAST ONE SPACE, AND PRODUCT INCLUDING AN ACCESS CONTROL SYSTEM
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09009749
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Filing Dt:
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01/20/1998
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Title:
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TRANSPONDER COMMUNICATION DEVICE FOR THE CONTACTLESS COMMUNICATION WITH AT LEAST ONE TRANSPONDER, AND TRANSPONDER FOR THE CONTACTLESS COMMUNICATION WITH AT LEAST ONE TRANSPONDER COMMUNICATION DEVICE
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09009750
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Filing Dt:
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01/20/1998
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Title:
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TRANSPONDER COMMUNICATION DEVICE FOR THE CONTACTLESS COMMUNICATION WITH A PLURALITY OF INDIVIDUALLY SELECTABLE TRANSPONDERS, AND TRANSPONDER FOR THE CONTACTLESS COMMUNICATION WITH AT LEAST ONE TRANSPONDER COMMUNICATION DEVICE
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Patent #:
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Issue Dt:
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03/21/2000
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Application #:
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09010217
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Filing Dt:
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01/21/1998
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Title:
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CACHE BASED SCAN MATRIX KEYBOARD CONTROLLER
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09010897
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Filing Dt:
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01/22/1998
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Title:
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HIGH-SPEED MODULAR EXPONENTIATOR AND MULTIPLIER
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09012322
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Filing Dt:
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01/23/1998
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Title:
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POWER SUPPLY CIRCUIT USING A CONSTANT CURRENT AND TELEPHONE APPARATUS INCLUDING SUCH A CIRCUIT
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09014008
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Filing Dt:
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01/27/1998
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Title:
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SYSTEM AND METHOD FOR ACCESSING INFORMATION DECRYPTED IN MULTIPLE -BYTE BLOCKS
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Patent #:
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Issue Dt:
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03/30/1999
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Application #:
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09014832
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Filing Dt:
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01/28/1998
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Title:
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MICRO-ELECTROMECHANICAL VOLTAGE SHIFTER
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09015881
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Filing Dt:
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01/29/1998
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Title:
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HEARING AID WITH EXTERNAL FREQUENCY CONTROL
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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09016752
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Filing Dt:
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01/30/1998
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Title:
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AUTOCLAVE WITH IMPROVED HEATING AND ACCESS
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09022847
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Filing Dt:
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02/12/1998
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Title:
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PIPELINED HARDWARE IMPLEMENTATION OF A HASHING ALGORITHM
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09023638
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Filing Dt:
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02/13/1998
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Title:
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SYSTEM FOR DISLODGING BY-PRODUCT AGGLOMERATIONS FROM A POLISHING PAD OF A CHEMICAL MECHANICAL POLISHING MACHINE
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09025215
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Filing Dt:
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02/18/1998
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Title:
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PROTECTION CIRCUITS AND METHODS OF PROTECTING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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09025429
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Filing Dt:
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02/18/1998
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Title:
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METHODS OF PROTECTING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/20/2000
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Application #:
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09028430
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Filing Dt:
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02/24/1998
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Title:
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SEMICONDUCTOR DEVICE WITH A PROGRAMMABLE ELEMENT HAVING A P-TYPE SUBSTRATE AND FLOATING GATE WITH A THIN GATE DIELECTRIC
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09033728
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Filing Dt:
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03/03/1998
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Title:
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IDDQ TESTABLE PROGRAMMABLE LOGIC ARRAYS
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Patent #:
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Issue Dt:
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05/04/1999
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Application #:
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09033729
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Filing Dt:
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03/03/1998
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Title:
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SWITCHED-MODE POWER SUPPLY HAVING A DELAY-INSENSITIVE TIMING IN THE CONTROL LOOP
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09035735
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Filing Dt:
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03/05/1998
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Title:
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PROCESS FOR FORMING METAL INTERCONNECTS WITH REDUCED OR ELIMINATED METAL RECESS IN VIAS
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09042965
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Filing Dt:
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03/17/1998
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Title:
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METHOD AND ARRANGEMENT FOR THE ANALOG/DIGITAL CONVERSION OF A PICTURE SIGNAL
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09044544
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Filing Dt:
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03/19/1998
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Title:
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METHOD OF MANUFACTURING A NON-VOLATILE MEMORY AND A CMOS TRANISITOR
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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09052859
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Filing Dt:
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03/31/1998
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Title:
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SEMICONDUCTOR STRUCTURES FOR SUPPRESSING GATE OXIDE PLASMA CHARGING DAMAGE AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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09052908
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Filing Dt:
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03/31/1998
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Title:
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AUTOMATED DESIGN OF ON-CHIP CAPACITIVE STRUCTURES FOR SUPPRESSING INDUCTIVE NOISE
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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09054112
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Filing Dt:
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04/02/1998
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Title:
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INTEGRATED CIRCUIT COMPRISING A PHASE-CONTROL LOOP WITH PROGRAMMABLE PHASE SHIFT
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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09059631
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Filing Dt:
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04/13/1998
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Title:
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PSEUDO-DIFFERENTIAL LOGIC RECEIVER
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09060085
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Filing Dt:
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04/14/1998
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Title:
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SYNCHRONOUS SIGMA DELTA MODULATOR INCLUDING A DECISION CIRCUIT USING A POLYPHASE SAMPLER
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09060086
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Filing Dt:
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04/14/1998
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Title:
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ANALOG TO DIGITAL CONVERTER COMPRISING AN ASYNCHRONOUS SIGMA DELTA MODULATOR AND DECIMATING DIGITAL FILTER
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09060088
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Filing Dt:
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04/14/1998
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Title:
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DIGITAL DC RESTORATION DEVICE
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Patent #:
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Issue Dt:
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12/19/2000
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Application #:
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09060089
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Filing Dt:
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04/14/1998
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Title:
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LOW-NOISE FREQUENCY DIVIDER
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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09061820
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Filing Dt:
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04/16/1998
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Title:
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RECURSIVE LOOKAHEAD-BASED 2N-BIT SERIAL MULTIPLIERS OVER GALOIS FIELD GF (2M)
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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09062169
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Filing Dt:
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04/17/1998
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Title:
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SWITCHED-MODE POWER SUPPLY HAVING AN IMPROVED START-UP CIRCUIT
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|
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Patent #:
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Issue Dt:
|
09/25/2001
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Application #:
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09062366
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Filing Dt:
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04/17/1998
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Title:
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TRANSPONDER WITH A FREQUENCY DETECTOR FOR PROTECTOIN OF SECURITY-RELATED DATA DURING CONTACTLESS INDUCTIVE COMMUNICATION, AND AN INTEGRATED CIRCUIT THEREFOR
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09062945
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Filing Dt:
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04/20/1998
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH A MULTILAYER WIRING
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09064014
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Filing Dt:
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04/20/1998
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Title:
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METHOD FOR ADAPTIVE SAMPLING FOR BUILDING ACCURATE COMPUTER MODELS
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09064207
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Filing Dt:
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04/22/1998
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Title:
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SEMICONDUCTOR DEVICE MANUFACTURE USING Si-1x Ge-x GATE SIDEWALLS ON MOS GATE STRUCTURE
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09069429
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Filing Dt:
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04/29/1998
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Title:
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ARRANGEMENT AND METHOD FOR DRAM CELL USING SHALLOW TRENCH ISOLATION
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09070217
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Filing Dt:
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04/30/1998
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Title:
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METHOD AND APPARATUS FOR OBTAINING TRANSFER CHARACTERISTICS OF A DEVICE UNDER TEST
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Patent #:
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Issue Dt:
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12/19/2000
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Application #:
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09073734
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Filing Dt:
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05/06/1998
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Title:
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METHOD FOR SUBSTANTIALLY PREVENTING FOOTINGS IN CHEMICALLY AMPLIFIED DEEP ULTRA VIOLET PHOTORESIST LAYERS
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09074564
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Filing Dt:
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05/07/1998
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Title:
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INTEGRATED CIRCUIT DEVICE WITH INTEGRAL DECOUPLING CAPACITOR
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09075847
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Filing Dt:
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05/12/1998
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Title:
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LOGIC SYNTHESIS CONSTRAINTS ALLOCATION AUTOMATING THE CONCURRENT ENGINEERING FLOWS
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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09076574
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Filing Dt:
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05/11/1998
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Title:
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SYSTEM INCLUDING ESD PROTECTION
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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09083221
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Filing Dt:
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05/22/1998
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Title:
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RAPIDLY CHARGED SAMPLE AND HOLD CIRCUIT
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09083697
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Filing Dt:
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05/21/1998
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Title:
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DIGITAL TO ANALOGUE AND ANALOGUE TO DIGITAL CONVERTERS
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09086700
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Filing Dt:
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05/28/1998
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Title:
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METHOD FOR REDUCING FACETING ON A PHOTORESIST LAYER DURING AN ETCH PROCESS
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09087492
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Filing Dt:
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05/29/1998
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Title:
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FABRICATION OF GATE AND DIFFUSION CONTACTS IN SELF-ALIGNED CONTACT PROCESS
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09087764
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Filing Dt:
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05/29/1998
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Title:
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SEMICONDUCTOR CALIBRATION STRUCTURES AND CALIBRATION WAFERS FOR ASCERTAINING LAYER ALIGNMENT DURING PROCESSING AND CALIBRATING MULTIPLE SEMICONDUCTOR WAFER COATING SYSTEMS
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09090101
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Filing Dt:
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06/03/1998
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Title:
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AUTHENTICATION SYSTEM
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09094831
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Filing Dt:
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06/15/1998
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Title:
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OPTICAL DISC DRIVE
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09096074
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Filing Dt:
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06/11/1998
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Title:
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MAGNETIC FIELD SENSOR WITH DOUBLE WHEATSTONE BRIDGE HAVING MAGETO- RESISTIVE ELEMENTS
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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09096428
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Filing Dt:
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06/12/1998
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Title:
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CIRCUIT ARRANGEMENT INCLUDING A DIFFERENTIAL AMPLIFIER STAGE
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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09100832
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Filing Dt:
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06/19/1998
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Title:
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LATERAL THIN-FILM SOI DEVICES WITH GRADED TOP OXIDE AND GRADED DRIFT REGION
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09102367
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Filing Dt:
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06/23/1998
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Title:
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METHOD OF FORMING ANTI-FUSE STRUCTURE
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09102797
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Filing Dt:
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06/23/1998
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Title:
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SACRIFICIAL MULTILAYER ANTI-REFLECTIVE COATING FOR MOS GATE FORMATION
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09103730
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Filing Dt:
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06/24/1998
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Title:
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ANGLE SENSOR HAVING LATERAL MAGNETIC FIELD SENSOR ELEMENT AND AXIAL MAGNETIC FIELD DIRECTION MEASURING ELEMENT FOR DETERMINING ANGULAR POSITION
|
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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09104753
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Filing Dt:
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06/25/1998
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Title:
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METHOD FOR ENCAPSULATING A METAL VIA IN DAMASCENE
|
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09105285
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Filing Dt:
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06/26/1998
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Title:
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SECURE DATA COMMUNICATION OVER A MEMORY-MAPPED SERIAL COMMUNICATIONS INTERFACE UTILIZING A DISTRIBUTED FIREWALL
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09106717
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Filing Dt:
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06/29/1998
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Title:
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SECURE CACHE FOR INSTRUCTION AND DATA PROTECTION
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09106718
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Filing Dt:
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06/29/1998
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Title:
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CHEMICAL WET ETCH REMOVAL OF UNDERLAYER MATERIAL AFTER PERFORMING CHEMICAL MECHANICAL POLISHING ON A PRIMARY LAYER
|
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|
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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09107529
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Filing Dt:
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06/30/1998
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Title:
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LOW VOLTAGE, BETA IMMUNE VARIABLE GAIN AMPLIFIER WITH HIGH SUPPLY VOLTAGE REJECTION
|
|
|
|
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Patent #:
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Issue Dt:
|
03/13/2001
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Application #:
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09109848
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Filing Dt:
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07/02/1998
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Title:
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ANALOG TEST ACCESS PORT AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09111612
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Filing Dt:
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07/07/1998
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Title:
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OUTPUT STAGE WITH SLEWING CONTROL MEANS
|
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|
|
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09114750
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Filing Dt:
|
07/13/1998
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Title:
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CONVERTER CIRCUIT AND VARIABLE GAIN AMPLIFIER WITH TEMPERATURE COMPENSATION
|
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|
|
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09115714
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Filing Dt:
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07/15/1998
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Title:
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SEMICONDUCTOR DEVICE WITH GATE ELECTRODES FOR SUB-MICRON APPLICATIONS AND FABRICATION THEREOF
|
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09115781
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Filing Dt:
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07/14/1998
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Publication #:
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Pub Dt:
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03/06/2003
| | | | |
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Title:
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INTEGRATED CIRCUIT WITH PROGRAMMABLE LOCKING CIRCUIT
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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09120895
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Filing Dt:
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07/22/1998
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Title:
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PROCESS TO IMPROVE ADHESION OF CAP LAYERS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09121576
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Filing Dt:
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07/23/1998
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Title:
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MULTI-STANDARD RECEPTION
|
|
|
|
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Patent #:
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Issue Dt:
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10/17/2000
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Application #:
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09122407
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Filing Dt:
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07/24/1998
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|
Title:
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SILICON-ON-INSULATOR (SOI) HYBRID TRANSISTOR DEVICE STRUCTURE
|
|
|
|
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Patent #:
|
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Issue Dt:
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10/31/2000
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Application #:
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09124603
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Filing Dt:
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07/29/1998
|
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Title:
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METHOD FOR FORMING VIAS THROUGH POROUS DIELECTRIC MATERIAL AND DEVICES FORMED THEREBY
|
|
|
|
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Patent #:
|
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Issue Dt:
|
08/31/1999
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Application #:
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09128152
|
Filing Dt:
|
08/03/1998
|
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Title:
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"POWER SUPPLY HAVING A SYNCHRONOUS RECTIFIER CIRCUIT FOR IMPROVED SWITCHING TIMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
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Application #:
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09129498
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Filing Dt:
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08/05/1998
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|
Title:
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A METHOD AND DEVICE FOR AMPLIFYING DIGITAL SIGNALS
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