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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09036615
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Filing Dt:
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03/06/1998
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Publication #:
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Pub Dt:
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01/03/2002
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Title:
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METHOD AND SYSTEM FOR MANAGING STORAGE DEVICES OVER A NETWORK
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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09049522
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Filing Dt:
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03/27/1998
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Title:
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DATA TRANSFER BETWEEN SMALL COMPUTER SYSTEM INTERFACE SYSTEMS
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09055197
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Filing Dt:
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04/03/1998
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Title:
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SERIAL/PARALLEL GHZ TRANSCEIVER WITH PSEUDO-RANDOM BUILT IN SELF TEST PATTERN GENERATOR
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09062279
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Filing Dt:
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04/17/1998
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Title:
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FAULT TOLERANT REDUNDANT BUS BRIDGE SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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09062282
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Filing Dt:
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04/17/1998
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Title:
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REDUNDANT BUS BRIDGE SYSTEMS AND METHODS USING SELECTIVELY SYNCHRONIZED CLOCK SINGALS
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09067705
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Filing Dt:
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04/28/1998
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Title:
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METHOD AND APPARATUS FOR DETECTING DISABLED PHYSICAL DEVICES AND DELETING UNDELIVERABLE CELLS
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09078346
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Filing Dt:
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05/13/1998
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Title:
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BUS TERMINATION CIRCUITRY AND METHODS FOR IMPLEMENTING THE SAME
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09083569
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Filing Dt:
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05/22/1998
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Title:
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SCATTER GATHER MEMORY SYSTEM FOR A HARDWARE ACCELERATED COMMAND INTERPRETER ENGINE
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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09085671
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Filing Dt:
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05/27/1998
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Title:
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SCSI BUS TRANSCEIVER AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09088812
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Filing Dt:
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06/02/1998
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Title:
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SOURCE-DESTINATION RE-TIMED COOPERATIVE COMMUNICATION BUS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09089030
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Filing Dt:
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06/02/1998
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Title:
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HOST ADAPTER HAVING A SNAPSHOT MECHANISM
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09089039
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Filing Dt:
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06/02/1998
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Title:
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SYSTEM FOR DATA STREAM PACKER AND UNPACKER INTEGRATED CIRCUIT WHICH ALIGN DATA STORED IN A TWO LEVEL LATCH
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09089044
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Filing Dt:
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06/02/1998
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Title:
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MULTIPLE ACCESS MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09089057
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Filing Dt:
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06/02/1998
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Title:
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DECOUPLED SERIAL MEMORY ACCESS WITH PASSKEY PROTECTED MEMORY AREAS
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09089274
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Filing Dt:
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06/02/1998
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Title:
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HOST ADAPTER CAPABLE OF SIMULTANEOUSLY TRANSMITTING AND RECEIVING DATA OF MULTIPLE CONTEXTS BETWEEN A COMPUTER BUS AND PERIPHERAL BUS
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09089311
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Filing Dt:
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06/02/1998
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Title:
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A HOST ADAPTER HAVING PAGED DATA BUFFERS FOR CONTINUOUSLY TRANSFERRING DATA BETWEEN A SYSTEM BUS AND A PERIPHERAL BUS
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09097899
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Filing Dt:
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06/16/1998
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Title:
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BROADCAST COMMAND PACKET PROTOCOL FOR SCSI INTERFACE
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Patent #:
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Issue Dt:
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05/02/2000
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Application #:
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09098214
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Filing Dt:
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06/16/1998
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Title:
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QUICK ARBITRATION AND SELECT (QAS) PROTOCOL IN SCSI INTERFACE FOR CONFIGURING A CURRENT TARGET DEVICE TO ASSERT A QAS MESSAGE CODE DURING A MESSAGE-IN PHASE
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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09100568
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Filing Dt:
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06/19/1998
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Title:
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DIGITAL CONTROL OF A LINC LINEAR POWER AMPLIFIER
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09130196
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Filing Dt:
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08/05/1998
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Title:
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METHODS OF AND APPARATUS FOR MONITORING THE TERMINATION STATUS OF A SCSI BUS
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09130322
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Filing Dt:
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08/07/1998
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Title:
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DATA ALIGNMENT SYSTEM FOR A HARDWARE ACCELERATED COMMAND INTERPRETER ENGINE
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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09133736
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Filing Dt:
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08/13/1998
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Title:
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BBS ONE BIOS IMAGE MULTICARD SUPPORT
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09134635
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Filing Dt:
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08/14/1998
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Title:
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ASYNCHRONOUS BIT-TABLE CALENDAR FOR ATM SWITCH
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09134760
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Filing Dt:
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08/14/1998
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Title:
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METHOD AND APPARATUS OF BOOT DEVICE SWITCHING BY A FLOPPY DISK
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09181712
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Filing Dt:
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10/28/1998
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Title:
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INTELLIGENT INPUT/OUTPUT TARGET DEVICE COMMUNICATION AND EXCEPTION HANDLING
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09183164
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Filing Dt:
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10/30/1998
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Title:
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FIBRE CHANNEL CONTROLLER HAVING BOTH INBOUND AND OUTBOUND CONTROL UNITS FOR SIMULTANEOUSLY PROCESSING BOTH MUTIPLE INBOUND AND OUTBOUND SEQUENCES
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09183580
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Filing Dt:
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10/30/1998
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Title:
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FIBRE CHANNEL LOOP MAP INITIALIZATION PROTOCOL IMPLEMENTED IN HARDWARE
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09183865
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Filing Dt:
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10/30/1998
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Title:
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METHOD FOR REASSEMBLING DATA FRAMES RECEIVED-OUT OF ORDER WITH RESPECT TO A DATA SEQUENCE USING EXPECTED FRAME INFORMATION AND BUFFER LIST CALCULATIONS
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09183969
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Filing Dt:
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10/30/1998
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Title:
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COMMAND FORWARDING: A METHOD FOR OPTIMIZING I/O LATENCY AND THROUGHPUT IN FIBRE CHANNEL CLIENT/SERVER/TARGET MASS STORAGE ARCHITECTURES
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09183970
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Filing Dt:
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10/30/1998
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Title:
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TRANSMISSION OF FCP RESPONSE IN THE SAME LOOP TENANCY AS THE FCP DATA WITH MINIMIZATION OF INTER-SEQUENCE GAP
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09191943
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Filing Dt:
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11/13/1998
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Title:
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DATA FAULT TOLERANCE SOFTWARE APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09199839
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Filing Dt:
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11/24/1998
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Title:
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METHOD AND APPARATUS FOR PERFORMING INTERNET NETWORK ADDRESS TRANSLATION
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09205142
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Filing Dt:
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12/03/1998
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Title:
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METHOD FOR SPECIFYING CONCURRENT EXECUTION OF A STRING OF I/O COMMAND BLOCKS IN A CHAIN STRUCTURE
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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09216067
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Filing Dt:
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12/17/1998
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Title:
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CONTROLLER AND ASSOCIATED METHODS FOR A LINC LINEAR POWER AMPLIFIER
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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09216091
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Filing Dt:
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12/17/1998
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Title:
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COMPENSATION SYSTEM AND METHODS FOR A LINEAR POWER AMPLIFIER
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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09216092
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Filing Dt:
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12/17/1998
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Title:
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SYSTEM AND METHODS FOR STIMULATING AND TRAINING A LINC POWER AMPLIFIER DURING NON-TRANSMISSION EVENTS
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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09224382
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Filing Dt:
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12/31/1998
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Title:
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METHOD AND APPARATUS FOR HIGH-SPEED NETWORK RULE PROCESSING
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09246572
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Filing Dt:
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02/08/1999
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Title:
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METHOD AND APPARATUS FOR HIGH-SPEED NETWORK RULE PROCESSING
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09250657
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Filing Dt:
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02/16/1999
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Title:
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RAID ARCHITECTURE WITH TWO-DRIVE FAULT TOLERANCE
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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09255406
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Filing Dt:
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02/22/1999
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Title:
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ERROR GENERATION CIRCUIT FOR TESTING A DIGITAL BUS
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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09261708
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Filing Dt:
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03/03/1999
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Title:
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COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09273401
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Filing Dt:
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03/22/1999
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Title:
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AUTOMATIC MULTI-MODE TERMINATION
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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09275727
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Filing Dt:
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03/24/1999
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Title:
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STORAGE AREA NETWORK ADMINISTRATION
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09280235
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Filing Dt:
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03/29/1999
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Title:
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METHOD AND APPARATUS FOR HIGH-SPEED NETWORK RULE PROCESSING
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09281715
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Filing Dt:
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03/30/1999
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Title:
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METHOD AND APPARATUS FOR CREATING FORMATTED FAT PARTITIONS WITH A HARD DRIVE HAVING A BIOS-LESS CONTROLLER
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09282919
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Filing Dt:
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03/31/1999
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Title:
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UNIVERSAL OPTION ROM BIOS INCLUDING MULTIPLE OPTION BIOS IMAGES FOR MULTICHIP SUPPORT AND BOOT SEQUENCE FOR USE THEREWITH
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09286211
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Filing Dt:
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04/05/1999
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Title:
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SYSTEM FOR EFFICIENT BROADBAND DATA PAYLOAD CONVERSION
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09299688
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Filing Dt:
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04/26/1999
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Title:
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ULTRA THIN AND FLEXIBLE SCSI CABLE AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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01/22/2002
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Application #:
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09300357
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Filing Dt:
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04/27/1999
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Title:
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METHOD AND APPARATUS FOR EFFICIENT SELECTION OF A BOUNDARY VALUE
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09300818
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Filing Dt:
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04/27/1999
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Title:
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METHOD AND SYSTEM FOR AUTOMATICALLY DETERMINING MAXIUMUM DATA THROUGHPUT OVER A BUS
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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09303765
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Filing Dt:
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04/29/1999
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Title:
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PACKET-SWITCH SYSTEM
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Patent #:
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Issue Dt:
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08/26/2003
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Application #:
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09305783
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Filing Dt:
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04/30/1999
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Title:
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CONTROL SYSTEM FOR HIGH SPEED RULE PROCESSORS
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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09313267
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Filing Dt:
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05/18/1999
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Title:
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INTERFACE BETWEEN A LINK LAYER DEVICE AND ONE OR MORE PHYSICAL LAYER DEVICES
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09321329
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Filing Dt:
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05/27/1999
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Title:
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FAST STACK SAVE AND RESTORE SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09324347
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Filing Dt:
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06/02/1999
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Title:
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METHOD FOR FLASHING A READ ONLY MEMORY (ROM) CHIP OF A HOST ADAPTER WITH UPDATED OPTION ROM BIOS CODE
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09340539
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Filing Dt:
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06/28/1999
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Title:
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MULTIPLE CHIP SINGLE IMAGE BIOS
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09343324
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Filing Dt:
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06/30/1999
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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A SCSI PHASE STATUS REGISTER FOR USE IN REDUCING INSTRUCTIONS EXECUTED BY AN ON-CHIP SEQUENCER IN ASSERTING A SCSI ACKOWLEDGE SIGNAL AND METHOD
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09343389
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Filing Dt:
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06/30/1999
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Title:
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PROGRAMMABLE LOGIC DATAPATH THAT MAY BE USED IN A FIELD PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09344291
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Filing Dt:
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06/30/1999
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Title:
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HARDWARE ATTENTION MANAGEMENT CIRCUIT AND METHOD FOR PARALLEL SCSI HOST ADAPTERS
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09346556
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Filing Dt:
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06/30/1999
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Title:
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PROGRAMMABLE LOGIC DATAPATH
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09350166
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Filing Dt:
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07/09/1999
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Title:
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EGRESS PORT SCHEDULING USING MEMORY EFFICIENT REQUEST STORAGE
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09350738
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Filing Dt:
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07/09/1999
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Title:
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TOPOLOGY-INDEPENDENT PRIORITY ARBITRATION FOR STACKABLE FRAME SWITCHES
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09351406
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Filing Dt:
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07/09/1999
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Title:
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LINK AGGREGATION IN ETHERNET FRAME SWITCHES
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09354426
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Filing Dt:
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07/16/1999
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Title:
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DUAL-DRIVE FAULT TOLERANT METHOD AND SYSTEM FOR ASSIGNING DATA CHUNKS TO COLUMN PARITY SETS
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09374995
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Filing Dt:
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08/16/1999
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Title:
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DATA, PATH AND FLOW INTEGRITY MONITOR
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09375909
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Filing Dt:
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08/17/1999
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Title:
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SELF-HEALING COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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09376773
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Filing Dt:
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08/17/1999
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Title:
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OBJECT ORIENTED FAULT TOLERANCE
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09389954
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Filing Dt:
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09/03/1999
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Title:
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HOST-MEMORY BASED RAID SYSTEM, DEVICE, AND METHOD
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09399981
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Filing Dt:
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09/20/1999
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Title:
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SUMS OF PRODUCTION DATAPATH
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09439440
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Filing Dt:
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11/15/1999
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Title:
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SELF-HEALING COMPUTER SYSTEM STORAGE
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09452618
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Filing Dt:
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12/01/1999
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Title:
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METHOD AND SYSTEM FOR NEGOTIATION OF THE HIGHEST COMMON LINK RATE AMONG NODES OF A FIBRE CHANNEL ARBITRATED LOOP
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09455301
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Filing Dt:
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12/06/1999
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Title:
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METHOD OF CONSERVING MEMORY RESOURCES BY DIRECTLY DECOMPRESSING A COMPRESSED BIOS ASSOCIATED WITH AN OPTION ROM BIOS CHIP TO AN ALLOCATED CONVENTIONAL MEMORY OF SYSTEM MEMORY
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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09459972
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Filing Dt:
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12/14/1999
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Title:
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POS-PHY INTERFACE FOR INTERCONNECTION OF PHYSICAL LAYER DEVICES AND LINK LAYER DEVICES
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09464127
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR PARITY CACHING BASED ON STRIPE LOCKING IN RAID DATA STORAGE
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09464250
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR DATA STORAGE ARCHIVE BIT UPDATE AFTER SNAPSHOT BACKUP
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09465057
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Filing Dt:
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12/16/1999
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Title:
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SYSTEM AND METHOD FOR ACCOMPLISHING DATA STORAGE MIGRATION BETWEEN RAID LEVELS
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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09465339
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Filing Dt:
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12/17/1999
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Title:
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F5-TO-F4 OAM ALARM NOTIFICATION AND CELL GENERATION IN MULTIPLE CONNECTION ATM SWITCHES
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09472153
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Filing Dt:
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12/27/1999
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Title:
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SCALEABLE BANDWIDTH INTERCONNECT FOR SIMULTANEOUS TRANSFER OF MIXED PLEISIOCHRONOUS DIGITAL HIERARCY (PDH) CLIENTS
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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09474945
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Filing Dt:
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12/30/1999
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Title:
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FIBRE CHANNEL INTERFACE CONTROLLER THAT PERFORMS NON-BLOCKING OUTPUT AND INPUT OF FIBRE CHANNEL DATA FRAMES AND ACKNOWLEDGEMENT FRAMES TO AND FROM A FIBRE CHANNEL
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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09475647
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Filing Dt:
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12/30/1999
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Title:
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COUNT/ADDRESS GENERATION CIRCUITRY
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09475907
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Filing Dt:
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12/30/1999
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Title:
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METHOD AND SYSTEM FOR EFFICIENT I/O OPERATION COMPLETION IN A FIBRE CHANNEL NODE
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09475908
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Filing Dt:
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12/30/1999
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Title:
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METHOD AND SYSTEM FOR EFFICIENT I/O OPERATION COMPLETION IN A FIBRE CHANNEL NODE USING AN APPLICATION SPECIFIC INTEGRATION CIRCUIT AND DETERMINING I/O OPERATION COMPLETION STATUS WITHIN AN INTERFACE CONTROLLER
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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09484248
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Filing Dt:
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01/18/2000
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Publication #:
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Pub Dt:
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12/13/2001
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Title:
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DIGITAL DELAY LINE WITH SYNCHRONOUS CONTROL
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09489917
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Filing Dt:
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01/24/2000
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Title:
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PAGE MEMORY MANAGEMENT IN NON TIME CRITICAL DATA BUFFERING APPLICATIONS
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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09494817
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Filing Dt:
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01/31/2000
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Title:
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METHOD AND SYSTEM INCREASING PERFORMANCE SUBSTITUTING FINITE STATE MACHINE CONTROL WITH HARDWARE-IMPLEMENTED DATA STRUCTURE MANIPULATION
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09517702
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Filing Dt:
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03/02/2000
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Title:
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USE OF ANTIPHASE SIGNALS FOR PREDISTORTION TRAINING WITHIN AN AMPLIFIER SYSTEM
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09523592
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Filing Dt:
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03/10/2000
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Title:
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MOS VARACTOR STRUCTURE WITH ENGINEERED VOLTAGE CONTROL RANGE
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09531869
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Filing Dt:
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03/20/2000
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Title:
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Host adapter having paged payload buffers for simultaneously transferring data between a computer bus and a peripheral bus
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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09538132
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Filing Dt:
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03/29/2000
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Title:
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METHOD AND APPARATUS FOR PROGRAMMABLE LEXICAL PACKET CLASSIFIER
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09548745
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Filing Dt:
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04/13/2000
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Title:
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High-speed, adaptive IDDQ measurement
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09549878
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Filing Dt:
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04/17/2000
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Title:
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SHORT AND LONG TERM FAIR SHUFFLING FOR CROSSBAR SWITCH ARBITER
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09552289
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Filing Dt:
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04/19/2000
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Title:
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INPUT/OUTPUT COMMUNICATION NETWORKS AND BOOTING PROTOCOLS
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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09557736
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Filing Dt:
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04/25/2000
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Title:
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METHOD AND APPARATUS FOR GRAMMATICAL PACKET CLASSIFIER
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09564105
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Filing Dt:
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05/03/2000
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Title:
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INTELLIGENT EXPANSION ROM SHARING BUS SUBSYSTEM
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Patent #:
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Issue Dt:
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10/07/2003
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Application #:
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09569593
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Filing Dt:
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05/09/2000
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Title:
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PARALLEL STRING PATTERN SEARCHES IN RESPECTIVE ONES OF ARRAY OF NANOCOMPUTERS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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09574305
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Filing Dt:
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05/19/2000
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Title:
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METHOD AND APPARATUS FOR INTERCONNECTION OF FLOW-CONTROLLED COMMUNICATION
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09579863
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Filing Dt:
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05/25/2000
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Title:
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Serial port for a hose adapter integrated circuit using a single terminal
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09580514
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Filing Dt:
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05/25/2000
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Title:
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SERIAL BUS FOR CONNECTING TWO INTEGRATED CIRCUITS WITH STORAGE FOR INPUT / OUTPUT SIGNALS
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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09580532
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Filing Dt:
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05/26/2000
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Title:
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METHOD AND APPARATUS FOR MANAGING DATA TRAFFIC BETWEEN A HIGH CAPACITY SOURCE AND MULTIPLE DESTINATIONS
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Patent #:
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Issue Dt:
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08/19/2003
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Application #:
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09587538
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Filing Dt:
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06/01/2000
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Title:
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TWO-DIMENSIONAL EXECUTION QUEUE FOR HOST ADAPTERS
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