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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:026198/0139   Pages: 43
Recorded: 04/26/2011
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 497
Page 4 of 5
Pages: 1 2 3 4 5
1
Patent #:
Issue Dt:
04/27/2004
Application #:
10000008
Filing Dt:
10/31/2001
Publication #:
Pub Dt:
05/01/2003
Title:
BACK-SIDE THROUGH-HOLE INTERCONNECTION OF A DIE TO A SUBSTRATE
2
Patent #:
Issue Dt:
06/01/2004
Application #:
10001075
Filing Dt:
10/31/2001
Publication #:
Pub Dt:
05/01/2003
Title:
METHOD AND SYSTEM FOR PRIVILEGE-LEVEL-ACCESS TO MEMORY WITHIN A COMPUTER
3
Patent #:
Issue Dt:
05/06/2003
Application #:
10002422
Filing Dt:
10/31/2001
Publication #:
Pub Dt:
05/01/2003
Title:
Method of making an emitter with variable density photoresist layer
4
Patent #:
Issue Dt:
06/15/2004
Application #:
10013643
Filing Dt:
11/13/2001
Publication #:
Pub Dt:
08/22/2002
Title:
NEW E-FIELD-MODULATED BISTABLE MOLECULAR MECHANICAL DEVICE
5
Patent #:
Issue Dt:
11/04/2003
Application #:
10016861
Filing Dt:
12/14/2001
Publication #:
Pub Dt:
06/19/2003
Title:
METHOD FOR CONTROLLING CRITICAL CIRCUITS IN THE DESIGN OF INTEGRATED CIRCUITS
6
Patent #:
Issue Dt:
06/07/2005
Application #:
10025306
Filing Dt:
12/19/2001
Publication #:
Pub Dt:
06/19/2003
Title:
WRITE-ONCE MEMORY DEVICE INCLUDING NON-VOLATILE MEMORY FOR TEMPORARY STORAGE
7
Patent #:
Issue Dt:
11/09/2004
Application #:
10033230
Filing Dt:
12/28/2001
Publication #:
Pub Dt:
07/03/2003
Title:
METHOD AND APPARATUS FOR EFFICIENTLY MANAGING BANDWIDTH OF A DEBUG DATA OUTPUT PORT OR BUFFER
8
Patent #:
Issue Dt:
08/31/2004
Application #:
10051078
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
07/31/2003
Title:
ALGORITHM-TO-HARDWARE SYSTEM AND METHOD FOR CREATING A DIGITAL CIRCUIT
9
Patent #:
Issue Dt:
02/03/2004
Application #:
10061552
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/31/2003
Title:
EXPEDITED MEMORY DUMPING AND RELOADING OF COMPUTER PROCESSORS
10
Patent #:
Issue Dt:
06/01/2004
Application #:
10062952
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/31/2003
Title:
NANO-SIZE IMPRINTING STAMP USING SPACER TECHNIQUE
11
Patent #:
Issue Dt:
03/09/2004
Application #:
10066149
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/31/2003
Title:
METHOD OF MANUFACTURING AN EMITTER
12
Patent #:
Issue Dt:
12/28/2004
Application #:
10066158
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/31/2003
Title:
EMITTER AND METHOD OF MAKING
13
Patent #:
Issue Dt:
02/08/2005
Application #:
10085866
Filing Dt:
02/27/2002
Publication #:
Pub Dt:
08/28/2003
Title:
EMISSION LAYER FORMED BY RAPID THERMAL FORMATION PROCESS
14
Patent #:
Issue Dt:
08/31/2004
Application #:
10098110
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD OF OPTIMIZING HIGH PERFORMANCE CMOS INTEGRATED CIRCUIT DESIGNS FOR POWER CONSUMPTION AND SPEED USING GLOBAL AND GREEDY OPTIMIZATIONS IN COMBINATION
15
Patent #:
Issue Dt:
02/03/2004
Application #:
10098111
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD OF OPTIMIZING HIGH PERFORMANCE CMOS INTEGRATED CIRCUIT DESIGNS FOR POWER CONSUMPTION AND SPEED
16
Patent #:
Issue Dt:
04/27/2004
Application #:
10098112
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD OF MODELING THE CROSSOVER CURRENT COMPONENT IN SUBMICRON CMOS INTEGRATED CIRCUITS DESIGNS
17
Patent #:
Issue Dt:
03/23/2004
Application #:
10098136
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHOD OF OPTIMIZING HIGH PERFORMANCE CMOS INTEGRATED CIRCUIT DESIGNS FOR POWER CONSUMPTION AND SPEED THROUGH GENETIC OPTIMIZATION
18
Patent #:
Issue Dt:
11/25/2003
Application #:
10099603
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
07/25/2002
Title:
METHOD AND APPARATUS FOR DETERMINING THE STRENGTHS AND WEAKNESSES OF PATHS IN AN INTEGRATED CIRCUIT
19
Patent #:
Issue Dt:
11/29/2005
Application #:
10114392
Filing Dt:
04/01/2002
Publication #:
Pub Dt:
10/02/2003
Title:
ELECTRICAL DEVICE AND METHOD OF MAKING
20
Patent #:
Issue Dt:
10/07/2003
Application #:
10114545
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHOD AND APPARATUS FOR IDENTIFYING SWITCHING RACE CONDITIONS IN A CIRCUIT DESIGN
21
Patent #:
Issue Dt:
12/16/2003
Application #:
10120944
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
PRESSURE SENSOR WITH TWO MEMBRANES FORMING A CAPACITOR
22
Patent #:
Issue Dt:
11/30/2004
Application #:
10121356
Filing Dt:
04/12/2002
Publication #:
Pub Dt:
10/16/2003
Title:
TEST METHOD FOR CHARACTERIZING CURRENTS ASSOCIATED WITH POWERED COMPONENTS IN AN ELECTRONIC SYSTEM
23
Patent #:
Issue Dt:
09/13/2005
Application #:
10126059
Filing Dt:
04/19/2002
Publication #:
Pub Dt:
10/23/2003
Title:
REDUCING POWER CONSUMPTION OF AN ELECTRONIC SYSTEM HAVING A COMMUNICATION DEVICE
24
Patent #:
Issue Dt:
09/07/2004
Application #:
10126426
Filing Dt:
04/18/2002
Publication #:
Pub Dt:
10/23/2003
Title:
EMITTER WITH FILLED ZEOLITE EMISSION LAYER
25
Patent #:
Issue Dt:
01/06/2004
Application #:
10133605
Filing Dt:
04/25/2002
Publication #:
Pub Dt:
11/13/2003
Title:
METHOD OF FABRICATING A SUB-LITHOGRAPHIC SIZED VIA
26
Patent #:
Issue Dt:
07/06/2004
Application #:
10133772
Filing Dt:
04/23/2002
Publication #:
Pub Dt:
10/30/2003
Title:
METHOD OF FABRICATING SUB-LITHOGRAPHIC SIZED LINE AND SPACE PATTERNS FOR NANO-IMPRINTING LITHOGRAPHY
27
Patent #:
Issue Dt:
09/30/2003
Application #:
10138455
Filing Dt:
05/03/2002
Title:
SEMICONDUCTOR AUTOMATION MARKUP LANGUAGE BASED GEM/SECS DEVELOPMENT APPLICATION
28
Patent #:
Issue Dt:
05/18/2004
Application #:
10145337
Filing Dt:
05/13/2002
Publication #:
Pub Dt:
11/13/2003
Title:
ADDRESS STRUCTURE AND METHODS FOR MULTIPLE ARRAYS OF DATA STORAGE MEMORY
29
Patent #:
Issue Dt:
12/06/2005
Application #:
10157496
Filing Dt:
05/30/2002
Publication #:
Pub Dt:
12/04/2003
Title:
DATA BUS WITH SEPARATE MATCHED LINE IMPEDANCES AND METHOD OF MATCHING LINE IMPEDANCES
30
Patent #:
Issue Dt:
11/02/2004
Application #:
10160802
Filing Dt:
05/31/2002
Publication #:
Pub Dt:
12/04/2003
Title:
DIODE-AND-FUSE MEMORY ELEMENTS FOR A WRITE-ONCE MEMORY COMPRISING AN ANISOTROPIC SEMICONDUCTOR SHEET
31
Patent #:
Issue Dt:
06/07/2005
Application #:
10172213
Filing Dt:
06/14/2002
Publication #:
Pub Dt:
12/18/2003
Title:
TRANSISTOR WITH MEANS FOR PROVIDING A NON-SILICON-BASED EMITTER
32
Patent #:
Issue Dt:
05/10/2005
Application #:
10174674
Filing Dt:
06/19/2002
Publication #:
Pub Dt:
12/25/2003
Title:
SYSTEMS AND METHODS FOR GENERATING AN ARTWORK REPRESENTATION ACCORDING TO A CIRCUIT FABRICATION PROCESS
33
Patent #:
Issue Dt:
03/30/2004
Application #:
10184496
Filing Dt:
06/28/2002
Publication #:
Pub Dt:
01/01/2004
Title:
SYSTEM AND METHOD FOR MEASURING FAULT COVERAGE IN AN INTEGRATED CIRCUIT
34
Patent #:
Issue Dt:
08/10/2004
Application #:
10197346
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
01/22/2004
Title:
LAYOUT DESIGN PROCESS AND SYSTEM FOR PROVIDING BYPASS CAPACITANCE AND COMPLIANT DENSITY IN AN INTEGRATED CIRCUIT
35
Patent #:
Issue Dt:
01/30/2007
Application #:
10197722
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
01/22/2004
Title:
EMITTER WITH DIELECTRIC LAYER HAVING IMPLANTED CONDUCTING CENTERS
36
Patent #:
Issue Dt:
07/26/2005
Application #:
10199668
Filing Dt:
07/19/2002
Publication #:
Pub Dt:
01/22/2004
Title:
VERIFYING PROXIMITY OF GROUND VIAS TO SIGNAL VIAS IN AN INTEGRATED CIRCUIT
37
Patent #:
Issue Dt:
06/07/2005
Application #:
10208163
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD OF FORMING A THROUGH-SUBSTRATE INTERCONNECT
38
Patent #:
Issue Dt:
04/06/2004
Application #:
10208363
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD OF FORMING A THROUGH-SUBSTRATE INTERCONNECT
39
Patent #:
Issue Dt:
12/30/2003
Application #:
10213960
Filing Dt:
08/07/2002
Title:
METHOD AND APPARATUS FOR SIMPLIFYING A CIRCUTT MODEL
40
Patent #:
Issue Dt:
01/10/2006
Application #:
10238570
Filing Dt:
09/09/2002
Publication #:
Pub Dt:
03/11/2004
Title:
METHOD AND APPARATUS FOR IMPROVING TESTABILITY OF I/O DRIVER/RECEIVERS
41
Patent #:
Issue Dt:
01/31/2006
Application #:
10241453
Filing Dt:
09/12/2002
Publication #:
Pub Dt:
04/22/2004
Title:
TECHNIQUE FOR TESTING PROCESSOR INTERRUPT LOGIC
42
Patent #:
Issue Dt:
05/03/2005
Application #:
10244862
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
03/18/2004
Title:
EMBOSSED MASK LITHOGRAPHY
43
Patent #:
Issue Dt:
03/15/2005
Application #:
10245897
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
03/18/2004
Title:
LARGE LINE CONDUCTIVE PADS FOR INTERCONNECTION OF STACKABLE CIRCUITRY
44
Patent #:
Issue Dt:
07/13/2004
Application #:
10256984
Filing Dt:
09/27/2002
Publication #:
Pub Dt:
04/01/2004
Title:
NANOMETER-SCALE SEMICONDUCTOR DEVICES AND METHOD OF MAKING
45
Patent #:
Issue Dt:
11/23/2004
Application #:
10262808
Filing Dt:
10/01/2002
Publication #:
Pub Dt:
04/01/2004
Title:
EMISSION DEVICE AND METHOD FOR FORMING
46
Patent #:
Issue Dt:
01/24/2006
Application #:
10263835
Filing Dt:
10/03/2002
Publication #:
Pub Dt:
04/08/2004
Title:
MECHANISM FOR RESOLVING AMBIGUOUS INVALIDATES IN A COMPUTER SYSTEM
47
Patent #:
Issue Dt:
11/23/2004
Application #:
10264599
Filing Dt:
10/03/2002
Publication #:
Pub Dt:
04/08/2004
Title:
EMITTER DEVICE WITH FOCUSING COLUMNS
48
Patent #:
Issue Dt:
09/12/2006
Application #:
10266719
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
SYSTEM AND METHOD FOR REDUCING WIRE DELAY OR CONGESTION DURING SYNTHESIS OF HARDWARE SOLVERS
49
Patent #:
Issue Dt:
08/22/2006
Application #:
10266826
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
METHOD OF USING CLOCK CYCLE-TIME IN DETERMINING LOOP SCHEDULES DURING CIRCUIT DESIGN
50
Patent #:
Issue Dt:
02/14/2006
Application #:
10266830
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
SYSTEM FOR AND METHOD OF CLOCK CYCLE-TIME ANALYSIS USING MODE-SLICING MECHANISM
51
Patent #:
Issue Dt:
11/15/2005
Application #:
10266831
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
METHOD FOR DESIGNING MINIMAL COST, TIMING CORRECT HARDWARE DURING CIRCUIT SYNTHESIS
52
Patent #:
Issue Dt:
10/04/2005
Application #:
10266856
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
METHODS AND APPARATUS FOR DIGITAL CIRCUIT DESIGN GENERATION
53
Patent #:
Issue Dt:
01/27/2004
Application #:
10280472
Filing Dt:
10/25/2002
Title:
CLOCK PULSE WIDTH CONTROL CIRCUIT
54
Patent #:
Issue Dt:
08/16/2005
Application #:
10282342
Filing Dt:
10/29/2002
Publication #:
Pub Dt:
04/29/2004
Title:
SYSTEM AND METHOD FOR DESIGNING DYNAMIC CIRCUITS IN A SOI PROCESS
55
Patent #:
Issue Dt:
09/14/2004
Application #:
10286060
Filing Dt:
10/31/2002
Publication #:
Pub Dt:
05/06/2004
Title:
METHOD OF FORMING A THROUGH-SUBSTRATE INTERCONNECT
56
Patent #:
Issue Dt:
01/24/2006
Application #:
10309967
Filing Dt:
12/04/2002
Publication #:
Pub Dt:
06/10/2004
Title:
SYSTEM FOR AND METHOD OF ASSESSING CHIP ACCEPTABILITY AND INCREASING YIELD
57
Patent #:
Issue Dt:
06/22/2004
Application #:
10320147
Filing Dt:
12/16/2002
Publication #:
Pub Dt:
05/08/2003
Title:
METHOD FOR FLASHING ESCD AND VARIABLES INTO A ROM
58
Patent #:
Issue Dt:
08/30/2005
Application #:
10326708
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
NANOWIRE FILAMENT
59
Patent #:
Issue Dt:
05/09/2006
Application #:
10328261
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
07/17/2003
Title:
ELECTRONIC DEVICE SEALED UNDER VACUUM CONTAINING A GETTER AND METHOD OF OPERATION
60
Patent #:
Issue Dt:
08/03/2004
Application #:
10341651
Filing Dt:
01/13/2003
Title:
CO-DEPOSITED FILMS WITH NANO-COLUMNAR STRUCTURES AND FORMATION PROCESS
61
Patent #:
Issue Dt:
11/22/2005
Application #:
10345637
Filing Dt:
01/14/2003
Publication #:
Pub Dt:
07/15/2004
Title:
THERMAL CHARACTERIZATION CHIP
62
Patent #:
Issue Dt:
10/18/2005
Application #:
10346046
Filing Dt:
01/15/2003
Publication #:
Pub Dt:
07/15/2004
Title:
LIGHT IMAGE SENSOR TEST OF OPTO-ELECTRONICS FOR IN-CIRCUIT TEST
63
Patent #:
Issue Dt:
11/30/2004
Application #:
10347723
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
07/22/2004
Title:
LOW POWER LOGIC GATE
64
Patent #:
Issue Dt:
04/17/2007
Application #:
10353632
Filing Dt:
01/29/2003
Publication #:
Pub Dt:
07/29/2004
Title:
MICRO-FABRICATED DEVICE WITH THERMOELECTRIC DEVICE AND METHOD OF MAKING
65
Patent #:
Issue Dt:
04/20/2004
Application #:
10365946
Filing Dt:
02/12/2003
Publication #:
Pub Dt:
07/03/2003
Title:
FABRICATING A MOLECULAR ELECTRONIC DEVICE HAVING A PROTECTIVE BARRIER LAYER
66
Patent #:
Issue Dt:
11/22/2005
Application #:
10366134
Filing Dt:
02/13/2003
Title:
DIFFERENTIAL LINE PAIR IMPEDANCE VERIFICATION TOOL
67
Patent #:
Issue Dt:
11/29/2005
Application #:
10366135
Filing Dt:
02/13/2003
Title:
SIGNAL LINE IMPEDANCE ADJUSTMENT TOOL
68
Patent #:
Issue Dt:
05/03/2005
Application #:
10366205
Filing Dt:
02/13/2003
Title:
DIFFERENTIAL VIA PAIR IMPEDANCE VERIFICATION TOOL
69
Patent #:
Issue Dt:
01/03/2006
Application #:
10366208
Filing Dt:
02/13/2003
Title:
Differential line pair impedance adjustment tool
70
Patent #:
Issue Dt:
01/03/2006
Application #:
10366489
Filing Dt:
02/13/2003
Title:
DIFFERENTIAL VIA PAIR IMPEDANCE ADJUSTMENT TOOL
71
Patent #:
Issue Dt:
08/30/2005
Application #:
10368778
Filing Dt:
02/19/2003
Publication #:
Pub Dt:
08/19/2004
Title:
SYSTEM AND METHOD FOR EVALUATING SIGNAL TRACE DISCONTINUITIES IN A PACKAGE DESIGN
72
Patent #:
Issue Dt:
06/14/2005
Application #:
10368988
Filing Dt:
02/19/2003
Publication #:
Pub Dt:
08/19/2004
Title:
SYSTEM AND METHOD FOR EVALUATING VIAS PER PAD IN A PACKAGE DESIGN
73
Patent #:
Issue Dt:
01/11/2005
Application #:
10369365
Filing Dt:
02/18/2003
Publication #:
Pub Dt:
08/19/2004
Title:
DIELECTRIC EMITTER WITH PN JUNCTION
74
Patent #:
Issue Dt:
11/29/2005
Application #:
10370537
Filing Dt:
02/20/2003
Publication #:
Pub Dt:
08/26/2004
Title:
VARIABLE IMPEDANCE TEST PROBE
75
Patent #:
Issue Dt:
05/11/2004
Application #:
10383127
Filing Dt:
03/06/2003
Title:
METHOD AND SYSTEM FOR PERFORMING SAMPLING ON THE FLY USING MINIMUM CYCLE DELAY SYNCHRONIZATION
76
Patent #:
Issue Dt:
10/11/2005
Application #:
10387245
Filing Dt:
03/12/2003
Publication #:
Pub Dt:
10/30/2003
Title:
MICRO-MIRROR DEVICE INCLUDING DIELECTROPHORETIC LIQUID
77
Patent #:
Issue Dt:
01/31/2006
Application #:
10387480
Filing Dt:
03/14/2003
Publication #:
Pub Dt:
09/16/2004
Title:
HETERO LASER AND LIGHT-EMITTING SOURCE OF POLARIZED RADIATION
78
Patent #:
Issue Dt:
10/19/2004
Application #:
10389556
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/11/2003
Title:
TUNNELING EMITTERS AND METHOD OF MAKING
79
Patent #:
Issue Dt:
12/13/2005
Application #:
10393191
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
09/23/2004
Title:
ISOLATED CHANNEL IN AN INTEGRATED CIRCUIT
80
Patent #:
Issue Dt:
12/28/2004
Application #:
10402642
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
10/02/2003
Title:
PASSIVATION LAYER FOR MOLECULAR ELECTRONIC DEVICE FABRICATION
81
Patent #:
Issue Dt:
01/24/2006
Application #:
10412918
Filing Dt:
04/14/2003
Publication #:
Pub Dt:
10/14/2004
Title:
METHOD OF MAKING A GETTER STRUCTURE
82
Patent #:
Issue Dt:
05/16/2006
Application #:
10413048
Filing Dt:
04/14/2003
Publication #:
Pub Dt:
10/14/2004
Title:
VACUUM DEVICE HAVING A GETTER
83
Patent #:
Issue Dt:
07/29/2008
Application #:
10420565
Filing Dt:
04/21/2003
Publication #:
Pub Dt:
10/21/2004
Title:
PRINTING ELECTRONIC AND OPTO-ELECTRONIC CIRCUITS
84
Patent #:
Issue Dt:
09/07/2004
Application #:
10425290
Filing Dt:
04/28/2003
Title:
METHOD AND SYSTEM FOR SENSING THE STATUS OF A ZIF SOCKET LEVER
85
Patent #:
Issue Dt:
03/30/2004
Application #:
10426629
Filing Dt:
05/01/2003
Publication #:
Pub Dt:
11/06/2003
Title:
METHOD OF RESOLVING MIN-TIME VIOLATIONS IN AN INTEGRATED CIRCUIT
86
Patent #:
Issue Dt:
08/09/2005
Application #:
10430125
Filing Dt:
05/05/2003
Publication #:
Pub Dt:
06/09/2005
Title:
IMPRINT LITHOGRAPHY FOR SUPERCONDUCTOR DEVICES
87
Patent #:
Issue Dt:
11/08/2005
Application #:
10431383
Filing Dt:
05/08/2003
Publication #:
Pub Dt:
10/23/2003
Title:
METHOD OF SIMULTANEOUSLY DISPLAYING SCHEMATIC AND TIMING DATA
88
Patent #:
Issue Dt:
04/25/2006
Application #:
10444330
Filing Dt:
05/23/2003
Title:
CIRCUIT BOARD ORIENTATION WITH DIFFERENT WIDTH PORTIONS
89
Patent #:
Issue Dt:
06/07/2005
Application #:
10446097
Filing Dt:
05/27/2003
Title:
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90
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Issue Dt:
08/30/2005
Application #:
10447693
Filing Dt:
05/28/2003
Publication #:
Pub Dt:
12/02/2004
Title:
TIP AND TIP ASSEMBLY FOR A SIGNAL PROBE
91
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Issue Dt:
05/26/2009
Application #:
10455862
Filing Dt:
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Publication #:
Pub Dt:
12/09/2004
Title:
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92
Patent #:
Issue Dt:
10/12/2004
Application #:
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Filing Dt:
06/12/2003
Title:
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93
Patent #:
Issue Dt:
07/26/2005
Application #:
10603434
Filing Dt:
06/24/2003
Publication #:
Pub Dt:
01/13/2005
Title:
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94
Patent #:
Issue Dt:
05/10/2005
Application #:
10603445
Filing Dt:
06/24/2003
Publication #:
Pub Dt:
12/30/2004
Title:
ELECTRONIC DEVICE WITH APERTURE AND WIDE LENS FOR SMALL EMISSION SPOT SIZE
95
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Issue Dt:
08/23/2005
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10611825
Filing Dt:
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Publication #:
Pub Dt:
01/06/2005
Title:
ADJUSTABLE SOCKET
96
Patent #:
Issue Dt:
05/03/2005
Application #:
10618172
Filing Dt:
07/10/2003
Publication #:
Pub Dt:
01/22/2004
Title:
ELECTRIC-FIELD ACTUATED CHROMOGENIC MATERIALS BASED ON MOLECULES WITH A ROTATING MIDDLE SEGMENT FOR APPLICATIONS IN PHOTONIC SWITCHING
97
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Issue Dt:
02/28/2006
Application #:
10620858
Filing Dt:
07/15/2003
Publication #:
Pub Dt:
01/20/2005
Title:
ARRAY OF NANOSCOPIC MOSFET TRANSISTORS AND FABRICATION METHODS
98
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Issue Dt:
11/16/2004
Application #:
10622909
Filing Dt:
07/21/2003
Publication #:
Pub Dt:
03/11/2004
Title:
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99
Patent #:
Issue Dt:
04/05/2005
Application #:
10627564
Filing Dt:
07/25/2003
Publication #:
Pub Dt:
01/29/2004
Title:
SYSTEM AND METHOD FOR MEASURING FAULT COVERAGE IN AN INTEGRATED CIRCUIT
100
Patent #:
Issue Dt:
01/29/2008
Application #:
10639853
Filing Dt:
08/13/2003
Title:
METHOD AND SYSTEM FOR SIZING A LOAD PLATE
Assignors
1
Exec Dt:
10/19/2010
2
Exec Dt:
10/19/2010
Assignee
1
416 MAETAN-DONG
YEONGTONG-GU, SUWON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
ROBERT N. CROUSE
MYERS BIGEL SIBLEY & SAJOVEC
P.O. BOX 37428
RALEIGH, NC 27627

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