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Reel/Frame:047013/0143   Pages: 14
Recorded: 09/05/2018
Attorney Dkt #:2015-0414/24061.3157US03
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE 1ST ASSIGNOR'S NAME AND EXECUTION DATE AND 2ND ASSIGNOR'S NAME AND EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 046766 FRAME: 0596. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 1
1
Patent #:
Issue Dt:
12/01/2020
Application #:
16118744
Filing Dt:
08/31/2018
Publication #:
Pub Dt:
12/27/2018
Title:
Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer
Assignors
1
Exec Dt:
07/04/2017
2
Exec Dt:
02/24/2017
3
Exec Dt:
09/04/2015
4
Exec Dt:
09/04/2015
5
Exec Dt:
09/04/2015
Assignee
1
NO. 8, LI-HSIN RD. 6
SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondence name and address
HAYNES AND BOONE, LLP IP SECTION
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219

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