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Reel/Frame:019800/0147   Pages: 10
Recorded: 09/07/2007
Attorney Dkt #:HLG
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 27
1
Patent #:
7244668
Issue Dt:
07/17/2007
Application #:
11026954
Filing Dt:
12/30/2004
Publication #:
US20050272262
Pub Dt:
12/08/2005
Title:
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
2
Patent #:
NONE
Issue Dt:
Application #:
11027517
Filing Dt:
12/30/2004
Publication #:
US20050287796
Pub Dt:
12/29/2005
Title:
Methods of fabricating metal lines in semiconductor devices
3
Patent #:
NONE
Issue Dt:
Application #:
11027538
Filing Dt:
12/30/2004
Publication #:
US20050268939
Pub Dt:
12/08/2005
Title:
Wet cleaning apparatus and methods
4
Patent #:
7223675
Issue Dt:
05/29/2007
Application #:
11126900
Filing Dt:
05/10/2005
Publication #:
US20050255681
Pub Dt:
11/17/2005
Title:
METHOD OF FORMING PRE-METAL DIELECTRIC LAYER
5
Patent #:
NONE
Issue Dt:
Application #:
11172204
Filing Dt:
06/29/2005
Publication #:
US20060003101
Pub Dt:
01/05/2006
Title:
Method of pre-cleaning wafer for gate oxide formation
6
Patent #:
7468319
Issue Dt:
12/23/2008
Application #:
11179455
Filing Dt:
07/11/2005
Publication #:
US20060019492
Pub Dt:
01/26/2006
Title:
METHOD FOR PREVENTING A METAL CORROSION IN A SEMICONDUCTOR DEVICE
7
Patent #:
7402500
Issue Dt:
07/22/2008
Application #:
11181607
Filing Dt:
07/13/2005
Publication #:
US20060014362
Pub Dt:
01/19/2006
Title:
METHODS OF FORMING SHALLOW TRENCH ISOLATION STRUCTURES IN SEMICONDUCTOR DEVICES
8
Patent #:
7425511
Issue Dt:
09/16/2008
Application #:
11194265
Filing Dt:
08/01/2005
Publication #:
US20060024913
Pub Dt:
02/02/2006
Title:
METHODS FOR MANUFACTURING SHALLOW TRENCH ISOLATION LAYERS OF SEMICONDUCTOR DEVICES
9
Patent #:
NONE
Issue Dt:
Application #:
11196641
Filing Dt:
08/02/2005
Publication #:
US20060023506
Pub Dt:
02/02/2006
Title:
Non-volatile memory device and method for programming/erasing the same
10
Patent #:
NONE
Issue Dt:
Application #:
11216716
Filing Dt:
08/31/2005
Publication #:
US20060046371
Pub Dt:
03/02/2006
Title:
Methods of forming gate electrodes in semiconductor devices
11
Patent #:
NONE
Issue Dt:
Application #:
11231441
Filing Dt:
09/19/2005
Publication #:
US20060063308
Pub Dt:
03/23/2006
Title:
Method for cleaning semiconductor device having dual damascene structure
12
Patent #:
7372122
Issue Dt:
05/13/2008
Application #:
11241044
Filing Dt:
09/30/2005
Publication #:
US20060091488
Pub Dt:
05/04/2006
Title:
IMAGE SENSOR CHIP PACKAGE AND METHOD OF FABRICATING THE SAME
13
Patent #:
NONE
Issue Dt:
Application #:
11254296
Filing Dt:
10/19/2005
Publication #:
US20070085988
Pub Dt:
04/19/2007
Title:
Wafer edge exposure method in semiconductor photolithographic processes, and orientation flatness detecting system provided with a WEE apparatus
14
Patent #:
NONE
Issue Dt:
Application #:
11293618
Filing Dt:
12/02/2005
Publication #:
US20060137713
Pub Dt:
06/29/2006
Title:
Apparatus for cleaning wafer and method of pre-cleaning wafer for gate oxide formation
15
Patent #:
7348189
Issue Dt:
03/25/2008
Application #:
11293660
Filing Dt:
12/02/2005
Publication #:
US20060148138
Pub Dt:
07/06/2006
Title:
FIELD TRANSISTOR MONITORING PATTERN FOR SHALLOW TRENCH ISOLATION DEFECTS IN SEMICONDUCTOR DEVICE
16
Patent #:
NONE
Issue Dt:
Application #:
11301819
Filing Dt:
12/12/2005
Publication #:
US20070105295
Pub Dt:
05/10/2007
Title:
Method for forming lightly-doped-drain metal-oxide-semiconductor (LDD MOS) device
17
Patent #:
NONE
Issue Dt:
Application #:
11303467
Filing Dt:
12/15/2005
Publication #:
US20060160301
Pub Dt:
07/20/2006
Title:
Method for fabricating a metal-insulator-metal capacitor
18
Patent #:
NONE
Issue Dt:
Application #:
11304276
Filing Dt:
12/13/2005
Publication #:
US20060128149
Pub Dt:
06/15/2006
Title:
Method for forming a metal wiring in a semiconductor device
19
Patent #:
7348577
Issue Dt:
03/25/2008
Application #:
11304277
Filing Dt:
12/13/2005
Publication #:
US20060124868
Pub Dt:
06/15/2006
Title:
METHOD FOR CONTROLLING A VAPORIZER OF ION IMPLANTATION EQUIPMENT DURING INDIUM IMPLANTATION PROCESS
20
Patent #:
7282758
Issue Dt:
10/16/2007
Application #:
11317363
Filing Dt:
12/23/2005
Publication #:
US20060138525
Pub Dt:
06/29/2006
Title:
METHOD OF FABRICATING A FLOATING GATE FOR A NONVOLATILE MEMORY
21
Patent #:
7632755
Issue Dt:
12/15/2009
Application #:
11317365
Filing Dt:
12/23/2005
Publication #:
US20060138666
Pub Dt:
06/29/2006
Title:
METHOD FOR FORMING AN INTERMETAL DIELECTRIC LAYER USING LOW-K DIELECTRIC MATERIAL AND A SEMICONDUCTOR DEVICE MANUFACTURED THEREBY
22
Patent #:
7557038
Issue Dt:
07/07/2009
Application #:
11318095
Filing Dt:
12/22/2005
Publication #:
US20060160356
Pub Dt:
07/20/2006
Title:
METHOD FOR FABRICATING SELF-ALIGNED CONTACT HOLE
23
Patent #:
7169672
Issue Dt:
01/30/2007
Application #:
11323821
Filing Dt:
12/30/2005
Title:
SPLIT GATE TYPE NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
24
Patent #:
7569429
Issue Dt:
08/04/2009
Application #:
11324006
Filing Dt:
12/29/2005
Publication #:
US20060145292
Pub Dt:
07/06/2006
Title:
ANTIFUSE HAVING UNIFORM DIELECTRIC THICKNESS AND METHOD FOR FABRICATING THE SAME
25
Patent #:
7306958
Issue Dt:
12/11/2007
Application #:
11324168
Filing Dt:
12/29/2005
Publication #:
US20060145152
Pub Dt:
07/06/2006
Title:
COMPOSITE PATTERN FOR MONITORING VARIOUS DEFECTS OF SEMICONDUCTOR DEVICE
26
Patent #:
NONE
Issue Dt:
Application #:
11324170
Filing Dt:
12/29/2005
Publication #:
US20060148204
Pub Dt:
07/06/2006
Title:
Monitoring pattern for optimization of chemical mechanical polishing process of trench isolation layer and related methods
27
Patent #:
NONE
Issue Dt:
Application #:
11324171
Filing Dt:
12/29/2005
Publication #:
US20060145184
Pub Dt:
07/06/2006
Title:
Reverse MOS (RMOS) transistor, and methods of making and using the same
Assignor
1
DONGBUANAM SEMICONDUCTOR INC.
Exec Dt:
03/28/2006
Assignee
1
DONGBU ELECTRONICS CO., LTD.
891-10 DAECHI-DONG, KANGNAM-KU
SEOUL, KOREA, REPUBLIC OF
Correspondence name and address
ANDREW D. FORTNEY
401 W FALLBROOK AVE STE 204
FRESNO, CA 93711

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