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Patent Assignment Details
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Reel/Frame:039436/0152   Pages: 9
Recorded: 08/15/2016
Attorney Dkt #:765-0109
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4
1
Patent #:
Issue Dt:
04/10/2007
Application #:
11129996
Filing Dt:
05/16/2005
Publication #:
Pub Dt:
11/17/2005
Title:
DUTY-CYCLE CORRECTION CIRCUIT
2
Patent #:
Issue Dt:
04/29/2008
Application #:
11239200
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
07/27/2006
Title:
SYSTEM AND METHOD FOR JITTER CONTROL
3
Patent #:
Issue Dt:
11/11/2008
Application #:
11732901
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/25/2007
Title:
SWITCHED-CAPACITOR RESET ARCHITECTURE FOR OPAMP
4
Patent #:
Issue Dt:
05/01/2012
Application #:
11998695
Filing Dt:
11/30/2007
Publication #:
Pub Dt:
06/05/2008
Title:
SERIALIZER DESERIALIZER CIRCUITS
Assignor
1
Exec Dt:
08/05/2016
Assignee
1
1050 ENTERPRISE WAY, SUITE 700
SUNNYVALE, CALIFORNIA 94089
Correspondence name and address
ALEX NEUDECK
PO BOX 1792
FRASER, CO 80442

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