skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:035201/0159   Pages: 226
Recorded: 03/13/2015
Attorney Dkt #:3483.276
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 1788
Page 15 of 18
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
1
Patent #:
Issue Dt:
10/20/2009
Application #:
11501449
Filing Dt:
08/08/2006
Publication #:
Pub Dt:
02/08/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
2
Patent #:
Issue Dt:
04/28/2009
Application #:
11502957
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
02/15/2007
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR BOOSTING WORD LINE
3
Patent #:
Issue Dt:
03/17/2009
Application #:
11504254
Filing Dt:
08/14/2006
Title:
METHOD AND ARCHITECTURE FOR FAST FLASH MEMORY PROGRAMMING
4
Patent #:
Issue Dt:
03/12/2013
Application #:
11510061
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
03/01/2007
Title:
STORAGE DEVICE, CONTROL METHOD OF STORAGE DEVICE, AND CONTROL METHOD OF STORAGE CONTROL DEVICE
5
Patent #:
Issue Dt:
04/27/2010
Application #:
11510077
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
03/01/2007
Title:
STORAGE DEVICE AND CONTROL METHOD OF STORAGE DEVICE
6
Patent #:
Issue Dt:
05/08/2007
Application #:
11511763
Filing Dt:
08/29/2006
Publication #:
Pub Dt:
12/28/2006
Title:
FLASH MEMORY CELL AND METHODS FOR PROGRAMMING AND ERASING
7
Patent #:
Issue Dt:
09/15/2009
Application #:
11513693
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
8
Patent #:
Issue Dt:
08/11/2009
Application #:
11514391
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
03/01/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
9
Patent #:
Issue Dt:
07/31/2012
Application #:
11521204
Filing Dt:
09/14/2006
Publication #:
Pub Dt:
05/29/2008
Title:
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE WITH IMPROVED SCALEABILITY
10
Patent #:
NONE
Issue Dt:
Application #:
11529166
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
04/03/2008
Title:
Flash memory cell structure Utilizing Layers Having Differing Silicon Concentrations
11
Patent #:
Issue Dt:
02/01/2011
Application #:
11529790
Filing Dt:
09/29/2006
Publication #:
Pub Dt:
04/05/2007
Title:
STORAGE DEVICE AND CONTROL METHOD THEREOF
12
Patent #:
NONE
Issue Dt:
Application #:
11529805
Filing Dt:
09/29/2006
Publication #:
Pub Dt:
04/05/2007
Title:
Semiconductor device and fabrication method therefor
13
Patent #:
Issue Dt:
08/31/2010
Application #:
11530145
Filing Dt:
09/08/2006
Publication #:
Pub Dt:
03/13/2008
Title:
DUAL STORAGE NODE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
14
Patent #:
Issue Dt:
12/15/2009
Application #:
11538403
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
04/17/2008
Title:
METHODS FOR CONTROLLING THE PROFILE OF A TRENCH OF A SEMICONDUCTOR STRUCTURE
15
Patent #:
Issue Dt:
05/06/2008
Application #:
11538404
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
04/03/2008
Title:
DUAL BIT FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
16
Patent #:
Issue Dt:
06/03/2008
Application #:
11538408
Filing Dt:
10/03/2006
Publication #:
Pub Dt:
04/10/2008
Title:
METHOD AND APPARATUS FOR SECTOR ERASE OPERATION IN A FLASH MEMORY ARRAY
17
Patent #:
Issue Dt:
03/27/2012
Application #:
11539984
Filing Dt:
10/10/2006
Publication #:
Pub Dt:
04/10/2008
Title:
MEMORY CELL SYSTEM WITH CHARGE TRAP
18
Patent #:
Issue Dt:
03/23/2010
Application #:
11540034
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR DEVICE, FABRICATION METHOD THEREFOR, AND FILM FABRICATION METHOD
19
Patent #:
NONE
Issue Dt:
Application #:
11546688
Filing Dt:
10/12/2006
Publication #:
Pub Dt:
02/08/2007
Title:
Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to improve charge loss and contact resistance in multi-bit memory devices
20
Patent #:
Issue Dt:
07/07/2009
Application #:
11549551
Filing Dt:
10/13/2006
Publication #:
Pub Dt:
04/17/2008
Title:
VIRTUAL MEMORY CARD CONTROLLER
21
Patent #:
Issue Dt:
11/09/2010
Application #:
11551390
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
04/24/2008
Title:
PLANARIZATION METHOD USING HYBRID OXIDE AND POLYSILICON CMP
22
Patent #:
Issue Dt:
10/22/2013
Application #:
11551532
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
04/24/2008
Title:
CONTACTS FOR SEMICONDUCTOR DEVICES
23
Patent #:
NONE
Issue Dt:
Application #:
11551535
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
04/24/2008
Title:
METHOD FOR MANUFACTURING A MEMORY DEVICE WITH ISOLATED MEMORY CELL CHARGE TRAPPING STRUCTURE
24
Patent #:
Issue Dt:
03/02/2010
Application #:
11567257
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
P-CHANNEL NAND IN ISOLATED N-WELL
25
Patent #:
NONE
Issue Dt:
Application #:
11582442
Filing Dt:
10/18/2006
Publication #:
Pub Dt:
04/24/2008
Title:
Conformal liner for gap-filling
26
Patent #:
Issue Dt:
01/12/2010
Application #:
11590378
Filing Dt:
10/31/2006
Publication #:
Pub Dt:
05/15/2008
Title:
METHOD OF SELECTING OPERATING CHARACTERISTICS OF A RESISTIVE MEMORY DEVICE
27
Patent #:
Issue Dt:
09/27/2011
Application #:
11593086
Filing Dt:
11/06/2006
Publication #:
Pub Dt:
05/08/2008
Title:
CU ANNEALING FOR IMPROVED DATA RETENTION IN FLASH MEMORY DEVICES
28
Patent #:
Issue Dt:
03/10/2009
Application #:
11595639
Filing Dt:
11/10/2006
Publication #:
Pub Dt:
03/15/2007
Title:
SONOS MEMORY WITH INVERSION BIT-LINES
29
Patent #:
Issue Dt:
04/09/2013
Application #:
11608032
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/12/2008
Title:
MEMORY DEVICE PROTECTION LAYER
30
Patent #:
Issue Dt:
03/08/2011
Application #:
11608388
Filing Dt:
12/08/2006
Publication #:
Pub Dt:
06/12/2008
Title:
PREVENTION OF OXIDATION OF CARRIER IONS TO IMPROVE MEMORY RETENTION PROPERTIES OF POLYMER MEMORY CELL
31
Patent #:
Issue Dt:
10/09/2012
Application #:
11611856
Filing Dt:
12/16/2006
Publication #:
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH METAL AND SEMI-CONDUCTING GATE
32
Patent #:
NONE
Issue Dt:
Application #:
11611860
Filing Dt:
12/16/2006
Publication #:
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH IMPLANT OXIDE
33
Patent #:
Issue Dt:
07/06/2010
Application #:
11612265
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
STRAPPING CONTACT FOR CHARGE PROTECTION
34
Patent #:
Issue Dt:
05/24/2011
Application #:
11612413
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
06/19/2008
Title:
DUAL-BIT MEMORY DEVICE HAVING TRENCH ISOLATION MATERIAL DISPOSED NEAR BIT LINE CONTACT AREAS
35
Patent #:
Issue Dt:
08/17/2010
Application #:
11612863
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS
36
Patent #:
NONE
Issue Dt:
Application #:
11612874
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
PORTABLE DIGITAL RIGHTS MANAGEMENT (DRM)
37
Patent #:
Issue Dt:
04/06/2010
Application #:
11612992
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHOD AND APPARATUS FOR MULTI-CHIP PACKAGING
38
Patent #:
Issue Dt:
11/17/2009
Application #:
11613379
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR ADAPTIVE MEMORY CELL OVERERASE COMPENSATION
39
Patent #:
Issue Dt:
12/01/2009
Application #:
11613383
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
40
Patent #:
Issue Dt:
08/03/2010
Application #:
11613513
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR MEMORY COMPRISING DUAL CHARGE STORAGE NODES AND METHODS FOR ITS FABRICATION
41
Patent #:
Issue Dt:
01/06/2009
Application #:
11613832
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
USE OF PERIODIC REFRESH IN MEDIUM RETENTION MEMORY ARRAYS
42
Patent #:
Issue Dt:
02/23/2010
Application #:
11614048
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHODS FOR FABRICATING A SPLIT CHARGE STORAGE NODE SEMICONDUCTOR MEMORY
43
Patent #:
Issue Dt:
12/22/2009
Application #:
11614050
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHODS FOR FABRICATING A MEMORY DEVICE INCLUDING A DUAL BIT MEMORY CELL
44
Patent #:
Issue Dt:
05/21/2013
Application #:
11614053
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
45
Patent #:
Issue Dt:
09/04/2012
Application #:
11614306
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SOLID-STATE MEMORY-BASED GENERATION AND HANDLING OF SECURITY AUTHENTICATION TOKENS
46
Patent #:
Issue Dt:
06/29/2010
Application #:
11614767
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLOATING GATE PROCESS METHODOLOGY
47
Patent #:
Issue Dt:
04/06/2010
Application #:
11614770
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
COPPER PROCESS METHODOLOGY
48
Patent #:
Issue Dt:
01/04/2011
Application #:
11614801
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY
49
Patent #:
Issue Dt:
07/22/2014
Application #:
11614815
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY SYSTEM WITH FIN FET TECHNOLOGY
50
Patent #:
NONE
Issue Dt:
Application #:
11614839
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY SYSTEM WITH SELECT GATE ERASE
51
Patent #:
Issue Dt:
12/09/2008
Application #:
11615280
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
NEGATIVE WORDLINE BIAS FOR REDUCTION OF LEAKAGE CURRENT DURING FLASH MEMORY OPERATION
52
Patent #:
Issue Dt:
03/30/2010
Application #:
11615365
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD OF FORMING SPACED-APART CHARGE TRAPPING STACKS
53
Patent #:
NONE
Issue Dt:
Application #:
11615425
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
54
Patent #:
Issue Dt:
07/16/2013
Application #:
11615489
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
FLASH MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
55
Patent #:
Issue Dt:
11/24/2009
Application #:
11615563
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY DEVICE HAVING IMPLANTED OXIDE TO BLOCK ELECTRON DRIFT, AND METHOD OF MANUFACTURING THE SAME
56
Patent #:
Issue Dt:
02/07/2012
Application #:
11615583
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
INTEGRATED CIRCUIT WAFER SYSTEM WITH CONTROL STRATEGY
57
Patent #:
Issue Dt:
06/10/2008
Application #:
11615710
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
REPETITIVE ERASE VERIFY TECHNIQUE FOR FLASH MEMORY DEVICES
58
Patent #:
Issue Dt:
06/23/2009
Application #:
11616045
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
05/10/2007
Title:
SWITCHABLE MEMORY DIODE - A NEW MEMORY DEVICE
59
Patent #:
Issue Dt:
03/02/2010
Application #:
11616085
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY DEVICE ETCH METHODS
60
Patent #:
NONE
Issue Dt:
Application #:
11616385
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
PERSONAL DIGITAL RIGHTS MANAGEMENT AGENT-SERVER
61
Patent #:
Issue Dt:
02/01/2011
Application #:
11616544
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE
62
Patent #:
Issue Dt:
04/13/2010
Application #:
11616563
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD FOR IMPROVED PLANARIZATION IN SEMICONDUCTOR DEVICES
63
Patent #:
Issue Dt:
12/13/2011
Application #:
11616718
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
DUAL-BIT MEMORY DEVICE HAVING ISOLATION MATERIAL DISPOSED UNDERNEATH A BIT LINE SHARED BY ADJACENT DUAL-BIT MEMORY CELLS
64
Patent #:
Issue Dt:
07/24/2012
Application #:
11625150
Filing Dt:
01/19/2007
Publication #:
Pub Dt:
07/24/2008
Title:
FULLY ASSOCIATIVE BANKING FOR MEMORY
65
Patent #:
Issue Dt:
04/08/2008
Application #:
11633791
Filing Dt:
12/05/2006
Title:
METHOD OF PROGRAMMING, ERASING AND READING MEMORY CELLS IN A RESISTIVE MEMORY ARRAY
66
Patent #:
Issue Dt:
02/22/2011
Application #:
11633800
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHODS OF PROGRAMMING AND ERASING RESISTIVE MEMORY DEVICES
67
Patent #:
Issue Dt:
01/10/2012
Application #:
11633844
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
GETTERING/STOP LAYER FOR PREVENTION OF REDUCTION OF INSULATING OXIDE IN METAL-INSULATOR-METAL DEVICE
68
Patent #:
Issue Dt:
07/21/2009
Application #:
11633845
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD OF PROGRAMMING MEMORY DEVICE
69
Patent #:
Issue Dt:
01/03/2012
Application #:
11633929
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE
70
Patent #:
Issue Dt:
12/23/2008
Application #:
11633930
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
TEST STRUCTURES FOR DEVELOPMENT OF METAL-INSULATOR-METAL (MIM) DEVICES
71
Patent #:
Issue Dt:
12/13/2011
Application #:
11633940
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD OF PROGRAMMING, ERASING AND REPAIRING A MEMORY DEVICE
72
Patent #:
Issue Dt:
03/29/2011
Application #:
11633941
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD OF ERASING A RESISTIVE MEMORY DEVICE
73
Patent #:
Issue Dt:
06/10/2008
Application #:
11633942
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD OF FABRICATING METAL-INSULATOR-METAL (MIM) DEVICE WITH STABLE DATA RETENTION
74
Patent #:
Issue Dt:
05/25/2010
Application #:
11634776
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD TO PROVIDE A HIGHER REFERENCE VOLTAGE AT A LOWER POWER SUPPLY IN FLASH MEMORY DEVICES
75
Patent #:
Issue Dt:
10/27/2015
Application #:
11634777
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
Barrier region underlying source/drain regions for dual-bit memory devices
76
Patent #:
Issue Dt:
03/15/2011
Application #:
11636064
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/21/2007
Title:
SEMICONDUCTOR MANUFACTURING APPARATUS AND CONTROL SYSTEM AND CONTROL METHOD THEREFOR
77
Patent #:
Issue Dt:
11/11/2008
Application #:
11636111
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
78
Patent #:
Issue Dt:
12/23/2008
Application #:
11637260
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
08/09/2007
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
79
Patent #:
Issue Dt:
05/13/2008
Application #:
11639128
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
08/09/2007
Title:
CONTROLLING A NONVOLATILE STORAGE DEVICE
80
Patent #:
Issue Dt:
10/13/2015
Application #:
11639666
Filing Dt:
12/15/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHOD FOR FABRICATING MEMORY CELLS HAVING SPLIT CHARGE STORAGE NODES
81
Patent #:
Issue Dt:
06/29/2010
Application #:
11639935
Filing Dt:
12/15/2006
Publication #:
Pub Dt:
06/19/2008
Title:
METHODS AND SYSTEMS FOR MEMORY DEVICES
82
Patent #:
Issue Dt:
12/02/2008
Application #:
11639936
Filing Dt:
12/15/2006
Publication #:
Pub Dt:
06/19/2008
Title:
DRAIN VOLTAGE REGULATOR
83
Patent #:
NONE
Issue Dt:
Application #:
11641506
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
Stress management in BGA packaging
84
Patent #:
Issue Dt:
08/02/2011
Application #:
11641646
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
RESISTIVE MEMORY ARRAY USING P-I-N DIODE SELECT DEVICE AND METHODS OF FABRICATION THEREOF
85
Patent #:
Issue Dt:
07/29/2014
Application #:
11641647
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
Method of depositing copper using physical vapor deposition
86
Patent #:
Issue Dt:
11/11/2008
Application #:
11642477
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY DEVICE WITH ACTIVE LAYER OF DENDRIMERIC MATERIAL
87
Patent #:
Issue Dt:
07/12/2011
Application #:
11645475
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
THIN OXIDE DUMMY TILING AS CHARGE PROTECTION
88
Patent #:
Issue Dt:
03/02/2010
Application #:
11646157
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
DEEP BITLINE IMPLANT TO AVOID PROGRAM DISTURB
89
Patent #:
NONE
Issue Dt:
Application #:
11650907
Filing Dt:
01/08/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Structure and method for wire bond integrity check on BGA substrates using indirect electrical interconnectivity pathway between wire bonds and ground
90
Patent #:
Issue Dt:
09/28/2010
Application #:
11653649
Filing Dt:
01/12/2007
Publication #:
Pub Dt:
07/17/2008
Title:
SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS
91
Patent #:
Issue Dt:
07/28/2009
Application #:
11654703
Filing Dt:
01/17/2007
Publication #:
Pub Dt:
07/17/2008
Title:
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
92
Patent #:
Issue Dt:
07/20/2010
Application #:
11656437
Filing Dt:
01/23/2007
Publication #:
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
93
Patent #:
Issue Dt:
01/27/2009
Application #:
11656438
Filing Dt:
01/23/2007
Publication #:
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
94
Patent #:
NONE
Issue Dt:
Application #:
11685711
Filing Dt:
03/13/2007
Publication #:
Pub Dt:
07/19/2007
Title:
SEMICONDUCTOR DEVICE WITH HIGH CONDUCTIVITY REGION USING SHALLOW TRENCH
95
Patent #:
Issue Dt:
12/14/2010
Application #:
11687436
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY
96
Patent #:
NONE
Issue Dt:
Application #:
11687479
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
MEMORY STORAGE VIA AN INTERNAL COMPRESSION ALGORITHM
97
Patent #:
Issue Dt:
11/16/2010
Application #:
11687492
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
HIGH ACCURACY ADAPTIVE PROGRAMMING
98
Patent #:
NONE
Issue Dt:
Application #:
11694089
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
06/26/2008
Title:
MEMORY SYSTEM WITH DEPLETION GATE
99
Patent #:
Issue Dt:
10/22/2013
Application #:
11702845
Filing Dt:
02/05/2007
Publication #:
Pub Dt:
09/06/2007
Title:
DUAL STORAGE NODE MEMORY
100
Patent #:
Issue Dt:
06/03/2014
Application #:
11702846
Filing Dt:
02/05/2007
Publication #:
Pub Dt:
09/06/2007
Title:
FLASH MEMORY CELLS HAVING TRENCHED STORAGE ELEMENTS
Assignor
1
Exec Dt:
03/12/2015
Assignees
1
915 DEGUIGNE DRIVE
SUNNYVALE, CALIFORNIA 94088
2
915 DEGUIGNE DRIVE
SUNNYVALE, CALIFORNIA 94088
3
915 DEGUIGNE DRIVE
SUNNYVALE, CALIFORNIA 94088
Correspondence name and address
WILSON SONSINI GOODRICH & ROSATI
650 PAGE MILL ROAD
PALO ALTO, CA 94304

Search Results as of: 06/20/2024 07:07 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT