Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 007403/0159 | |
| Pages: | 5 |
| | Recorded: | 03/20/1995 | | |
| Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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09/14/1993
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Application #:
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07739015
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Filing Dt:
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07/31/1991
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Title:
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DIGITALLY PROGRAMMABLE LINEAR PHASE FILTER HAVING PHASE EQUALIZATION
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Patent #:
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Issue Dt:
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07/04/1995
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Application #:
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07779300
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Filing Dt:
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10/18/1991
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Title:
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DISK DRIVE INTERFACE COMBINING A MAGNETO-RESISTIVE READ AND INDUCTIVE WRITE CIRCUITS
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Patent #:
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Issue Dt:
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10/31/1995
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Application #:
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08011191
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Filing Dt:
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01/29/1993
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Title:
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COMPUTER DISK DRIVE INTEGRATED DATA PATH CIRCUIT OPTIMIZED FOR HANDLING BOTH DATA AND SERVO SIGNALS
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Patent #:
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Issue Dt:
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06/28/1994
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Application #:
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08046408
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Filing Dt:
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04/12/1993
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Title:
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DIGITALLY PROGRAMMABLE LINEAR PHASE FILTER HAVING PHASE EQUALIZATION
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Patent #:
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Issue Dt:
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10/31/1995
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Application #:
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08262156
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Filing Dt:
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06/20/1994
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Title:
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PROGRAMMABLE OPERATION TRANSCONDUCTANCE AMPLIFIER
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Patent #:
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Issue Dt:
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02/20/1996
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Application #:
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08349503
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Filing Dt:
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12/02/1994
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Title:
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CMOS PROCESS AND CIRCUIT INCLUDING ZERO THRESHOLD TRANSISTORS
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Assignee
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| 2830 NORTH FIRST STREET SAN JOSE, CA. 95134 |
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Correspondence name and address
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GERALD P. PARSONS
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MAJESTIC, PARSON, SIEBERT & HSUE
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4 EMBARCADERO CENTER, SUITE 1450
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SAN FRANCISCO, CA. 94111-4121
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