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Reel/Frame:	052561/0161			Pages:	20
		Recorded:	05/04/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 316
Page 3 of 4
Pages: 1 2 3 4

Patent #:	9716045	Issue Dt:	07/25/2017	Application #:	15229754	Filing Dt:	08/05/2016
Publication #:	US20160343621	Pub Dt:	11/24/2016
Title:	DIRECTLY FORMING SiGe FINS ON OXIDE

Patent #:	9953839	Issue Dt:	04/24/2018	Application #:	15240031	Filing Dt:	08/18/2016
Publication #:	US20180053656	Pub Dt:	02/22/2018
Title:	Gate-Stack Structure with a Diffusion Barrier Material

Patent #:	9570363	Issue Dt:	02/14/2017	Application #:	15246861	Filing Dt:	08/25/2016
Publication #:	US20160365291	Pub Dt:	12/15/2016
Title:	VERTICALLY INTEGRATED MEMORY CELL

Patent #:	10460956	Issue Dt:	10/29/2019	Application #:	15255244	Filing Dt:	09/02/2016
Publication #:	US20160372337	Pub Dt:	12/22/2016
Title:	INTERPOSER WITH LATTICE CONSTRUCTION AND EMBEDDED CONDUCTIVE METAL STRUCTURES

Patent #:	10083862	Issue Dt:	09/25/2018	Application #:	15262032	Filing Dt:	09/12/2016
Publication #:	US20180076086	Pub Dt:	03/15/2018
Title:	PROTECTIVE LINER BETWEEN A GATE DIELECTRIC AND A GATE CONTACT

Patent #:	10573526	Issue Dt:	02/25/2020	Application #:	15266121	Filing Dt:	09/15/2016
Publication #:	US20170076951	Pub Dt:	03/16/2017
Title:	METHOD OF CHARGE CONTROLLED PATTERNING DURING REACTIVE ION ETCHING

Patent #:	9887198	Issue Dt:	02/06/2018	Application #:	15272874	Filing Dt:	09/22/2016
Publication #:	US20170011970	Pub Dt:	01/12/2017
Title:	SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS

Patent #:	9852944	Issue Dt:	12/26/2017	Application #:	15274406	Filing Dt:	09/23/2016
Publication #:	US20170011962	Pub Dt:	01/12/2017
Title:	BACKSIDE CONTACT TO A FINAL SUBSTRATE

Patent #:	10074561	Issue Dt:	09/11/2018	Application #:	15274423	Filing Dt:	09/23/2016
Publication #:	US20170012055	Pub Dt:	01/12/2017
Title:	BACKSIDE CONTACT TO A FINAL SUBSTRATE

Patent #:	9997348	Issue Dt:	06/12/2018	Application #:	15278551	Filing Dt:	09/28/2016
Publication #:	US20180090307	Pub Dt:	03/29/2018
Title:	WAFER STRESS CONTROL AND TOPOGRAPHY COMPENSATION

Patent #:	10090180	Issue Dt:	10/02/2018	Application #:	15292613	Filing Dt:	10/13/2016
Publication #:	US20170032993	Pub Dt:	02/02/2017
Title:	PACKAGE ASSEMBLY FOR THIN WAFER SHIPPING AND METHOD OF USE

Patent #:	9667749	Issue Dt:	05/30/2017	Application #:	15299619	Filing Dt:	10/21/2016
Publication #:	US20170070598	Pub Dt:	03/09/2017
Title:	CLIENT-INITIATED LEADER ELECTION IN DISTRIBUTED CLIENT-SERVER SYSTEMS

Patent #:	9667750	Issue Dt:	05/30/2017	Application #:	15299633	Filing Dt:	10/21/2016
Publication #:	US20170070599	Pub Dt:	03/09/2017
Title:	CLIENT-INITIATED LEADER ELECTION IN DISTRIBUTED CLIENT-SERVER SYSTEMS

Patent #:	9985109	Issue Dt:	05/29/2018	Application #:	15333262	Filing Dt:	10/25/2016
Publication #:	US20180114846	Pub Dt:	04/26/2018
Title:	FINFET WITH REDUCED PARASITIC CAPACITANCE

Patent #:	9735277	Issue Dt:	08/15/2017	Application #:	15336654	Filing Dt:	10/27/2016
Publication #:	US20170170323	Pub Dt:	06/15/2017
Title:	PARTIALLY DIELECTRIC ISOLATED FIN-SHAPED FIELD EFFECT TRANSISTOR (FINFET)

Patent #:	10032773	Issue Dt:	07/24/2018	Application #:	15336864	Filing Dt:	10/28/2016
Publication #:	US20170047327	Pub Dt:	02/16/2017
Title:	FINFET WITH REDUCED CAPACITANCE

Patent #:	10014295	Issue Dt:	07/03/2018	Application #:	15344256	Filing Dt:	11/04/2016
Publication #:	US20170162567	Pub Dt:	06/08/2017
Title:	SELF HEATING REDUCTION FOR ANALOG RADIO FREQUENCY (RF) DEVICE

Patent #:	10014220	Issue Dt:	07/03/2018	Application #:	15344272	Filing Dt:	11/04/2016
Publication #:	US20170162445	Pub Dt:	06/08/2017
Title:	SELF HEATING REDUCTION FOR ANALOG RADIO FREQUENCY (RF) DEVICE

Patent #:	9702042	Issue Dt:	07/11/2017	Application #:	15352917	Filing Dt:	11/16/2016
Title:	METHOD AND APPARATUS FOR SINGLE CHAMBER TREATMENT

Patent #:	9881937	Issue Dt:	01/30/2018	Application #:	15397170	Filing Dt:	01/03/2017
Publication #:	US20170117300	Pub Dt:	04/27/2017
Title:	PREVENTING STRAINED FIN RELAXATION

Patent #:	9905479	Issue Dt:	02/27/2018	Application #:	15398827	Filing Dt:	01/05/2017
Publication #:	US20170117193	Pub Dt:	04/27/2017
Title:	SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS

Patent #:	10032855	Issue Dt:	07/24/2018	Application #:	15399703	Filing Dt:	01/05/2017
Publication #:	US20180190759	Pub Dt:	07/05/2018
Title:	ADVANCED METAL INSULATOR METAL CAPACITOR

Patent #:	10177000	Issue Dt:	01/08/2019	Application #:	15425005	Filing Dt:	02/06/2017
Publication #:	US20170148672	Pub Dt:	05/25/2017
Title:	SEMICONDUCTOR STRUCTURES HAVING LOW RESISTANCE PATHS THROUGHOUT A WAFER

Patent #:	10453959	Issue Dt:	10/22/2019	Application #:	15425190	Filing Dt:	02/06/2017
Publication #:	US20170148916	Pub Dt:	05/25/2017
Title:	FIN REPLACEMENT IN A FIELD-EFFECT TRANSISTOR

Patent #:	10217725	Issue Dt:	02/26/2019	Application #:	15440807	Filing Dt:	02/23/2017
Publication #:	US20180240783	Pub Dt:	08/23/2018
Title:	MICROSTRUCTURE MODULATION FOR METAL WAFER-WAFER BONDING

Patent #:	10411092	Issue Dt:	09/10/2019	Application #:	15445145	Filing Dt:	02/28/2017
Publication #:	US20170170271	Pub Dt:	06/15/2017
Title:	FABRICATION OF SEMICONDUCTOR JUNCTIONS

Patent #:	9978872	Issue Dt:	05/22/2018	Application #:	15467843	Filing Dt:	03/23/2017
Title:	NON-POLAR, III-NITRIDE SEMICONDUCTOR FIN FIELD-EFFECT TRANSISTOR

Patent #:	9997409	Issue Dt:	06/12/2018	Application #:	15481527	Filing Dt:	04/07/2017
Title:	FABRICATING CONTACTS OF A CMOS STRUCTURE

Patent #:	9997385	Issue Dt:	06/12/2018	Application #:	15490175	Filing Dt:	04/18/2017
Publication #:	US20170221742	Pub Dt:	08/03/2017
Title:	CENTERING SUBSTRATES ON A CHUCK

Patent #:	9824917	Issue Dt:	11/21/2017	Application #:	15496172	Filing Dt:	04/25/2017
Publication #:	US20170301584	Pub Dt:	10/19/2017
Title:	METHOD AND APPARATUS FOR SINGLE CHAMBER TREATMENT

Patent #:	10032862	Issue Dt:	07/24/2018	Application #:	15583007	Filing Dt:	05/01/2017
Publication #:	US20170236898	Pub Dt:	08/17/2017
Title:	SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES

Patent #:	10020199	Issue Dt:	07/10/2018	Application #:	15595124	Filing Dt:	05/15/2017
Title:	POROUS TIN OXIDE FILMS

Patent #:	9911597	Issue Dt:	03/06/2018	Application #:	15595503	Filing Dt:	05/15/2017
Publication #:	US20170250073	Pub Dt:	08/31/2017
Title:	TRENCH METAL INSULATOR METAL CAPACITOR WITH OXYGEN GETTERING LAYER

Patent #:	10230005	Issue Dt:	03/12/2019	Application #:	15617665	Filing Dt:	06/08/2017
Publication #:	US20180358476	Pub Dt:	12/13/2018
Title:	FOUR TERMINAL STACKED COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTORS

Patent #:	10319609	Issue Dt:	06/11/2019	Application #:	15629171	Filing Dt:	06/21/2017
Publication #:	US20180374714	Pub Dt:	12/27/2018
Title:	ADHESIVE-BONDED THERMAL INTERFACE STRUCTURES

Patent #:	10424478	Issue Dt:	09/24/2019	Application #:	15650863	Filing Dt:	07/15/2017
Publication #:	US20170345656	Pub Dt:	11/30/2017
Title:	FABRICATION OF SEMICONDUCTOR FIN STRUCTURES

Patent #:	10460985	Issue Dt:	10/29/2019	Application #:	15652162	Filing Dt:	07/17/2017
Publication #:	US20170316970	Pub Dt:	11/02/2017
Title:	ENHANCEMENT OF ISO-VIA RELIABILITY

Patent #:	10242906	Issue Dt:	03/26/2019	Application #:	15669260	Filing Dt:	08/04/2017
Publication #:	US20170338145	Pub Dt:	11/23/2017
Title:	SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES

Patent #:	10079148	Issue Dt:	09/18/2018	Application #:	15669450	Filing Dt:	08/04/2017
Publication #:	US20170358453	Pub Dt:	12/14/2017
Title:	MATERIAL REMOVAL PROCESS FOR SELF-ALIGNED CONTACTS

Patent #:	9929016	Issue Dt:	03/27/2018	Application #:	15679433	Filing Dt:	08/17/2017
Publication #:	US20170345659	Pub Dt:	11/30/2017
Title:	MATERIAL REMOVAL PROCESS FOR SELF-ALIGNED CONTACTS

Patent #:	10347628	Issue Dt:	07/09/2019	Application #:	15685437	Filing Dt:	08/24/2017
Publication #:	US20170373061	Pub Dt:	12/28/2017
Title:	SIMULTANEOUSLY FABRICATING A HIGH VOLTAGE TRANSISTOR AND A FINFET

Patent #:	10325777	Issue Dt:	06/18/2019	Application #:	15690540	Filing Dt:	08/30/2017
Publication #:	US20190067023	Pub Dt:	02/28/2019
Title:	UTILIZING MULTIPLE LAYERS TO INCREASE SPATIAL FREQUENCY

Patent #:	10176997	Issue Dt:	01/08/2019	Application #:	15700246	Filing Dt:	09/11/2017
Title:	DIRECT GATE PATTERNING FOR VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR

Patent #:	10249731	Issue Dt:	04/02/2019	Application #:	15713975	Filing Dt:	09/25/2017
Publication #:	US20190097024	Pub Dt:	03/28/2019
Title:	Vertical FET with Sharp Junctions

Patent #:	10354999	Issue Dt:	07/16/2019	Application #:	15723283	Filing Dt:	10/03/2017
Publication #:	US20180026035	Pub Dt:	01/25/2018
Title:	STRUCTURE AND METHOD TO SUPPRESS WORK FUNCTION EFFECT BY PATTERNING BOUNDARY PROXIMITY IN REPLACEMENT METAL GATE

Patent #:	10297507	Issue Dt:	05/21/2019	Application #:	15786047	Filing Dt:	10/17/2017
Publication #:	US20190115452	Pub Dt:	04/18/2019
Title:	SELF-ALIGNED VERTICAL FIELD-EFFECT TRANSISTOR WITH EPITAXIALLY GROWN BOTTOM AND TOP SOURCE DRAIN REGIONS

Patent #:	10566235	Issue Dt:	02/18/2020	Application #:	15788536	Filing Dt:	10/19/2017
Publication #:	US20180040509	Pub Dt:	02/08/2018
Title:	BACKSIDE CONTACT TO A FINAL SUBSTRATE

Patent #:	10056268	Issue Dt:	08/21/2018	Application #:	15792803	Filing Dt:	10/25/2017
Publication #:	US20180047590	Pub Dt:	02/15/2018
Title:	LIMITING ELECTRONIC PACKAGE WARPAGE

Patent #:	10236346	Issue Dt:	03/19/2019	Application #:	15793195	Filing Dt:	10/25/2017
Title:	TRANSISTOR HAVING A HIGH GERMANIUM PERCENTAGE FIN CHANNEL AND A GRADIENT SOURCE/DRAIN JUNCTION DOPING PROFILE

Patent #:	10236189	Issue Dt:	03/19/2019	Application #:	15796047	Filing Dt:	10/27/2017
Publication #:	US20180374715	Pub Dt:	12/27/2018
Title:	ADHESIVE-BONDED THERMAL INTERFACE STRUCTURES FOR INTEGRATED CIRCUIT COOLING

Patent #:	10211047	Issue Dt:	02/19/2019	Application #:	15796940	Filing Dt:	10/30/2017
Publication #:	US20180047568	Pub Dt:	02/15/2018
Title:	MULTILAYER DIELECTRIC STRUCTURES WITH GRADED COMPOSITION FOR NANO-SCALE SEMICONDUCTOR DEVICES

Patent #:	10170359	Issue Dt:	01/01/2019	Application #:	15797791	Filing Dt:	10/30/2017
Publication #:	US20180047622	Pub Dt:	02/15/2018
Title:	DIFFUSION BARRIER LAYER FORMATION

Patent #:	10361123	Issue Dt:	07/23/2019	Application #:	15799862	Filing Dt:	10/31/2017
Publication #:	US20180068891	Pub Dt:	03/08/2018
Title:	BACKSIDE CONTACT TO A FINAL SUBSTRATE

Patent #:	9984929	Issue Dt:	05/29/2018	Application #:	15800243	Filing Dt:	11/01/2017
Title:	FABRICATING CONTACTS OF A CMOS STRUCTURE

Patent #:	10325778	Issue Dt:	06/18/2019	Application #:	15801039	Filing Dt:	11/01/2017
Publication #:	US20190067024	Pub Dt:	02/28/2019
Title:	UTILIZING MULTIPLE LAYERS TO INCREASE SPATIAL FREQUENCY

Patent #:	10211054	Issue Dt:	02/19/2019	Application #:	15802547	Filing Dt:	11/03/2017
Title:	TONE INVERSION INTEGRATION FOR PHASE CHANGE MEMORY

Patent #:	10134859	Issue Dt:	11/20/2018	Application #:	15808869	Filing Dt:	11/09/2017
Title:	TRANSISTOR WITH ASYMMETRIC SPACERS

Patent #:	10217696	Issue Dt:	02/26/2019	Application #:	15811198	Filing Dt:	11/13/2017
Publication #:	US20180068929	Pub Dt:	03/08/2018
Title:	NON-BRIDGING CONTACT VIA STRUCTURES IN PROXIMITY

Patent #:	10056272	Issue Dt:	08/21/2018	Application #:	15811738	Filing Dt:	11/14/2017
Publication #:	US20180082863	Pub Dt:	03/22/2018
Title:	GAS-CONTROLLED BONDING PLATFORM FOR EDGE DEFECT REDUCTION DURING WAFER BONDING

Patent #:	10224242	Issue Dt:	03/05/2019	Application #:	15812033	Filing Dt:	11/14/2017
Title:	LOW-RESISTIVITY METALLIC INTERCONNECT STRUCTURES

Patent #:	10269760	Issue Dt:	04/23/2019	Application #:	15815769	Filing Dt:	11/17/2017
Publication #:	US20180068974	Pub Dt:	03/08/2018
Title:	ADVANCED CHIP TO WAFER STACKING

Patent #:	10170447	Issue Dt:	01/01/2019	Application #:	15815777	Filing Dt:	11/17/2017
Publication #:	US20180076170	Pub Dt:	03/15/2018
Title:	ADVANCED CHIP TO WAFER STACKING

Patent #:	10312151	Issue Dt:	06/04/2019	Application #:	15818674	Filing Dt:	11/20/2017
Publication #:	US20190157161	Pub Dt:	05/23/2019
Title:	MONOLITHIC CO-INTEGRATION OF MOSFET AND JFET FOR NEUROMORPHIC/COGNITIVE CIRCUIT APPLICATIONS

Patent #:	10236219	Issue Dt:	03/19/2019	Application #:	15820603	Filing Dt:	11/22/2017
Title:	VFET METAL GATE PATTERNING FOR VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR

Patent #:	10157757	Issue Dt:	12/18/2018	Application #:	15822578	Filing Dt:	11/27/2017
Publication #:	US20180082864	Pub Dt:	03/22/2018
Title:	GAS-CONTROLLED BONDING PLATFORM FOR EDGE DEFECT REDUCTION DURING WAFER BONDING

Patent #:	10211109	Issue Dt:	02/19/2019	Application #:	15826076	Filing Dt:	11/29/2017
Title:	LOCAL WIRING IN BETWEEN STACKED DEVICES

Patent #:	10325830	Issue Dt:	06/18/2019	Application #:	15826856	Filing Dt:	11/30/2017
Publication #:	US20190164864	Pub Dt:	05/30/2019
Title:	MULTIPART LID FOR A SEMICONDUCTOR PACKAGE WITH MULTIPLE COMPONENTS

Patent #:	10153159	Issue Dt:	12/11/2018	Application #:	15827108	Filing Dt:	11/30/2017
Title:	SOURCE AND DRAIN FORMATION USING SELF-ALIGNED PROCESSES

Patent #:	10438858	Issue Dt:	10/08/2019	Application #:	15827195	Filing Dt:	11/30/2017
Publication #:	US20180082910	Pub Dt:	03/22/2018
Title:	LOW-COST SOI FINFET TECHNOLOGY

Patent #:	10170577	Issue Dt:	01/01/2019	Application #:	15830963	Filing Dt:	12/04/2017
Title:	VERTICAL TRANSPORT FETS HAVING A GRADIENT THRESHOLD VOLTAGE

Patent #:	10229852	Issue Dt:	03/12/2019	Application #:	15837236	Filing Dt:	12/11/2017
Publication #:	US20180090375	Pub Dt:	03/29/2018
Title:	SELF-ALIGNED LOW DIELECTRIC CONSTANT GATE CAP AND A METHOD OF FORMING THE SAME

Patent #:	10249730	Issue Dt:	04/02/2019	Application #:	15838312	Filing Dt:	12/11/2017
Title:	CONTROLLING GATE PROFILE BY INTER-LAYER DIELECTRIC (ILD) NANOLAMINATES

Patent #:	10304699	Issue Dt:	05/28/2019	Application #:	15838629	Filing Dt:	12/12/2017
Publication #:	US20180374716	Pub Dt:	12/27/2018
Title:	ADHESIVE-BONDED THERMAL INTERFACE STRUCTURES

Patent #:	10325821	Issue Dt:	06/18/2019	Application #:	15840878	Filing Dt:	12/13/2017
Publication #:	US20190181054	Pub Dt:	06/13/2019
Title:	THREE-DIMENSIONAL STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR LOGIC GATE WITH BURIED POWER BUS

Patent #:	10217674	Issue Dt:	02/26/2019	Application #:	15840897	Filing Dt:	12/13/2017
Title:	THREE-DIMENSIONAL MONOLITHIC VERTICAL FIELD EFFECT TRANSISTOR LOGIC GATES

Patent #:	10312326	Issue Dt:	06/04/2019	Application #:	15844923	Filing Dt:	12/18/2017
Publication #:	US20190189748	Pub Dt:	06/20/2019
Title:	LONG CHANNELS FOR TRANSISTORS

Patent #:	10355103	Issue Dt:	07/16/2019	Application #:	15844950	Filing Dt:	12/18/2017
Publication #:	US20190189776	Pub Dt:	06/20/2019
Title:	LONG CHANNELS FOR TRANSISTORS

Patent #:	10424482	Issue Dt:	09/24/2019	Application #:	15846779	Filing Dt:	12/19/2017
Publication #:	US20190189443	Pub Dt:	06/20/2019
Title:	METHODS AND STRUCTURES FOR FORMING A TIGHT PITCH STRUCTURE

Patent #:	10361125	Issue Dt:	07/23/2019	Application #:	15846844	Filing Dt:	12/19/2017
Publication #:	US20190189519	Pub Dt:	06/20/2019
Title:	METHODS AND STRUCTURES FOR FORMING UNIFORM FINS WHEN USING HARDMASK PATTERNS

Patent #:	10312140	Issue Dt:	06/04/2019	Application #:	15847005	Filing Dt:	12/19/2017
Publication #:	US20190189503	Pub Dt:	06/20/2019
Title:	DIELECTRIC GAP FILL EVALUATION FOR INTEGRATED CIRCUITS

Patent #:	10319836	Issue Dt:	06/11/2019	Application #:	15848960	Filing Dt:	12/20/2017
Publication #:	US20190189777	Pub Dt:	06/20/2019
Title:	EFFECTIVE JUNCTION FORMATION IN VERTICAL TRANSISTOR STRUCTURES BY ENGINEERED BOTTOM SOURCE/DRAIN EPITAXY

Patent #:	10141448	Issue Dt:	11/27/2018	Application #:	15853822	Filing Dt:	12/24/2017
Title:	Vertical FETS with Different Gate Lengths and Spacer Thicknesses

Patent #:	10170581	Issue Dt:	01/01/2019	Application #:	15854052	Filing Dt:	12/26/2017
Publication #:	US20180114847	Pub Dt:	04/26/2018
Title:	FINFET WITH REDUCED PARASITIC CAPACITENCE

Patent #:	10290719	Issue Dt:	05/14/2019	Application #:	15855273	Filing Dt:	12/27/2017
Title:	INDIUM GALLIUM ARSENIDE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR HAVING A LOW CONTACT RESISTANCE TO METAL ELECTRODE

Patent #:	10361127	Issue Dt:	07/23/2019	Application #:	15856533	Filing Dt:	12/28/2017
Publication #:	US20190206738	Pub Dt:	07/04/2019
Title:	VERTICAL TRANSPORT FET WITH TWO OR MORE GATE LENGTHS

Patent #:	10283411	Issue Dt:	05/07/2019	Application #:	15860031	Filing Dt:	01/02/2018
Title:	STACKED VERTICAL TRANSISTOR DEVICE FOR THREE-DIMENSIONAL MONOLITHIC INTEGRATION

Patent #:	10276434	Issue Dt:	04/30/2019	Application #:	15860166	Filing Dt:	01/02/2018
Title:	STRUCTURE AND METHOD USING METAL SPACER FOR INSERTION OF VARIABLE WIDE LINE IMPLANTATION IN SADP/SAQP INTEGRATION

Patent #:	10297668	Issue Dt:	05/21/2019	Application #:	15876905	Filing Dt:	01/22/2018
Title:	VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTOR WITH ASYMMETRIC CHANNEL PROFILE

Patent #:	10326000	Issue Dt:	06/18/2019	Application #:	15878452	Filing Dt:	01/24/2018
Publication #:	US20180151686	Pub Dt:	05/31/2018
Title:	FINFET WITH REDUCED PARASITIC CAPACITANCE

Patent #:	10211092	Issue Dt:	02/19/2019	Application #:	15881778	Filing Dt:	01/28/2018
Title:	TRANSISTOR WITH ROBUST AIR SPACER

Patent #:	10410926	Issue Dt:	09/10/2019	Application #:	15885945	Filing Dt:	02/01/2018
Publication #:	US20180294193	Pub Dt:	10/11/2018
Title:	FABRICATING CONTACTS OF A CMOS STRUCTURE

Patent #:	10381432	Issue Dt:	08/13/2019	Application #:	15889153	Filing Dt:	02/05/2018
Publication #:	US20180190760	Pub Dt:	07/05/2018
Title:	ADVANCED METAL INSULATOR METAL CAPACITOR

Patent #:	10361200	Issue Dt:	07/23/2019	Application #:	15914375	Filing Dt:	03/07/2018
Title:	VERTICAL FIN FIELD EFFECT TRANSISTOR WITH INTEGRAL U-SHAPED ELECTRICAL GATE CONNECTION

Patent #:	10361315	Issue Dt:	07/23/2019	Application #:	15928325	Filing Dt:	03/22/2018
Title:	METHOD AND APPARATUS OF FABRICATING SOURCE AND DRAIN EPITAXY FOR VERTICAL FIELD EFFECT TRANSISTOR

Patent #:	10249533	Issue Dt:	04/02/2019	Application #:	15951787	Filing Dt:	04/12/2018
Title:	METHOD AND STRUCTURE FOR FORMING A REPLACEMENT CONTACT

Patent #:	10224225	Issue Dt:	03/05/2019	Application #:	15957111	Filing Dt:	04/19/2018
Publication #:	US20180240694	Pub Dt:	08/23/2018
Title:	CENTERING SUBSTRATES ON A CHUCK

Patent #:	10361119	Issue Dt:	07/23/2019	Application #:	15966695	Filing Dt:	04/30/2018
Title:	ENLARGED CONTACT AREA STRUCTURE USING NOBLE METAL CAP AND NOBLE METAL LINER

Patent #:	10347632	Issue Dt:	07/09/2019	Application #:	15972547	Filing Dt:	05/07/2018
Publication #:	US20180254274	Pub Dt:	09/06/2018
Title:	FORMING SPACER FOR TRENCH EPITAXIAL STRUCTURES

Patent #:	10347633	Issue Dt:	07/09/2019	Application #:	15972712	Filing Dt:	05/07/2018
Publication #:	US20180254275	Pub Dt:	09/06/2018
Title:	SPACER FOR TRENCH EPITAXIAL STRUCTURES

100

Patent #:	10304744	Issue Dt:	05/28/2019	Application #:	15980427	Filing Dt:	05/15/2018
Title:	INVERSE TONE DIRECT PRINT EUV LITHOGRAPHY ENABLED BY SELECTIVE MATERIAL DEPOSITION

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

03/06/2020

Assignee

ELPIS TECHNOLOGIES INC.

1891 ROBERTSON ROAD

SUITE 100

OTTAWA, CANADA K2H 5B7

Correspondence name and address
	ELPIS TECHNOLOGIES INC.
	1891 ROBERTSON ROAD
	SUITE 100
	OTTAWA, K2H 5B7 CANADA

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