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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:010568/0175   Pages: 5
Recorded: 02/07/2000
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 38
1
Patent #:
5895480
Issue Dt:
04/20/1999
Application #:
08541600
Filing Dt:
10/10/1995
Title:
METHOD OF AND MEANS FOR ACCESSING AN ADDRESS BY RESPECTIVELY SUBSTRACTING BASE ADDRESSES OF MEMORY INTEGRATED CIRCUITS FROM AN ACCESS ADDRESS
2
Patent #:
5818789
Issue Dt:
10/06/1998
Application #:
08541808
Filing Dt:
10/10/1995
Title:
DEVICE AND METHOD FOR MEMORY ACCESS
3
Patent #:
5767594
Issue Dt:
06/16/1998
Application #:
08554490
Filing Dt:
11/07/1995
Title:
COMPUTER KEYBOARD POWER SAVING METHOD
4
Patent #:
5823871
Issue Dt:
10/20/1998
Application #:
08555094
Filing Dt:
11/08/1995
Title:
INTERFACE CONTROL DEVICE FOR USE WITH TV GAME EQUIPMENT
5
Patent #:
5777919
Issue Dt:
07/07/1998
Application #:
08713741
Filing Dt:
09/13/1996
Title:
SELECT GATE ENHANCED HIGH DENSITY READ-ONLY-MEMORY DEVICE
6
Patent #:
5684733
Issue Dt:
11/04/1997
Application #:
08722303
Filing Dt:
09/30/1996
Title:
FIXED RESISTANCE HIGH DENSITY PARALLEL ROM DEVICE
7
Patent #:
5776816
Issue Dt:
07/07/1998
Application #:
08739056
Filing Dt:
10/28/1996
Title:
NITRIDE DOUBLE ETCHING FOR TWIN WELL ALIGN
8
Patent #:
5866447
Issue Dt:
02/02/1999
Application #:
08739058
Filing Dt:
10/28/1996
Title:
MODIFIED ZERO LAYER ALIGN METHOD OF TWIN WELL MOS FABRICATION
9
Patent #:
5814552
Issue Dt:
09/29/1998
Application #:
08741630
Filing Dt:
11/01/1996
Title:
HIGH STEP PROCESS FOR MANUFACTURING ALIGNMENT MARKS FOR TWIN-WELL INTEGRATED CIRCUIT DEVICES
10
Patent #:
5688710
Issue Dt:
11/18/1997
Application #:
08757179
Filing Dt:
11/27/1996
Title:
METHOD OF FABRICATING A TWIN - WELL CMOS DEVICE
11
Patent #:
5966601
Issue Dt:
10/12/1999
Application #:
08786598
Filing Dt:
01/21/1997
Title:
METHOD OF MAKING NON-VOLATILE SEMICONDUCTOR MEMORY ARRAYS
12
Patent #:
5837404
Issue Dt:
11/17/1998
Application #:
08792749
Filing Dt:
01/04/1997
Title:
FABRICATION OF ZERO LAYER MASK
13
Patent #:
5781475
Issue Dt:
07/14/1998
Application #:
08856917
Filing Dt:
05/15/1997
Title:
SIMPLIFIED PAGE MODE PROGRAMMING CIRCUIT FOR EEPROM REQUIRING ONLY ONE HIGH VOLTAGE LINE FOR SELECTING BIT LINES
14
Patent #:
5784326
Issue Dt:
07/21/1998
Application #:
08868731
Filing Dt:
06/04/1997
Title:
VOLTAGE RAISING DEVICE
15
Patent #:
5953633
Issue Dt:
09/14/1999
Application #:
08906554
Filing Dt:
08/05/1997
Title:
A METHOD FOR MANUFACTURING SELF-ALIGNED TITANIUM SALICIDE USING TWO TWO-STEP RAPID THERMAL ANNEALING STEPS
16
Patent #:
5877615
Issue Dt:
03/02/1999
Application #:
08965581
Filing Dt:
11/06/1997
Title:
DYNAMIC INPUT REFERENCE VOLTAGE ADJUSTER
17
Patent #:
5888904
Issue Dt:
03/30/1999
Application #:
08991083
Filing Dt:
12/16/1997
Title:
METHOD FOR MANUFACTURING POLYSILICON WITH RELATIVELY SMALL LINE WIDTH
18
Patent #:
5864502
Issue Dt:
01/26/1999
Application #:
08998679
Filing Dt:
12/29/1997
Title:
SENSING CIRCUIT FOR EEPROM
19
Patent #:
5877074
Issue Dt:
03/02/1999
Application #:
08998958
Filing Dt:
12/29/1997
Title:
METHOD FOR IMPROVING THE ELECTRICAL PROPERTY OF GATE IN POLYCIDE STRUCTURE
20
Patent #:
6159819
Issue Dt:
12/12/2000
Application #:
09002729
Filing Dt:
01/05/1998
Title:
FABRICATION OF CAPACITORS WITH LOW VOLTAGE COEFFICIENT OF CAPACITANCE
21
Patent #:
5904520
Issue Dt:
05/18/1999
Application #:
09002930
Filing Dt:
01/05/1998
Title:
METHOD OF FABRICATING A CMOS TRANSISTOR
22
Patent #:
6010925
Issue Dt:
01/04/2000
Application #:
09033521
Filing Dt:
03/02/1998
Title:
METHOD OF MAKING DUAL-GATE CMOSFET
23
Patent #:
6004851
Issue Dt:
12/21/1999
Application #:
09042213
Filing Dt:
03/13/1998
Title:
METHOD FOR MANUFACTURING MOS DEVICE WITH ADJUSTABLE SOURCE/DRAIN EXTENSIONS
24
Patent #:
5999443
Issue Dt:
12/07/1999
Application #:
09059907
Filing Dt:
04/13/1998
Title:
LOW-VOLTAGE TRIPLE-WELL NON VOLATILE SEMICONDUCTOR MEMORY
25
Patent #:
5972775
Issue Dt:
10/26/1999
Application #:
09059908
Filing Dt:
04/13/1998
Title:
METHOD OF INCREASING THICKNESS OF FIELD OXIDE LAYER
26
Patent #:
5985723
Issue Dt:
11/16/1999
Application #:
09070924
Filing Dt:
05/01/1998
Title:
ROM CODING BY NEURON ACTIVATION
27
Patent #:
6184117
Issue Dt:
02/06/2001
Application #:
09115413
Filing Dt:
07/14/1998
Title:
METHOD FOR REDUCING LATERAL SILICIDE FORMATION FOR SALICIDE PROCESS BY ADDITIONAL CAPPING LAYER ABOVE GATE
28
Patent #:
6156593
Issue Dt:
12/05/2000
Application #:
09123009
Filing Dt:
07/27/1998
Title:
METHOD FOR FABRICATING SALICIDE CMOS AND NON-SALICIDE ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT IN A SINGLE CHIP
29
Patent #:
6150273
Issue Dt:
11/21/2000
Application #:
09200628
Filing Dt:
11/30/1998
Title:
METHOD OF FABRICATING A KINK-EFFECT-FREE SHALLOW TRENCH ISOLATIONS
30
Patent #:
6080674
Issue Dt:
06/27/2000
Application #:
09226029
Filing Dt:
01/06/1999
Title:
METHOD FOR FORMING VIA HOLES
31
Patent #:
6248641
Issue Dt:
06/19/2001
Application #:
09245953
Filing Dt:
02/05/1999
Title:
METHOD OF FABRICATING SHALLOW TRENCH ISOLATION
32
Patent #:
6291814
Issue Dt:
09/18/2001
Application #:
09325842
Filing Dt:
06/04/1999
Title:
SLIT VALVE WITH SAFETY DETECT DEVICE
33
Patent #:
6180462
Issue Dt:
01/30/2001
Application #:
09327128
Filing Dt:
06/07/1999
Title:
METHOD OF FABRICATING AN ANALOG INTEGRATED CIRCUIT WITH ESD PROTECTION
34
Patent #:
6187668
Issue Dt:
02/13/2001
Application #:
09347977
Filing Dt:
07/06/1999
Title:
METHOD OF FORMING SELF-ALIGNED UNLANDED VIA HOLES
35
Patent #:
6207501
Issue Dt:
03/27/2001
Application #:
09363879
Filing Dt:
07/29/1999
Title:
METHOD OF FABRICATING A FLASH MEMORY
36
Patent #:
6217640
Issue Dt:
04/17/2001
Application #:
09370486
Filing Dt:
08/09/1999
Title:
EXHAUST GAS TREATMENT APPARATUS
37
Patent #:
6187080
Issue Dt:
02/13/2001
Application #:
09370487
Filing Dt:
08/09/1999
Title:
EXHAUST GAS TREATMENT APPARATUS INCLUDING A NOVEL WATER VORTEX MEANS AND A DISCHARGE PIPE
38
Patent #:
6315834
Issue Dt:
11/13/2001
Application #:
09427201
Filing Dt:
10/25/1999
Title:
METHOD FOR REMOVING EXTRANEOUS MATTER BY USING FLUORINE-CONTAINING SOLUTION
Assignor
1
UTEK SEMICONDUCTOR CORP.
Exec Dt:
12/21/1999
Assignee
1
UNITED MICROELECTRONICS CORP.
SCIENCE-BASED INDUSTRIAL PARK
NO. 3, LI-HSIN ROAD II
HSINCHU, TAIWAN
Correspondence name and address
RAYMOND SUN
12420 WOODHALL WAY
TUSTIN, CALIFORNIA 92782

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