Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 016417/0184 | |
| Pages: | 7 |
| | Recorded: | 03/23/2005 | | |
| Attorney Dkt #: | RA-307-1C |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
10622627
|
Filing Dt:
|
07/17/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/20/2005
| | | | |
|
Title:
|
PLL LOCK DETECTION CIRCUIT USING EDGE DETECTION
|
|
|
Assignee
|
|
|
|
|
| 4440 EL CAMINO REAL |
| LOS ALTOS, CALIFORNIA 94022 |
|
|
Correspondence name and address
|
| |
DARIEN K. WALLACE
|
| |
SILICON EDGE LAW GROUP
|
| |
6601 KOLL CENTER PARKWAY, STE 245
|
| |
PLEASANTON, CA 94566
|
Search Results as of:
09/21/2024 07:59 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
