Total properties:
11
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10658130
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Filing Dt:
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09/08/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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MEMORY DEVICE AND METHOD OF READING DATA FROM A MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11100500
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Filing Dt:
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04/07/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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PARTIALLY RECESSED DRAM CELL STRUCTURE AND METHOD OF MAKING THE SAME
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11138462
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Filing Dt:
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05/27/2005
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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TEST MODE FOR PROGRAMMING RATE AND PRECHARGE TIME FOR DRAM ACTIVATE-PRECHARGE CYCLE
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11142023
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Filing Dt:
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06/01/2005
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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IMPLEMENTATION OF A FUSING SCHEME TO ALLOW INTERNAL VOLTAGE TRIMMING
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11144558
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Filing Dt:
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06/03/2005
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Publication #:
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Pub Dt:
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12/28/2006
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Title:
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On-chip address generation
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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11144791
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Filing Dt:
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06/06/2005
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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SENSING CURRENT RECYCLING METHOD DURING SELF-REFRESH
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11146509
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Filing Dt:
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06/07/2005
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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Phase change memory cell having ring contacts
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11147541
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Filing Dt:
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06/08/2005
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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DETECTING AND IMPROVING BOND PAD CONNECTIVITY WITH PAD CHECK
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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11153795
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Filing Dt:
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06/15/2005
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Publication #:
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Pub Dt:
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12/21/2006
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Title:
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MEMORY HAVING PARITY ERROR CORRECTION
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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11153969
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Filing Dt:
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06/16/2005
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Publication #:
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Pub Dt:
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10/19/2006
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Title:
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RANDOM ACCESS MEMORY HAVING VOLTAGE PROVIDED OUT OF BOOSTED SUPPLY VOLTAGE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11154463
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Filing Dt:
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06/16/2005
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Publication #:
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Pub Dt:
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12/21/2006
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Title:
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Phase change memory cell defined by imprint lithography
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