Total properties:
13
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Patent #:
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Issue Dt:
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11/06/2007
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Application #:
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11115538
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Filing Dt:
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04/27/2005
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Publication #:
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Pub Dt:
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11/23/2006
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Title:
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ONE-TIME PROGRAMMABLE CIRCUIT EXPLOITING BJT HFE DEGRADATION
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11143916
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Filing Dt:
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06/01/2005
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Publication #:
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Pub Dt:
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12/22/2005
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Title:
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LOW-CONSUMPTION INHIBIT CIRCUIT WITH HYSTERESIS
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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11159818
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Filing Dt:
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06/23/2005
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Publication #:
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Pub Dt:
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12/29/2005
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Title:
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FAST BISTABLE CIRCUIT PROTECTED AGAINST RANDOM EVENTS
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11291478
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Filing Dt:
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11/30/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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ERROR TEST FOR AN ADDRESS DECODER OF A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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01/01/2008
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Application #:
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11400062
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Filing Dt:
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04/07/2006
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Publication #:
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Pub Dt:
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10/19/2006
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Title:
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PHASE LOCKED LOOP
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11402286
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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GAIN CONTROL FOR CARTESIAN LOOP TRANSMITTER WITH DIGITAL PROCESSING
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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11420152
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Filing Dt:
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05/24/2006
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
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CAPACITIVE ARRAY
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11913102
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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08/14/2008
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Title:
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INTEGRATED CIRCUIT HAVING CONFIGURABLE CELLS AND A SECURED TEST MODE
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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11960024
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Filing Dt:
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12/19/2007
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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METHOD OF MANUFACTURING SENSOR WITH PHOTODIODE AND CHARGE TRANSFER TRANSISTOR
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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11963939
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Filing Dt:
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12/24/2007
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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PINNED PHOTODIODE WITH HIGH STORAGE CAPACITY, METHOD OF MANUFACTURE AND IMAGE SENSOR INCORPORATING SAME
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Patent #:
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Issue Dt:
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07/13/2010
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Application #:
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12333426
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Filing Dt:
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12/12/2008
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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MEMORY INCLUDING A PERFORMANCE TEST CIRCUIT
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12900584
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Filing Dt:
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10/08/2010
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Publication #:
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Pub Dt:
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04/14/2011
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Title:
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LOW COMPLEXITY FINITE PRECISION DECODERS AND APPARATUS FOR LDPC CODES
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Patent #:
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Issue Dt:
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05/20/2014
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Application #:
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13312679
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Filing Dt:
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12/06/2011
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Publication #:
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Pub Dt:
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06/06/2013
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Title:
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DUAL CLOCK EDGE TRIGGERED MEMORY
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