Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 014590/0216 | |
| Pages: | 3 |
| | Recorded: | 09/30/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10676934
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Filing Dt:
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09/30/2003
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Title:
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PROCESS FOR REDUCING IMPURITY LEVELS, STRESS, AND RESISTIVITY, AND INCREASING GRAIN SIZE OF COPPER FILLER IN TRENCHES AND VIAS OF INTEGRATED CIRCUIT STRUCTURES TO ENHANCE ELECTRICAL PERFORMANCE OF COPPER FILLER
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Assignee
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| 1551 MCCARTHY BOULEVARD |
| MILPITAS, CALIFORNIA 95035 |
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Correspondence name and address
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LSI LOGIC CORPORATION
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SANDEEP JAGGI
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1621 BARBER LANE, MS D-106
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LEGAL DEPARTMENT - IP
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MILPITAS, CA 95035
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