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Reel/Frame:042375/0221   Pages: 6
Recorded: 05/01/2017
Attorney Dkt #:070852.000001
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 35
1
Patent #:
6631392
Issue Dt:
10/07/2003
Application #:
09363638
Filing Dt:
07/30/1999
Title:
METHOD AND APPARATUS FOR PREDICTING FLOATING-POINT EXCEPTIONS
2
Patent #:
6651156
Issue Dt:
11/18/2003
Application #:
09822783
Filing Dt:
03/30/2001
Title:
MECHANISM FOR EXTENDING PROPERTIES OF VIRTUAL MEMORY PAGES BY A TLB
3
Patent #:
6523104
Issue Dt:
02/18/2003
Application #:
09905180
Filing Dt:
07/13/2001
Publication #:
US20030014609
Pub Dt:
01/16/2003
Title:
MECHANISM FOR PROGRAMMABLE MODIFICATION OF MEMORY MAPPING GRANULARITY
4
Patent #:
7181600
Issue Dt:
02/20/2007
Application #:
09921377
Filing Dt:
08/02/2001
Title:
READ-ONLY ACCESS TO CPO REGISTERS
5
Patent #:
7185183
Issue Dt:
02/27/2007
Application #:
09921400
Filing Dt:
08/02/2001
Title:
ATOMIC UPDATE OF CPO STATE
6
Patent #:
7552261
Issue Dt:
06/23/2009
Application #:
09977089
Filing Dt:
10/12/2001
Publication #:
US20030074508
Pub Dt:
04/17/2003
Title:
CONFIGURABLE PRIORITIZATION OF CORE GENERATED INTERRUPTS
7
Patent #:
7000095
Issue Dt:
02/14/2006
Application #:
10238993
Filing Dt:
09/06/2002
Publication #:
US20040049660
Pub Dt:
03/11/2004
Title:
METHOD AND APPARATUS FOR CLEARING HAZARDS USING JUMP INSTRUCTIONS
8
Patent #:
7634638
Issue Dt:
12/15/2009
Application #:
10279210
Filing Dt:
10/22/2002
Title:
INSTRUCTION ENCODING FOR SYSTEM REGISTER BIT SET AND CLEAR
9
Patent #:
7376954
Issue Dt:
05/20/2008
Application #:
10684350
Filing Dt:
10/10/2003
Publication #:
US20050050395
Pub Dt:
03/03/2005
Title:
MECHANISMS FOR ASSURING QUALITY OF SERVICE FOR PROGRAMS EXECUTING ON A MULTITHREADED PROCESSOR
10
Patent #:
7644237
Issue Dt:
01/05/2010
Application #:
10783960
Filing Dt:
02/20/2004
Title:
METHOD AND APPARATUS FOR GLOBAL ORDERING TO INSURE LATENCY INDEPENDENT COHERENCE
11
Patent #:
7610473
Issue Dt:
10/27/2009
Application #:
10928746
Filing Dt:
08/27/2004
Publication #:
US20050120194
Pub Dt:
06/02/2005
Title:
APPARATUS, METHOD, AND INSTRUCTION FOR INITIATION OF CONCURRENT INSTRUCTION STREAMS IN A MULTITHREADING MICROPROCESSOR
12
Patent #:
7424599
Issue Dt:
09/09/2008
Application #:
10929097
Filing Dt:
08/27/2004
Publication #:
US20050240936
Pub Dt:
10/27/2005
Title:
APPARATUS, METHOD, AND INSTRUCTION FOR SOFTWARE MANAGEMENT OF MULTIPLE COMPUTATIONAL CONTEXTS IN A MULTITHREADED MICROPROCESSOR
13
Patent #:
7694304
Issue Dt:
04/06/2010
Application #:
10929102
Filing Dt:
08/27/2004
Publication #:
US20050125629
Pub Dt:
06/09/2005
Title:
MECHANISMS FOR DYNAMIC CONFIGURATION OF VIRTUAL PROCESSOR RESOURCES
14
Patent #:
7321965
Issue Dt:
01/22/2008
Application #:
10929342
Filing Dt:
08/27/2004
Publication #:
US20050125795
Pub Dt:
06/09/2005
Title:
INTEGRATED MECHANISM FOR SUSPENSION AND DEALLOCATION OF COMPUTATIONAL THREADS OF EXECUTION IN A PROCESSOR
15
Patent #:
7711931
Issue Dt:
05/04/2010
Application #:
10954988
Filing Dt:
09/30/2004
Publication #:
US20070186028
Pub Dt:
08/09/2007
Title:
SYNCHRONIZED STORAGE PROVIDING MULTIPLE SYNCHRONIZATION SEMANTICS
16
Patent #:
7594089
Issue Dt:
09/22/2009
Application #:
10955231
Filing Dt:
09/30/2004
Publication #:
US20050251639
Pub Dt:
11/10/2005
Title:
SMART MEMORY BASED SYNCHRONIZATION CONTROLLER FOR A MULTI-THREADED MULTIPROCESSOR SOC
17
Patent #:
7853777
Issue Dt:
12/14/2010
Application #:
11051978
Filing Dt:
02/04/2005
Publication #:
US20060179274
Pub Dt:
08/10/2006
Title:
INSTRUCTION/SKID BUFFERS IN A MULTITHREADING MICROPROCESSOR THAT STORE DISPATCHED INSTRUCTIONS TO AVOID RE-FETCHING FLUSHED INSTRUCTIONS
18
Patent #:
7613904
Issue Dt:
11/03/2009
Application #:
11051997
Filing Dt:
02/04/2005
Publication #:
US20060179279
Pub Dt:
08/10/2006
Title:
INTERFACING EXTERNAL THREAD PRIORITIZING POLICY ENFORCING LOGIC WITH CUSTOMER MODIFIABLE REGISTER TO PROCESSOR INTERNAL SCHEDULER
19
Patent #:
7558939
Issue Dt:
07/07/2009
Application #:
11075041
Filing Dt:
03/08/2005
Publication #:
US20060206686
Pub Dt:
09/14/2006
Title:
THREE-TIERED TRANSLATION LOOKASIDE BUFFER HIERARCHY IN A MULTITHREADING MICROPROCESSOR
20
Patent #:
8171262
Issue Dt:
05/01/2012
Application #:
11284069
Filing Dt:
11/21/2005
Publication #:
US20060101255
Pub Dt:
05/11/2006
Title:
METHOD AND APPARATUS FOR CLEARING HAZARDS USING JUMP INSTRUCTIONS
21
Patent #:
7849297
Issue Dt:
12/07/2010
Application #:
11313272
Filing Dt:
12/20/2005
Publication #:
US20060161421
Pub Dt:
07/20/2006
Title:
SOFTWARE EMULATION OF DIRECTED EXCEPTIONS IN A MULTITHREADING PROCESSOR
22
Patent #:
7418585
Issue Dt:
08/26/2008
Application #:
11330914
Filing Dt:
01/11/2006
Publication #:
US20070043935
Pub Dt:
02/22/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
23
Patent #:
7836450
Issue Dt:
11/16/2010
Application #:
11330915
Filing Dt:
01/11/2006
Publication #:
US20070044105
Pub Dt:
02/22/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
24
Patent #:
7870553
Issue Dt:
01/11/2011
Application #:
11330916
Filing Dt:
01/11/2006
Publication #:
US20070044106
Pub Dt:
02/22/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
25
Patent #:
7600100
Issue Dt:
10/06/2009
Application #:
11567290
Filing Dt:
12/06/2006
Publication #:
US20070234020
Pub Dt:
10/04/2007
Title:
INSTRUCTION ENCODING FOR SYSTEM REGISTER BIT SET AND CLEAR
26
Patent #:
7725689
Issue Dt:
05/25/2010
Application #:
11615960
Filing Dt:
12/23/2006
Publication #:
US20070106887
Pub Dt:
05/10/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
27
Patent #:
7730291
Issue Dt:
06/01/2010
Application #:
11615964
Filing Dt:
12/23/2006
Publication #:
US20070106989
Pub Dt:
05/10/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
28
Patent #:
7676664
Issue Dt:
03/09/2010
Application #:
11615965
Filing Dt:
12/23/2006
Publication #:
US20070106990
Pub Dt:
05/10/2007
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
29
Patent #:
7739455
Issue Dt:
06/15/2010
Application #:
11767247
Filing Dt:
06/22/2007
Publication #:
US20080320230
Pub Dt:
12/25/2008
Title:
AVOIDING LIVELOCK USING A CACHE MANAGER IN MULTIPLE CORE PROCESSORS
30
Patent #:
7676660
Issue Dt:
03/09/2010
Application #:
11949603
Filing Dt:
12/03/2007
Publication #:
US20080140998
Pub Dt:
06/12/2008
Title:
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR CONDITIONALLY SUSPENDING ISSUING INSTRUCTIONS OF A THREAD
31
Patent #:
7925859
Issue Dt:
04/12/2011
Application #:
12495375
Filing Dt:
06/30/2009
Publication #:
US20090327649
Pub Dt:
12/31/2009
Title:
THREE-TIERED TRANSLATION LOOKASIDE BUFFER HIERARCHY IN A MULTITHREADING MICROPROCESSOR
32
Patent #:
8037253
Issue Dt:
10/11/2011
Application #:
12557421
Filing Dt:
09/10/2009
Publication #:
US20100005247
Pub Dt:
01/07/2010
Title:
METHOD AND APPARATUS FOR GLOBAL ORDERING TO INSURE LATENCY INDEPENDENT COHERENCE
33
Patent #:
8190865
Issue Dt:
05/29/2012
Application #:
12576942
Filing Dt:
10/09/2009
Publication #:
US20100031005
Pub Dt:
02/04/2010
Title:
INSTRUCTION ENCODING FOR SYSTEM REGISTER BIT SET AND CLEAR
34
Patent #:
8145884
Issue Dt:
03/27/2012
Application #:
12605201
Filing Dt:
10/23/2009
Publication #:
US20100115243
Pub Dt:
05/06/2010
Title:
APPARATUS, METHOD AND INSTRUCTION FOR INITIATION OF CONCURRENT INSTRUCTION STREAMS IN A MULTITHREADING MICROPROCESSOR
35
Patent #:
8266620
Issue Dt:
09/11/2012
Application #:
12911901
Filing Dt:
10/26/2010
Publication #:
US20110040956
Pub Dt:
02/17/2011
Title:
SYMMETRIC MULTIPROCESSOR OPERATING SYSTEM FOR EXECUTION ON NON-INDEPENDENT LIGHTWEIGHT THREAD CONTEXTS
Assignor
1
MIPS TECHNOLOGIES, INC.
Exec Dt:
03/10/2014
Assignee
1
IMAGINATION TECHNOLOGIES, LLC
3201 SCOTT BLVD
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
VORYS, SATER, SEYMOUR AND PEASE LLP
1909 K ST., NW
NINTH FLOOR
WASHINGTON, DC 20006

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